diff options
Diffstat (limited to 'gcc/testsuite')
910 files changed, 23138 insertions, 126 deletions
diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index b205c3d466d..d642accd441 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index aa94a481327..6d3e24f8262 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c index 8f28921ca86..fd390f9157c 100644 --- a/gcc/testsuite/gcc.target/i386/avx-1.c +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -370,6 +370,210 @@ /* shaintrin.h */ #define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1) +/* TODO split */ +#define __builtin_ia32_pslldq512(A, B) __builtin_ia32_pslldq512(A, 8) +#define __builtin_ia32_psrldq512(A, B) __builtin_ia32_psrldq512(A, 8) +#define __builtin_ia32_alignd128_mask(A, B, F, D, E) __builtin_ia32_alignd128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignd256_mask(A, B, F, D, E) __builtin_ia32_alignd256_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq128_mask(A, B, F, D, E) __builtin_ia32_alignq128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq256_mask(A, B, F, D, E) __builtin_ia32_alignq256_mask(A, B, 1, D, E) +#define __builtin_ia32_cmpb128_mask(A, B, E, D) __builtin_ia32_cmpb128_mask(A, B, 1, D) +#define __builtin_ia32_cmpb256_mask(A, B, E, D) __builtin_ia32_cmpb256_mask(A, B, 1, D) +#define __builtin_ia32_cmpb512_mask(A, B, E, D) __builtin_ia32_cmpb512_mask(A, B, 1, D) +#define __builtin_ia32_cmpd128_mask(A, B, E, D) __builtin_ia32_cmpd128_mask(A, B, 1, D) +#define __builtin_ia32_cmpd256_mask(A, B, E, D) __builtin_ia32_cmpd256_mask(A, B, 1, D) +#define __builtin_ia32_cmppd128_mask(A, B, E, D) __builtin_ia32_cmppd128_mask(A, B, 1, D) +#define __builtin_ia32_cmppd256_mask(A, B, E, D) __builtin_ia32_cmppd256_mask(A, B, 1, D) +#define __builtin_ia32_cmpps128_mask(A, B, E, D) __builtin_ia32_cmpps128_mask(A, B, 1, D) +#define __builtin_ia32_cmpps256_mask(A, B, E, D) __builtin_ia32_cmpps256_mask(A, B, 1, D) +#define __builtin_ia32_cmpq128_mask(A, B, E, D) __builtin_ia32_cmpq128_mask(A, B, 1, D) +#define __builtin_ia32_cmpq256_mask(A, B, E, D) __builtin_ia32_cmpq256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw128_mask(A, B, E, D) __builtin_ia32_cmpw128_mask(A, B, 1, D) +#define __builtin_ia32_cmpw256_mask(A, B, E, D) __builtin_ia32_cmpw256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw512_mask(A, B, E, D) __builtin_ia32_cmpw512_mask(A, B, 1, D) +#define __builtin_ia32_cvtpd2qq512_mask(A, B, C, D) __builtin_ia32_cvtpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvtpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2qq512_mask(A, B, C, D) __builtin_ia32_cvtps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2uqq512_mask(A, B, C, D) __builtin_ia32_cvtps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2qq512_mask(A, B, C, D) __builtin_ia32_cvttpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvttpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2qq512_mask(A, B, C, D) __builtin_ia32_cvttps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2uqq512_mask(A, B, C, D) __builtin_ia32_cvttps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtuqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtuqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_dbpsadbw128_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw128_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw256_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw256_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw512_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw512_mask(A, B, 1, D, E) +#define __builtin_ia32_extractf32x4_256_mask(A, E, C, D) __builtin_ia32_extractf32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf32x8_mask(A, E, C, D) __builtin_ia32_extractf32x8_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_512_mask(A, E, C, D) __builtin_ia32_extractf64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x4_256_mask(A, E, C, D) __builtin_ia32_extracti32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x8_mask(A, E, C, D) __builtin_ia32_extracti32x8_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_512_mask(A, E, C, D) __builtin_ia32_extracti64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_fixupimmpd128(A, B, C, E) __builtin_ia32_fixupimmpd128(A, B, C, 1) +#define __builtin_ia32_fixupimmpd128_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256(A, B, C, E) __builtin_ia32_fixupimmpd256(A, B, C, 1) +#define __builtin_ia32_fixupimmpd256_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128(A, B, C, E) __builtin_ia32_fixupimmps128(A, B, C, 1) +#define __builtin_ia32_fixupimmps128_mask(A, B, C, F, E) __builtin_ia32_fixupimmps128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256(A, B, C, E) __builtin_ia32_fixupimmps256(A, B, C, 1) +#define __builtin_ia32_fixupimmps256_mask(A, B, C, F, E) __builtin_ia32_fixupimmps256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fpclasspd128_mask(A, D, C) __builtin_ia32_fpclasspd128_mask(A, 1, C) +#define __builtin_ia32_fpclasspd256_mask(A, D, C) __builtin_ia32_fpclasspd256_mask(A, 1, C) +#define __builtin_ia32_fpclasspd512_mask(A, D, C) __builtin_ia32_fpclasspd512_mask(A, 1, C) +#define __builtin_ia32_fpclassps128_mask(A, D, C) __builtin_ia32_fpclassps128_mask(A, 1, C) +#define __builtin_ia32_fpclassps256_mask(A, D, C) __builtin_ia32_fpclassps256_mask(A, 1, C) +#define __builtin_ia32_fpclassps512_mask(A, D, C) __builtin_ia32_fpclassps512_mask(A, 1, C) +#define __builtin_ia32_fpclasssd(A, D) __builtin_ia32_fpclasssd(A, 1) +#define __builtin_ia32_fpclassss(A, D) __builtin_ia32_fpclassss(A, 1) +#define __builtin_ia32_gather3div2df(A, B, C, D, F) __builtin_ia32_gather3div2df(A, B, C, D, 1) +#define __builtin_ia32_gather3div2di(A, B, C, D, F) __builtin_ia32_gather3div2di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4df(A, B, C, D, F) __builtin_ia32_gather3div4df(A, B, C, D, 1) +#define __builtin_ia32_gather3div4di(A, B, C, D, F) __builtin_ia32_gather3div4di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4sf(A, B, C, D, F) __builtin_ia32_gather3div4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div4si(A, B, C, D, F) __builtin_ia32_gather3div4si(A, B, C, D, 1) +#define __builtin_ia32_gather3div8sf(A, B, C, D, F) __builtin_ia32_gather3div8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div8si(A, B, C, D, F) __builtin_ia32_gather3div8si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2df(A, B, C, D, F) __builtin_ia32_gather3siv2df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2di(A, B, C, D, F) __builtin_ia32_gather3siv2di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4df(A, B, C, D, F) __builtin_ia32_gather3siv4df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4di(A, B, C, D, F) __builtin_ia32_gather3siv4di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4sf(A, B, C, D, F) __builtin_ia32_gather3siv4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4si(A, B, C, D, F) __builtin_ia32_gather3siv4si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8sf(A, B, C, D, F) __builtin_ia32_gather3siv8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8si(A, B, C, D, F) __builtin_ia32_gather3siv8si(A, B, C, D, 1) +#define __builtin_ia32_getmantpd128_mask(A, E, C, D) __builtin_ia32_getmantpd128_mask(A, 1, C, D) +#define __builtin_ia32_getmantpd256_mask(A, E, C, D) __builtin_ia32_getmantpd256_mask(A, 1, C, D) +#define __builtin_ia32_getmantps128_mask(A, E, C, D) __builtin_ia32_getmantps128_mask(A, 1, C, D) +#define __builtin_ia32_getmantps256_mask(A, E, C, D) __builtin_ia32_getmantps256_mask(A, 1, C, D) +#define __builtin_ia32_insertf32x4_256_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf32x8_mask(A, B, F, D, E) __builtin_ia32_insertf32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_256_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_512_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x4_256_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x8_mask(A, B, F, D, E) __builtin_ia32_inserti32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_256_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_512_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_palignr128_mask(A, B, F, D, E) __builtin_ia32_palignr128_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr256_mask(A, B, F, D, E) __builtin_ia32_palignr256_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr512(A, B, D) __builtin_ia32_palignr512(A, B, 8) +#define __builtin_ia32_palignr512_mask(A, B, F, D, E) __builtin_ia32_palignr512_mask(A, B, 8, D, E) +#define __builtin_ia32_permdf256_mask(A, E, C, D) __builtin_ia32_permdf256_mask(A, 1, C, D) +#define __builtin_ia32_permdi256_mask(A, E, C, D) __builtin_ia32_permdi256_mask(A, 1, C, D) +#define __builtin_ia32_prold128_mask(A, E, C, D) __builtin_ia32_prold128_mask(A, 1, C, D) +#define __builtin_ia32_prold256_mask(A, E, C, D) __builtin_ia32_prold256_mask(A, 1, C, D) +#define __builtin_ia32_prolq128_mask(A, E, C, D) __builtin_ia32_prolq128_mask(A, 1, C, D) +#define __builtin_ia32_prolq256_mask(A, E, C, D) __builtin_ia32_prolq256_mask(A, 1, C, D) +#define __builtin_ia32_prord128_mask(A, E, C, D) __builtin_ia32_prord128_mask(A, 1, C, D) +#define __builtin_ia32_prord256_mask(A, E, C, D) __builtin_ia32_prord256_mask(A, 1, C, D) +#define __builtin_ia32_prorq128_mask(A, E, C, D) __builtin_ia32_prorq128_mask(A, 1, C, D) +#define __builtin_ia32_prorq256_mask(A, E, C, D) __builtin_ia32_prorq256_mask(A, 1, C, D) +#define __builtin_ia32_pshufd128_mask(A, E, C, D) __builtin_ia32_pshufd128_mask(A, 1, C, D) +#define __builtin_ia32_pshufd256_mask(A, E, C, D) __builtin_ia32_pshufd256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw128_mask(A, E, C, D) __builtin_ia32_pshufhw128_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw256_mask(A, E, C, D) __builtin_ia32_pshufhw256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw512_mask(A, E, C, D) __builtin_ia32_pshufhw512_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw128_mask(A, E, C, D) __builtin_ia32_pshuflw128_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw256_mask(A, E, C, D) __builtin_ia32_pshuflw256_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw512_mask(A, E, C, D) __builtin_ia32_pshuflw512_mask(A, 1, C, D) +#define __builtin_ia32_pslldi128_mask(A, E, C, D) __builtin_ia32_pslldi128_mask(A, 1, C, D) +#define __builtin_ia32_pslldi256_mask(A, E, C, D) __builtin_ia32_pslldi256_mask(A, 1, C, D) +#define __builtin_ia32_psllqi128_mask(A, E, C, D) __builtin_ia32_psllqi128_mask(A, 1, C, D) +#define __builtin_ia32_psllqi256_mask(A, E, C, D) __builtin_ia32_psllqi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi128_mask(A, E, C, D) __builtin_ia32_psllwi128_mask(A, 1, C, D) +#define __builtin_ia32_psllwi256_mask(A, E, C, D) __builtin_ia32_psllwi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi512_mask(A, E, C, D) __builtin_ia32_psllwi512_mask(A, 1, C, D) +#define __builtin_ia32_psradi128_mask(A, E, C, D) __builtin_ia32_psradi128_mask(A, 1, C, D) +#define __builtin_ia32_psradi256_mask(A, E, C, D) __builtin_ia32_psradi256_mask(A, 1, C, D) +#define __builtin_ia32_psraqi128_mask(A, E, C, D) __builtin_ia32_psraqi128_mask(A, 1, C, D) +#define __builtin_ia32_psraqi256_mask(A, E, C, D) __builtin_ia32_psraqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi128_mask(A, E, C, D) __builtin_ia32_psrawi128_mask(A, 1, C, D) +#define __builtin_ia32_psrawi256_mask(A, E, C, D) __builtin_ia32_psrawi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi512_mask(A, E, C, D) __builtin_ia32_psrawi512_mask(A, 1, C, D) +#define __builtin_ia32_psrldi128_mask(A, E, C, D) __builtin_ia32_psrldi128_mask(A, 1, C, D) +#define __builtin_ia32_psrldi256_mask(A, E, C, D) __builtin_ia32_psrldi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi128_mask(A, E, C, D) __builtin_ia32_psrlqi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi256_mask(A, E, C, D) __builtin_ia32_psrlqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi128_mask(A, E, C, D) __builtin_ia32_psrlwi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi256_mask(A, E, C, D) __builtin_ia32_psrlwi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi512_mask(A, E, C, D) __builtin_ia32_psrlwi512_mask(A, 1, C, D) +#define __builtin_ia32_pternlogd128_mask(A, B, C, F, E) __builtin_ia32_pternlogd128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd128_maskz(A, B, C, F, E) __builtin_ia32_pternlogd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_mask(A, B, C, F, E) __builtin_ia32_pternlogd256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_maskz(A, B, C, F, E) __builtin_ia32_pternlogd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_mask(A, B, C, F, E) __builtin_ia32_pternlogq128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_maskz(A, B, C, F, E) __builtin_ia32_pternlogq128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_mask(A, B, C, F, E) __builtin_ia32_pternlogq256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_maskz(A, B, C, F, E) __builtin_ia32_pternlogq256_maskz(A, B, C, 1, E) +#define __builtin_ia32_rangepd128_mask(A, B, F, D, E) __builtin_ia32_rangepd128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd256_mask(A, B, F, D, E) __builtin_ia32_rangepd256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd512_mask(A, B, I, D, E, F) __builtin_ia32_rangepd512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangeps128_mask(A, B, F, D, E) __builtin_ia32_rangeps128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps256_mask(A, B, F, D, E) __builtin_ia32_rangeps256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps512_mask(A, B, I, D, E, F) __builtin_ia32_rangeps512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangesd128_round(A, B, I, F) __builtin_ia32_rangesd128_round(A, B, 1, 8) +#define __builtin_ia32_rangess128_round(A, B, I, F) __builtin_ia32_rangess128_round(A, B, 1, 8) +#define __builtin_ia32_reducepd128_mask(A, E, C, D) __builtin_ia32_reducepd128_mask(A, 1, C, D) +#define __builtin_ia32_reducepd256_mask(A, E, C, D) __builtin_ia32_reducepd256_mask(A, 1, C, D) +#define __builtin_ia32_reducepd512_mask(A, E, C, D) __builtin_ia32_reducepd512_mask(A, 1, C, D) +#define __builtin_ia32_reduceps128_mask(A, E, C, D) __builtin_ia32_reduceps128_mask(A, 1, C, D) +#define __builtin_ia32_reduceps256_mask(A, E, C, D) __builtin_ia32_reduceps256_mask(A, 1, C, D) +#define __builtin_ia32_reduceps512_mask(A, E, C, D) __builtin_ia32_reduceps512_mask(A, 1, C, D) +#define __builtin_ia32_reducesd(A, B, F) __builtin_ia32_reducesd(A, B, 1) +#define __builtin_ia32_reducess(A, B, F) __builtin_ia32_reducess(A, B, 1) +#define __builtin_ia32_rndscalepd_128_mask(A, E, C, D) __builtin_ia32_rndscalepd_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscalepd_256_mask(A, E, C, D) __builtin_ia32_rndscalepd_256_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_128_mask(A, E, C, D) __builtin_ia32_rndscaleps_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_256_mask(A, E, C, D) __builtin_ia32_rndscaleps_256_mask(A, 1, C, D) +#define __builtin_ia32_scatterdiv2df(A, B, C, D, F) __builtin_ia32_scatterdiv2df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv2di(A, B, C, D, F) __builtin_ia32_scatterdiv2di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4df(A, B, C, D, F) __builtin_ia32_scatterdiv4df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4di(A, B, C, D, F) __builtin_ia32_scatterdiv4di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4sf(A, B, C, D, F) __builtin_ia32_scatterdiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4si(A, B, C, D, F) __builtin_ia32_scatterdiv4si(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8sf(A, B, C, D, F) __builtin_ia32_scatterdiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8si(A, B, C, D, F) __builtin_ia32_scatterdiv8si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2df(A, B, C, D, F) __builtin_ia32_scattersiv2df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2di(A, B, C, D, F) __builtin_ia32_scattersiv2di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4df(A, B, C, D, F) __builtin_ia32_scattersiv4df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4di(A, B, C, D, F) __builtin_ia32_scattersiv4di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4sf(A, B, C, D, F) __builtin_ia32_scattersiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4si(A, B, C, D, F) __builtin_ia32_scattersiv4si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8sf(A, B, C, D, F) __builtin_ia32_scattersiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8si(A, B, C, D, F) __builtin_ia32_scattersiv8si(A, B, C, D, 1) +#define __builtin_ia32_shuf_f32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_f64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd128_mask(A, B, F, D, E) __builtin_ia32_shufpd128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd256_mask(A, B, F, D, E) __builtin_ia32_shufpd256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps128_mask(A, B, F, D, E) __builtin_ia32_shufps128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps256_mask(A, B, F, D, E) __builtin_ia32_shufps256_mask(A, B, 1, D, E) +#define __builtin_ia32_ucmpb128_mask(A, B, E, D) __builtin_ia32_ucmpb128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb256_mask(A, B, E, D) __builtin_ia32_ucmpb256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb512_mask(A, B, E, D) __builtin_ia32_ucmpb512_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd128_mask(A, B, E, D) __builtin_ia32_ucmpd128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd256_mask(A, B, E, D) __builtin_ia32_ucmpd256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq128_mask(A, B, E, D) __builtin_ia32_ucmpq128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq256_mask(A, B, E, D) __builtin_ia32_ucmpq256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw128_mask(A, B, E, D) __builtin_ia32_ucmpw128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw256_mask(A, B, E, D) __builtin_ia32_ucmpw256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw512_mask(A, B, E, D) __builtin_ia32_ucmpw512_mask(A, B, 1, D) +#define __builtin_ia32_vcvtps2ph256_mask(A, E, C, D) __builtin_ia32_vcvtps2ph256_mask(A, 1, C, D) +#define __builtin_ia32_vcvtps2ph_mask(A, E, C, D) __builtin_ia32_vcvtps2ph_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd256_mask(A, E, C, D) __builtin_ia32_vpermilpd256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd_mask(A, E, C, D) __builtin_ia32_vpermilpd_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps256_mask(A, E, C, D) __builtin_ia32_vpermilps256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps_mask(A, E, C, D) __builtin_ia32_vpermilps_mask(A, 1, C, D) + #include <wmmintrin.h> #include <immintrin.h> #include <mm3dnow.h> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-check.h b/gcc/testsuite/gcc.target/i386/avx512bw-check.h new file mode 100644 index 00000000000..4cae3092fe7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-check.h @@ -0,0 +1,47 @@ +#include <stdlib.h> +#include "cpuid.h" +#include "m512-check.h" +#include "avx512f-os-support.h" + +static void avx512bw_test (void); + +static void __attribute__ ((noinline)) do_test (void) +{ + avx512bw_test (); +} + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AVX512BW test only if host has AVX512BW support. */ + if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE)) + { + if (__get_cpuid_max (0, NULL) < 7) + return 0; + + __cpuid_count (7, 0, eax, ebx, ecx, edx); + + if ((avx512f_os_support ()) && ((ebx & bit_AVX512BW) == bit_AVX512BW)) + { + do_test (); +#ifdef DEBUG + printf ("PASSED\n"); +#endif + return 0; + } +#ifdef DEBUG + printf ("SKIPPED\n"); +#endif + } +#ifdef DEBUG + else + printf ("SKIPPED\n"); +#endif + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-kunpckdq-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-kunpckdq-1.c new file mode 100644 index 00000000000..16fce46f8e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-kunpckdq-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "kunpckdq\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */ + +#include <immintrin.h> + +void +avx512bw_test () { + __mmask64 k1, k2, k3; + volatile __m512i x; + + __asm__( "kmovq %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovq %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _mm512_kunpackd (k1, k2); + x = _mm512_mask_avg_epu8 (x, k3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-kunpckwd-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-kunpckwd-1.c new file mode 100644 index 00000000000..eece5e8f264 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-kunpckwd-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "kunpckwd\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */ + +#include <immintrin.h> + +void +avx512bw_test () { + volatile __mmask32 k1, k2, k3; + volatile __m256i x; + + __asm__( "kmovd %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovd %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _mm512_kunpackw (k1, k2); + //x = _mm256_mask_avg_epu8 (x, k3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-1.c new file mode 100644 index 00000000000..3a6522cbee7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdbpsadbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x, a; +volatile __m256i y, b; +volatile __m128i z, c; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + x = _mm512_dbsad_epu8 (a, a, 0xaa); + x = _mm512_mask_dbsad_epu8 (x, m1, a, a, 0xaa); + x = _mm512_maskz_dbsad_epu8 (m1, a, a, 0xaa); + y = _mm256_dbsad_epu8 (b, b, 0xbb); + y = _mm256_mask_dbsad_epu8 (y, m2, b, b, 0xbb); + y = _mm256_maskz_dbsad_epu8 (m2, b, b, 0xbb); + z = _mm_dbsad_epu8 (c, c, 0xcc); + z = _mm_mask_dbsad_epu8 (z, m3, c, c, 0xcc); + z = _mm_maskz_dbsad_epu8 (m3, c, c, 0xcc); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-2.c new file mode 100644 index 00000000000..cbd50d3a7ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vdbpsadbw-2.c @@ -0,0 +1,80 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (unsigned short *dst, unsigned char *src1, unsigned char *src2, + int imm) +{ + int i, j, k, part, power; + unsigned char tmp[2 * SIZE];; + + for (i = 0; i < 2 * SIZE; i += 16) + { + for (j = 0; j < 4; j++) + { + power = 1; + for (k = 0; k < j; k++) + power *= 4; + part = (imm & (3 * power)) >> (2 * j); + for (k = 0; k < 4; k++) + tmp[i + 4 * j + k] = src2[i + 4 * part + k]; + } + } + + for (i = 0; i < SIZE; i += 4) + { + dst[i] = dst[i + 1] = dst[i + 2] = dst[i + 3] = 0; + for (j = 0; j < 4; j++) + { + dst[i] += abs (src1[2 * i + j] - tmp[2 * i + j]); + dst[i + 1] += abs (src1[2 * i + j] - tmp[2 * i + j + 1]); + dst[i + 2] += abs (src1[2 * i + j + 4] - tmp[2 * i + j + 2]); + dst[i + 3] += abs (src1[2 * i + j + 4] - tmp[2 * i + j + 3]); + } + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + int imm = 0x22; + + sign = -1; + for (i = 0; i < 2*SIZE; i++) + { + src1.a[i] = 1 + 34 * i * sign; + src1.a[i] = 179 - i; + sign = sign * -1; + } + + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_dbsad_epu8) (src1.x, src2.x, imm); + res2.x = INTRINSIC (_mask_dbsad_epu8) (res2.x, mask, src1.x, src2.x, imm); + res3.x = INTRINSIC (_maskz_dbsad_epu8) (mask, src1.x, src2.x, imm); + + CALC (res_ref, src1.a, src2.a, imm); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c new file mode 100644 index 00000000000..96682a56118 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +short *p; +volatile __m512i x1, yy; +volatile __m256i x2, y2; +volatile __m128i x3, y3; +volatile __mmask32 m32; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512bw_test (void) +{ + x1 = _mm512_mask_mov_epi16 (x1, m32, yy); + x2 = _mm256_mask_mov_epi16 (x2, m16, y2); + x3 = _mm_mask_mov_epi16 (x3, m8, y3); + + x1 = _mm512_maskz_mov_epi16 (m32, yy); + x2 = _mm256_maskz_mov_epi16 (m16, y2); + x3 = _mm_maskz_mov_epi16 (m8, y3); + + x1 = _mm512_mask_loadu_epi16 (x1, m32, p); + x2 = _mm256_mask_loadu_epi16 (x2, m16, p); + x3 = _mm_mask_loadu_epi16 (x3, m8, p); + + x1 = _mm512_maskz_loadu_epi16 (m32, p); + x2 = _mm256_maskz_loadu_epi16 (m16, p); + x3 = _mm_maskz_loadu_epi16 (m8, p); + + _mm512_mask_storeu_epi16 (p, m32, x1); + _mm256_mask_storeu_epi16 (p, m16, x2); + _mm_mask_storeu_epi16 (p, m8, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-2.c new file mode 100644 index 00000000000..48a59b84824 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-2.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE ((AVX512F_LEN) / 16) +#include "avx512f-mask-type.h" + +typedef struct +{ + char c; + short a[SIZE]; +} __attribute__ ((packed)) EVAL(unaligned_array, AVX512F_LEN,); + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s3, res1, res2, res3, res4; + EVAL(unaligned_array, AVX512F_LEN,) s2, res5; + MASK_TYPE mask = MASK_VALUE; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 123 * i * sign; + s2.a[i] = 456 * i * sign; + s3.a[i] = 789 * i * sign; + res1.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_mask_mov_epi16) (res1.x, mask, s1.x); + res2.x = INTRINSIC (_maskz_mov_epi16) (mask, s1.x); + res3.x = INTRINSIC (_mask_loadu_epi16) (res3.x, mask, s2.a); + res4.x = INTRINSIC (_maskz_loadu_epi16) (mask, s2.a); + INTRINSIC (_mask_storeu_epi16) (res5.a, mask, s3.x); + + MASK_MERGE (i_w) (s1.a, mask, SIZE); + if (checkVs (res1.a, s1.a, SIZE)) + abort (); + + MASK_ZERO (i_w) (s1.a, mask, SIZE); + if (checkVs (res2.a, s1.a, SIZE)) + abort (); + + MASK_MERGE (i_w) (s2.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, s2.a)) + abort (); + + MASK_ZERO (i_w) (s2.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res4, s2.a)) + abort (); + + MASK_MERGE (i_w) (s3.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (s3, res5.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c new file mode 100644 index 00000000000..8856a21f126 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +char *p; +volatile __m512i x1, yy; +volatile __m256i x2, y2; +volatile __m128i x3, y3; +volatile __mmask64 m64; +volatile __mmask32 m32; +volatile __mmask16 m16; + +void extern +avx512bw_test (void) +{ + x1 = _mm512_mask_mov_epi8 (x1, m64, yy); + x2 = _mm256_mask_mov_epi8 (x2, m32, y2); + x3 = _mm_mask_mov_epi8 (x3, m16, y3); + + x1 = _mm512_maskz_mov_epi8 (m64, yy); + x2 = _mm256_maskz_mov_epi8 (m32, y2); + x3 = _mm_maskz_mov_epi8 (m16, y3); + + x1 = _mm512_mask_loadu_epi8 (x1, m64, p); + x2 = _mm256_mask_loadu_epi8 (x2, m32, p); + x3 = _mm_mask_loadu_epi8 (x3, m16, p); + + x1 = _mm512_maskz_loadu_epi8 (m64, p); + x2 = _mm256_maskz_loadu_epi8 (m32, p); + x3 = _mm_maskz_loadu_epi8 (m16, p); + + _mm512_mask_storeu_epi8 (p, m64, x1); + _mm256_mask_storeu_epi8 (p, m32, x2); + _mm_mask_storeu_epi8 (p, m16, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-2.c new file mode 100644 index 00000000000..4c65cf54e43 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-2.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE ((AVX512F_LEN) / 8) +#include "avx512f-mask-type.h" + +typedef struct +{ + char c; + char a[SIZE]; +} __attribute__ ((packed)) EVAL(unaligned_array, AVX512F_LEN,); + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_b) s1, s3, res1, res2, res3, res4; + EVAL(unaligned_array, AVX512F_LEN,) s2, res5; + MASK_TYPE mask = MASK_VALUE; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = (i + 1) * sign; + s2.a[i] = (i + 2) * sign; + s3.a[i] = (i * 2) * sign; + res1.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_mask_mov_epi8) (res1.x, mask, s1.x); + res2.x = INTRINSIC (_maskz_mov_epi8) (mask, s1.x); + res3.x = INTRINSIC (_mask_loadu_epi8) (res3.x, mask, s2.a); + res4.x = INTRINSIC (_maskz_loadu_epi8) (mask, s2.a); + INTRINSIC (_mask_storeu_epi8) (res5.a, mask, s3.x); + + MASK_MERGE (i_b) (s1.a, mask, SIZE); + if (checkVc (res1.a, s1.a, SIZE)) + abort (); + + MASK_ZERO (i_b) (s1.a, mask, SIZE); + if (checkVc (res2.a, s1.a, SIZE)) + abort (); + + MASK_MERGE (i_b) (s2.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, s2.a)) + abort (); + + MASK_ZERO (i_b) (s2.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res4, s2.a)) + abort (); + + MASK_MERGE (i_b) (s3.a, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (s3, res5.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-1.c new file mode 100644 index 00000000000..298b9ef2c08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_abs_epi8 (z); + z = _mm512_mask_abs_epi8 (z, m1, z); + z = _mm512_maskz_abs_epi8 (m1, z); + y = _mm256_mask_abs_epi8 (y, m2, y); + y = _mm256_maskz_abs_epi8 (m2, y); + x = _mm_mask_abs_epi8 (x, m3, x); + x = _mm_maskz_abs_epi8 (m3, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-2.c new file mode 100644 index 00000000000..9cd6ce18b8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsb-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (char *s, char *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + if (s[i] < 0) + r[i] = -s[i]; + else + r[i] = s[i]; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_b) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = i * 7 + (i << 15) + 356; + res2.a[i] = DEFAULT_VALUE; + } + + CALC (s.a, res_ref); + + res1.x = INTRINSIC (_abs_epi8) (s.x); + res2.x = INTRINSIC (_mask_abs_epi8) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_abs_epi8) (mask, s.x); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort ();} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-1.c new file mode 100644 index 00000000000..73a3af1eee5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_abs_epi16 (z); + z = _mm512_mask_abs_epi16 (z, m1, z); + z = _mm512_maskz_abs_epi16 (m1, z); + y = _mm256_mask_abs_epi16 (y, m2, y); + y = _mm256_maskz_abs_epi16 (m2, y); + x = _mm_mask_abs_epi16 (x, m3, x); + x = _mm_maskz_abs_epi16 (m3, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-2.c new file mode 100644 index 00000000000..07e9bfea64f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpabsw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s, short *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + if (s[i] < 0) + r[i] = -s[i]; + else + r[i] = s[i]; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = i * 7 + (i << 15) + 356; + res2.a[i] = DEFAULT_VALUE; + } + + CALC (s.a, res_ref); + + res1.x = INTRINSIC (_abs_epi16) (s.x); + res2.x = INTRINSIC (_mask_abs_epi16) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_abs_epi16) (mask, s.x); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-1.c new file mode 100644 index 00000000000..71ff18f881c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackssdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask64 mx; +volatile __mmask32 my; +volatile __mmask16 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_packs_epi32 (x, x); + x = _mm512_mask_packs_epi32 (x, mx, x, x); + x = _mm512_maskz_packs_epi32 (mx, x, x); + y = _mm256_mask_packs_epi32 (y, my, y, y); + y = _mm256_maskz_packs_epi32 (my, y, y); + z = _mm_mask_packs_epi32 (z, mz, z, z); + z = _mm_maskz_packs_epi32 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-2.c new file mode 100644 index 00000000000..3a9f5c0b4fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackssdw-2.c @@ -0,0 +1,77 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define DST_SIZE (AVX512F_LEN / 16) +#define SRC_SIZE (AVX512F_LEN / 32) + +#include "limits.h" + +#include "avx512f-mask-type.h" + +static short +EVAL(int_to_short, AVX512F_LEN,) (int iVal) +{ + short sVal; + + if (iVal < SHRT_MIN) + sVal = SHRT_MIN; + else if (iVal > SHRT_MAX) + sVal = SHRT_MAX; + else + sVal = iVal; + + return sVal; +} + +void +CALC (int *src1, int *src2, short *dst) +{ + int i; + int *ptr; + + for (i = 0; i < DST_SIZE; i++) + { + ptr = (i / 4) % 2 ? src2 : src1; + dst[i] = EVAL(int_to_short, AVX512F_LEN,) (ptr[i % 4 + (i / 8) * 4]); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_d) s1, s2; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short dst_ref[DST_SIZE]; + int i; + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + for (i = 0; i < SRC_SIZE; i++) + { + s1.a[i] = i + 10; + s2.a[i] = i + 15; + } + + res1.x = INTRINSIC (_packs_epi32) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_packs_epi32) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_packs_epi32) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, dst_ref)) + abort (); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-1.c new file mode 100644 index 00000000000..251867d45b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpacksswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask64 mx; +volatile __mmask32 my; +volatile __mmask16 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_packs_epi16 (x, x); + x = _mm512_mask_packs_epi16 (x, mx, x, x); + x = _mm512_maskz_packs_epi16 (mx, x, x); + y = _mm256_mask_packs_epi16 (y, my, y, y); + y = _mm256_maskz_packs_epi16 (my, y, y); + z = _mm_mask_packs_epi16 (z, mz, z, z); + z = _mm_maskz_packs_epi16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-2.c new file mode 100644 index 00000000000..734f3ffe047 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpacksswb-2.c @@ -0,0 +1,77 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define DST_SIZE (AVX512F_LEN / 8) +#define SRC_SIZE (AVX512F_LEN / 16) + +#include "limits.h" + +#include "avx512f-mask-type.h" + +static char +EVAL(short_to_char, AVX512F_LEN,) (short iVal) +{ + char sVal; + + if (iVal < CHAR_MIN) + sVal = CHAR_MIN; + else if (iVal > CHAR_MAX) + sVal = CHAR_MAX; + else + sVal = iVal; + + return sVal; +} + +void +CALC (short *src1, short *src2, char *dst) +{ + int i; + short *ptr; + + for (i = 0; i < DST_SIZE; i++) + { + ptr = (i / 8) % 2 ? src2 : src1; + dst[i] = EVAL(short_to_char, AVX512F_LEN,) (ptr[i % 8 + (i / 16) * 8]); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + char dst_ref[DST_SIZE]; + int i; + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + for (i = 0; i < SRC_SIZE; i++) + { + s1.a[i] = i + 10; + s2.a[i] = i + 15; + } + + res1.x = INTRINSIC (_packs_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_packs_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_packs_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, dst_ref)) + abort (); + + MASK_MERGE (i_b) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, dst_ref)) + abort (); + + MASK_ZERO (i_b) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, dst_ref)) + abort (); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-1.c new file mode 100644 index 00000000000..b6d0166c0d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackusdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask64 mx; +volatile __mmask32 my; +volatile __mmask16 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_packus_epi32 (x, x); + x = _mm512_mask_packus_epi32 (x, mx, x, x); + x = _mm512_maskz_packus_epi32 (mx, x, x); + y = _mm256_mask_packus_epi32 (y, my, y, y); + y = _mm256_maskz_packus_epi32 (my, y, y); + z = _mm_mask_packus_epi32 (z, mz, z, z); + z = _mm_maskz_packus_epi32 (mz, z, z); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-2.c new file mode 100644 index 00000000000..2083b59a837 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackusdw-2.c @@ -0,0 +1,77 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define DST_SIZE (AVX512F_LEN / 16) +#define SRC_SIZE (AVX512F_LEN / 32) + +#include "limits.h" + +#include "avx512f-mask-type.h" + +static unsigned short +EVAL(int_to_ushort, AVX512F_LEN,) (int iVal) +{ + unsigned short sVal; + + if (iVal < 0) + sVal = 0; + else if (iVal > USHRT_MAX) + sVal = USHRT_MAX; + else + sVal = iVal; + + return sVal; +} + +void +CALC (int *src1, int *src2, unsigned short *dst) +{ + int i; + int *ptr; + + for (i = 0; i < DST_SIZE; i++) + { + ptr = (i / 4) % 2 ? src2 : src1; + dst[i] = EVAL(int_to_ushort, AVX512F_LEN,) (ptr[i % 4 + (i / 8) * 4]); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_d) s1, s2; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned short dst_ref[DST_SIZE]; + int i; + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + for (i = 0; i < SRC_SIZE; i++) + { + s1.a[i] = i + 10; + s2.a[i] = i + 15; + } + + res1.x = INTRINSIC (_packus_epi32) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_packus_epi32) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_packus_epi32) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, dst_ref)) + abort (); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-1.c new file mode 100644 index 00000000000..69135cb9bc5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpackuswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask64 mx; +volatile __mmask32 my; +volatile __mmask16 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_packus_epi16 (x, x); + x = _mm512_mask_packus_epi16 (x, mx, x, x); + x = _mm512_maskz_packus_epi16 (mx, x, x); + y = _mm256_mask_packus_epi16 (y, my, y, y); + y = _mm256_maskz_packus_epi16 (my, y, y); + z = _mm_mask_packus_epi16 (z, mz, z, z); + z = _mm_maskz_packus_epi16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-2.c new file mode 100644 index 00000000000..5a8d796fd1c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpackuswb-2.c @@ -0,0 +1,77 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define DST_SIZE (AVX512F_LEN / 8) +#define SRC_SIZE (AVX512F_LEN / 16) + +#include "limits.h" + +#include "avx512f-mask-type.h" + +static unsigned char +EVAL(short_to_uchar, AVX512F_LEN,) (short iVal) +{ + unsigned char sVal; + + if (iVal < 0) + sVal = 0; + else if (iVal > UCHAR_MAX) + sVal = UCHAR_MAX; + else + sVal = iVal; + + return sVal; +} + +void +CALC (short *src1, short *src2, unsigned char *dst) +{ + int i; + short *ptr; + + for (i = 0; i < DST_SIZE; i++) + { + ptr = (i / 8) % 2 ? src2 : src1; + dst[i] = EVAL(short_to_uchar, AVX512F_LEN,) (ptr[i % 8 + (i / 16) * 8]); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned char dst_ref[DST_SIZE]; + int i; + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + for (i = 0; i < SRC_SIZE; i++) + { + s1.a[i] = i + 10; + s2.a[i] = i + 15; + } + + res1.x = INTRINSIC (_packus_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_packus_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_packus_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, dst_ref)) + abort (); + + MASK_MERGE (i_b) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, dst_ref)) + abort (); + + MASK_ZERO (i_b) (dst_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, dst_ref)) + abort (); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-1.c new file mode 100644 index 00000000000..6e106f2bc82 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_add_epi8 (x512, x512); + x512 = _mm512_mask_add_epi8 (x512, m512, x512, x512); + x512 = _mm512_maskz_add_epi8 (m512, x512, x512); + x256 = _mm256_mask_add_epi8 (x256, m256, x256, x256); + x256 = _mm256_maskz_add_epi8 (m256, x256, x256); + x128 = _mm_mask_add_epi8 (x128, m128, x128, x128); + x128 = _mm_maskz_add_epi8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-2.c new file mode 100644 index 00000000000..0419026bbf6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddb-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s1[i] + s2[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_add_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_add_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_add_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-1.c new file mode 100644 index 00000000000..a2352b6e762 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_adds_epi8 (x512, x512); + x512 = _mm512_mask_adds_epi8 (x512, m512, x512, x512); + x512 = _mm512_maskz_adds_epi8 (m512, x512, x512); + x256 = _mm256_mask_adds_epi8 (x256, m256, x256, x256); + x256 = _mm256_maskz_adds_epi8 (m256, x256, x256); + x128 = _mm_mask_adds_epi8 (x128, m128, x128, x128); + x128 = _mm_maskz_adds_epi8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-2.c new file mode 100644 index 00000000000..b379b8b1201 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsb-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] + (int)s2[i]; + if (tmp > 0x7F) tmp = 0x7F; + if (tmp < (char)0x80) tmp = (char)0x80; + r[i] = (char)tmp; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_adds_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_adds_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_adds_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-1.c new file mode 100644 index 00000000000..187b0e97860 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_adds_epi16 (x512, x512); + x512 = _mm512_mask_adds_epi16 (x512, m512, x512, x512); + x512 = _mm512_maskz_adds_epi16 (m512, x512, x512); + x256 = _mm256_mask_adds_epi16 (x256, m256, x256, x256); + x256 = _mm256_maskz_adds_epi16 (m256, x256, x256); + x128 = _mm_mask_adds_epi16 (x128, m128, x128, x128); + x128 = _mm_maskz_adds_epi16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-2.c new file mode 100644 index 00000000000..f07ad9c9e6d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddsw-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] + (int)s2[i]; + if (tmp > 0x7FFF) tmp = 0x7FFF; + if (tmp < (short)0x8000) tmp = (short)0x8000; + r[i] = (short)tmp; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_adds_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_adds_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_adds_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-1.c new file mode 100644 index 00000000000..e1036cb019e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_adds_epu8 (x512, x512); + x512 = _mm512_mask_adds_epu8 (x512, m512, x512, x512); + x512 = _mm512_maskz_adds_epu8 (m512, x512, x512); + x256 = _mm256_mask_adds_epu8 (x256, m256, x256, x256); + x256 = _mm256_maskz_adds_epu8 (m256, x256, x256); + x128 = _mm_mask_adds_epu8 (x128, m128, x128, x128); + x128 = _mm_maskz_adds_epu8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-2.c new file mode 100644 index 00000000000..728968557b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusb-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (unsigned char *r, unsigned char *s1, unsigned char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] + (int)s2[i]; + if (tmp > 0xFF) tmp = 0xFF; + if (tmp < 0) tmp = 0; + r[i] = (unsigned char)tmp; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + src2.a[i] = 3 + 11 * (i % 377) * i; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_adds_epu8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_adds_epu8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_adds_epu8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-1.c new file mode 100644 index 00000000000..95520c629b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_adds_epu16 (x512, x512); + x512 = _mm512_mask_adds_epu16 (x512, m512, x512, x512); + x512 = _mm512_maskz_adds_epu16 (m512, x512, x512); + x256 = _mm256_mask_adds_epu16 (x256, m256, x256, x256); + x256 = _mm256_maskz_adds_epu16 (m256, x256, x256); + x128 = _mm_mask_adds_epu16 (x128, m128, x128, x128); + x128 = _mm_maskz_adds_epu16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-2.c new file mode 100644 index 00000000000..4dad97a2707 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddusw-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (unsigned short *r, unsigned short *s1, unsigned short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] + (int)s2[i]; + if (tmp > 0xFFFF) tmp = 0xFFFF; + if (tmp < 0) tmp = 0; + r[i] = (unsigned short)tmp; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + src2.a[i] = 3 + 11 * (i % 377) * i; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_adds_epu16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_adds_epu16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_adds_epu16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-1.c new file mode 100644 index 00000000000..86029ea6094 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_add_epi16 (x512, x512); + x512 = _mm512_mask_add_epi16 (x512, m512, x512, x512); + x512 = _mm512_maskz_add_epi16 (m512, x512, x512); + x256 = _mm256_mask_add_epi16 (x256, m256, x256, x256); + x256 = _mm256_maskz_add_epi16 (m256, x256, x256); + x128 = _mm_mask_add_epi16 (x128, m128, x128, x128); + x128 = _mm_maskz_add_epi16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-2.c new file mode 100644 index 00000000000..5edc979ed71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpaddw-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s1[i] + s2[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_add_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_add_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_add_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-1.c new file mode 100644 index 00000000000..c609365f89b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpalignr\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_alignr_epi8 (z, z, 10); + z = _mm512_mask_alignr_epi8 (z, m1, z, z, 10); + z = _mm512_maskz_alignr_epi8 (m1, z, z, 10); + y = _mm256_mask_alignr_epi8 (y, m2, y, y, 10); + y = _mm256_maskz_alignr_epi8 (m2, y, y, 10); + x = _mm_mask_alignr_epi8 (x, m3, x, x, 10); + x = _mm_maskz_alignr_epi8 (m3, x, x, 10); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-2.c new file mode 100644 index 00000000000..4de6e05db79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-2.c @@ -0,0 +1,74 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <string.h> + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +#define N 0x3 + +void +CALC (char *src1, char *src2, char * dst) +{ + /* result for EVEX.U1.512 version consists from 4 result block, each of them + * has length of 128 bits. */ + unsigned block_len = 16; + unsigned double_block_len = 32; + unsigned shift = 0; + char buf[double_block_len]; + char *bout = dst; + int bits, i; + + for (bits = 0; bits < AVX512F_LEN; bits += 128) + { + memcpy (&buf[0], src2 + shift, block_len); + memcpy (&buf[block_len], src1 + shift, block_len); + + for (i = 0; i < block_len; i++) + /* shift counts larger than 32 produces zero result. */ + if (N >= 32 || N + i >= 32) + bout[i] = 0; + else + bout[i] = buf[N + i]; + + shift += block_len; + bout += block_len; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_b) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i; + s2.a[i] = i * 2; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_alignr_epi8) (s1.x, s2.x, N); + res2.x = INTRINSIC (_mask_alignr_epi8) (res2.x, mask, s1.x, s2.x, N); + res3.x = INTRINSIC (_maskz_alignr_epi8) (mask, s1.x, s2.x, N); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-1.c new file mode 100644 index 00000000000..266a1bfa012 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x; +volatile __m256i y; +volatile __m512i z; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_avg_epu8 (z, z); + z = _mm512_mask_avg_epu8 (z, m1, z, z); + z = _mm512_maskz_avg_epu8 (m1, z, z); + y = _mm256_mask_avg_epu8 (y, m2, y, y); + y = _mm256_maskz_avg_epu8 (m2, y, y); + x = _mm_mask_avg_epu8 (x, m3, x, x); + x = _mm_maskz_avg_epu8 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-2.c new file mode 100644 index 00000000000..2dabd719478 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgb-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (char *s1, char *s2, char *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + r[i] = ((unsigned char) s1[i] + + (unsigned char) s2[i] + 1) >> 1; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_b) s1, s2, res1, res2 ,res3; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i + 15; + s2.a[i] = i + 14; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_avg_epu8) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_avg_epu8) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_avg_epu8) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-1.c new file mode 100644 index 00000000000..3b00784bbad --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpavgw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x; +volatile __m256i y; +volatile __m512i z; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_avg_epu16 (z, z); + z = _mm512_mask_avg_epu16 (z, m1, z, z); + z = _mm512_maskz_avg_epu16 (m1, z, z); + y = _mm256_mask_avg_epu16 (y, m2, y, y); + y = _mm256_maskz_avg_epu16 (m2, y, y); + x = _mm_mask_avg_epu16 (x, m3, x, x); + x = _mm_maskz_avg_epu16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-2.c new file mode 100644 index 00000000000..51496865d64 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpavgw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s1, short *s2, short *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + r[i] = ((unsigned short) s1[i] + + (unsigned short) s2[i] + 1) >> 1; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2 ,res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i + 15; + s2.a[i] = i + 14; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_avg_epu16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_avg_epu16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_avg_epu16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-1.c new file mode 100644 index 00000000000..d001c27c388 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vpblendmb|vmovdqu8)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmb|vmovdqu8)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmb|vmovdqu8)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __m512i xxx; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_blend_epi8 (m, x, x); + xx = _mm_mask_blend_epi8 (m, xx, xx); + xxx = _mm512_mask_blend_epi8 (m, xxx, xxx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-2.c new file mode 100644 index 00000000000..738093cdb78 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmb-2.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2, MASK_TYPE mask) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = (mask & (1LL << i)) ? s2[i] : s1[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 15 + 46 * i * sign; + src2.a[i] = -22 + i * sign; + sign = sign * -1; + } + + res1.x = INTRINSIC (_mask_blend_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a, mask); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-1.c new file mode 100644 index 00000000000..65431cdea41 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vpblendmw|vmovdqu16)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmw|vmovdqu16)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmw|vmovdqu16)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __m512i xxx; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_blend_epi16 (m, x, x); + xx = _mm_mask_blend_epi16 (m, xx, xx); + xxx = _mm512_mask_blend_epi16 (m, xxx, xxx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-2.c new file mode 100644 index 00000000000..1877e6b9b65 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpblendmw-2.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2, MASK_TYPE mask) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = (mask & (1 << i)) ? s2[i] : s1[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 15 + 3467 * i * sign; + src2.a[i] = -2217 * i * sign; + sign = sign * -1; + } + + res1.x = INTRINSIC (_mask_blend_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a, mask); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-1.c new file mode 100644 index 00000000000..1880105a701 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-1.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile char w; +volatile __mmask64 mx; +volatile __mmask32 my; +volatile __mmask16 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_broadcastb_epi8 (z); + x = _mm512_mask_broadcastb_epi8 (x, mx, z); + x = _mm512_maskz_broadcastb_epi8 (mx, z); + y = _mm256_mask_broadcastb_epi8 (y, my, z); + y = _mm256_maskz_broadcastb_epi8 (my, z); + z = _mm_mask_broadcastb_epi8 (z, mz, z); + z = _mm_maskz_broadcastb_epi8 (mz, z); + + x = _mm512_set1_epi8 (w); + x = _mm512_mask_set1_epi8 (x, mx, w); + x = _mm512_maskz_set1_epi8 (mx, w); + y = _mm256_mask_set1_epi8 (y, my, w); + y = _mm256_maskz_set1_epi8 (my, w); + z = _mm_mask_set1_epi8 (z, mz, w); + z = _mm_maskz_set1_epi8 (mz, w); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-2.c new file mode 100644 index 00000000000..e7f2cab7c41 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastb-2.c @@ -0,0 +1,76 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[0]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3; + UNION_TYPE (128, i_b) src; + MASK_TYPE mask = SIZE | 123; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 16; i++) + { + src.a[i] = 1 + 3 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + CALC (res_ref, src.a); + + if (AVX512F_LEN == 512) + { + res1.x = INTRINSIC (_broadcastb_epi8) (src.x); + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + } + + res2.x = INTRINSIC (_mask_broadcastb_epi8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcastb_epi8) (mask, src.x); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); + + CALC (res_ref, src.a); + + if (AVX512F_LEN == 512) + { + res1.x = INTRINSIC (_set1_epi8) (src.a[0]); + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + } + + res2.x = INTRINSIC (_mask_set1_epi8) (res2.x, mask, src.a[0]); + res3.x = INTRINSIC (_maskz_set1_epi8) (mask, src.a[0]); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-1.c new file mode 100644 index 00000000000..5255f4f0757 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-1.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile short w; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_broadcastw_epi16 (z); + x = _mm512_mask_broadcastw_epi16 (x, mx, z); + x = _mm512_maskz_broadcastw_epi16 (mx, z); + y = _mm256_mask_broadcastw_epi16 (y, my, z); + y = _mm256_maskz_broadcastw_epi16 (my, z); + z = _mm_mask_broadcastw_epi16 (z, mz, z); + z = _mm_maskz_broadcastw_epi16 (mz, z); + + x = _mm512_set1_epi16 (w); + x = _mm512_mask_set1_epi16 (x, mx, w); + x = _mm512_maskz_set1_epi16 (mx, w); + y = _mm256_mask_set1_epi16 (y, my, w); + y = _mm256_maskz_set1_epi16 (my, w); + z = _mm_mask_set1_epi16 (z, mz, w); + z = _mm_maskz_set1_epi16 (mz, w); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-2.c new file mode 100644 index 00000000000..238d358f87a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpbroadcastw-2.c @@ -0,0 +1,76 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[0]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + UNION_TYPE (128, i_w) src; + MASK_TYPE mask = SIZE | 123; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 8; i++) + { + src.a[i] = 1 + 3 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + CALC (res_ref, src.a); + + if (AVX512F_LEN == 512) + { + res1.x = INTRINSIC (_broadcastw_epi16) (src.x); + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + } + + res2.x = INTRINSIC (_mask_broadcastw_epi16) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcastw_epi16) (mask, src.x); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + + CALC (res_ref, src.a); + + if (AVX512F_LEN == 512) + { + res1.x = INTRINSIC (_set1_epi16) (src.a[0]); + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + } + + res2.x = INTRINSIC (_mask_set1_epi16) (res2.x, mask, src.a[0]); + res3.x = INTRINSIC (_maskz_set1_epi16) (mask, src.a[0]); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-1.c new file mode 100644 index 00000000000..6a76a7cd5ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m512i xq; +volatile __m256i x; +volatile __m128i xx; +volatile __mmask16 m; +volatile __mmask32 mm; +volatile __mmask64 mmm; + +void extern +avx512bw_test (void) +{ + mmm = _mm512_cmp_epi8_mask (xq, xq, _MM_CMPINT_GE); + mmm = _mm512_mask_cmp_epi8_mask (m, xq, xq, _MM_CMPINT_NLE); + mm = _mm256_cmp_epi8_mask (x, x, _MM_CMPINT_GT); + mm = _mm256_mask_cmp_epi8_mask (m, x, x, _MM_CMPINT_EQ); + m = _mm_cmp_epi8_mask (xx, xx, _MM_CMPINT_LT); + m = _mm_mask_cmp_epi8_mask (m, xx, xx, _MM_CMPINT_LE); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-2.c new file mode 100644 index 00000000000..8b0c541a902 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpb-2.c @@ -0,0 +1,107 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#if AVX512F_LEN == 512 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 64; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm512_loadu_si512 (s1); \ + source2.x = _mm512_loadu_si512 (s2); \ + dst1 = _mm512_cmp_epi8_mask (source1.x, source2.x, imm);\ + dst2 = _mm512_mask_cmp_epi8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 32; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epi8_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epi8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 16; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epi8_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epi8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +void +TEST () +{ + char s1[64] = {34, 78, 53, 64, + 1, 57, 11, 231, + 14, 45, 71, 75, + 55, 66, 21, 73, + 34, 68, 3, 56, + 1, 57, 111, 241, + 14, 15, 61, 75, + 55, 16, 52, 3, + 34, 78, 53, 64, + 1, 57, 11, 231, + 14, 45, 71, 75, + 45, 66, 21, 73, + 34, 68, 3, 56, + 1, 57, 111, 241, + 14, 15, 61, 75, + 55, 16, 52, 3}; + char s2[64] = {4, 68, 86, 8, + 1, 46, 1, 1, + 45, 67, 36, 3, + 4, 39, 56, 56, + 124, 78, 53, 56, + 1, 46, 1, 12, + 45, 47, 36, 13, + 4, 35, 56, 67, + 4, 68, 86, 8, + 1, 46, 1, 1, + 45, 67, 36, 3, + 4, 39, 56, 56, + 124, 78, 53, 56, + 1, 46, 1, 12, + 45, 47, 36, 13, + 4, 35, 56, 67}; + UNION_TYPE (AVX512F_LEN, i_b) source1, source2; + MASK_TYPE dst1, dst2, dst_ref; + MASK_TYPE mask = MASK_VALUE; + int i; + + CMP(0x00, s1[i] == s2[i]); + CMP(0x01, s1[i] < s2[i]); + CMP(0x02, s1[i] <= s2[i]); + CMP(0x03, 0); + CMP(0x04, s1[i] != s2[i]); + CMP(0x05, s1[i] >= s2[i]); + CMP(0x06, s1[i] > s2[i]); + CMP(0x07, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-1.c new file mode 100644 index 00000000000..732a951a4b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpeq_epi8_mask (x128, x128); + m32 = _mm256_cmpeq_epi8_mask (x256, x256); + m64 = _mm512_cmpeq_epi8_mask (x512, x512); + m16 = _mm_mask_cmpeq_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmpeq_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmpeq_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-2.c new file mode 100644 index 00000000000..aaef6880631 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqb-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-1.c new file mode 100644 index 00000000000..b77203bfb3f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpeq_epi16_mask (x128, x128); + m8 = _mm_mask_cmpeq_epi16_mask (3, x128, x128); + m16 = _mm256_cmpeq_epi16_mask (x256, x256); + m16 = _mm256_mask_cmpeq_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmpeq_epi16_mask (3, x512, x512); + m32 = _mm512_cmpeq_epi16_mask (x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-2.c new file mode 100644 index 00000000000..6103e40760a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpeqw-2.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-1.c new file mode 100644 index 00000000000..1b54de5ec9d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpgt_epi8_mask (x128, x128); + m32 = _mm256_cmpgt_epi8_mask (x256, x256); + m64 = _mm512_cmpgt_epi8_mask (x512, x512); + m16 = _mm_mask_cmpgt_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmpgt_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmpgt_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-2.c new file mode 100644 index 00000000000..1647a17a7bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtb-2.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-1.c new file mode 100644 index 00000000000..0f2671345fe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpgt_epi16_mask (x128, x128); + m16 = _mm256_cmpgt_epi16_mask (x256, x256); + m32 = _mm512_cmpgt_epi16_mask (x512, x512); + m8 = _mm_mask_cmpgt_epi16_mask (3, x128, x128); + m16 = _mm256_mask_cmpgt_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmpgt_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-2.c new file mode 100644 index 00000000000..2c6e8fabf4f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtw-2.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-1.c new file mode 100644 index 00000000000..32117ac721e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m512i xq; +volatile __m256i x; +volatile __m128i xx; +volatile __mmask16 m; +volatile __mmask32 mm; +volatile __mmask64 mmm; + +void extern +avx512bw_test (void) +{ + mmm = _mm512_cmp_epu8_mask (xq, xq, _MM_CMPINT_EQ); + mmm = _mm512_mask_cmp_epu8_mask (m, xq, xq, _MM_CMPINT_LT); + mm = _mm256_cmp_epu8_mask (x, x, _MM_CMPINT_LE); + mm = _mm256_mask_cmp_epu8_mask (m, x, x, _MM_CMPINT_UNUSED); + m = _mm_cmp_epu8_mask (xx, xx, _MM_CMPINT_NE); + m = _mm_mask_cmp_epu8_mask (m, xx, xx, _MM_CMPINT_NLT); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-2.c new file mode 100644 index 00000000000..be288c9b3e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpub-2.c @@ -0,0 +1,107 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#if AVX512F_LEN == 512 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 64; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm512_loadu_si512 (s1); \ + source2.x = _mm512_loadu_si512 (s2); \ + dst1 = _mm512_cmp_epu8_mask (source1.x, source2.x, imm);\ + dst2 = _mm512_mask_cmp_epu8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 32; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epu8_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epu8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 16; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epu8_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epu8_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +void +TEST () +{ + unsigned char s1[64] = {34, 78, 53, 64, + 1, 57, 11, 231, + 14, 45, 71, 75, + 55, 66, 21, 73, + 34, 68, 3, 56, + 1, 57, 111, 241, + 14, 15, 61, 75, + 55, 16, 52, 3, + 34, 78, 53, 64, + 1, 57, 11, 231, + 14, 45, 71, 75, + 55, 66, 21, 73, + 34, 68, 3, 56, + 1, 57, 111, 241, + 14, 15, 61, 75, + 55, 16, 52, 3}; + unsigned char s2[64] = {4, 68, 86, 8, + 1, 46, 1, 1, + 45, 67, 36, 3, + 4, 39, 56, 56, + 124, 78, 53, 56, + 1, 46, 1, 12, + 45, 47, 36, 13, + 4, 35, 56, 67, + 4, 68, 86, 8, + 1, 46, 1, 1, + 45, 67, 36, 3, + 4, 39, 56, 56, + 124, 78, 53, 56, + 1, 46, 1, 12, + 45, 47, 36, 13, + 4, 35, 56, 67}; + UNION_TYPE (AVX512F_LEN, i_b) source1, source2; + MASK_TYPE dst1, dst2, dst_ref; + MASK_TYPE mask = MASK_VALUE; + int i; + + CMP(0x00, s1[i] == s2[i]); + CMP(0x01, s1[i] < s2[i]); + CMP(0x02, s1[i] <= s2[i]); + CMP(0x03, 0); + CMP(0x04, s1[i] != s2[i]); + CMP(0x05, s1[i] >= s2[i]); + CMP(0x06, s1[i] > s2[i]); + CMP(0x07, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-1.c new file mode 100644 index 00000000000..916f01b0fab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m512i xq; +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; +volatile __mmask16 mm; +volatile __mmask32 mmm; + +void extern +avx512bw_test (void) +{ + mmm = _mm512_cmp_epu16_mask (xq, xq, _MM_CMPINT_NE); + mmm = _mm512_mask_cmp_epu16_mask (m, xq, xq, _MM_CMPINT_NLT); + mm = _mm256_cmp_epu16_mask (x, x, _MM_CMPINT_GE); + mm = _mm256_mask_cmp_epu16_mask (m, x, x, _MM_CMPINT_NLE); + m = _mm_cmp_epu16_mask (xx, xx, _MM_CMPINT_GT); + m = _mm_mask_cmp_epu16_mask (m, xx, xx, _MM_CMPINT_EQ); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-2.c new file mode 100644 index 00000000000..587030535af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpuw-2.c @@ -0,0 +1,91 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#if AVX512F_LEN == 512 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 32; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm512_loadu_si512 (s1); \ + source2.x = _mm512_loadu_si512 (s2); \ + dst1 = _mm512_cmp_epu16_mask (source1.x, source2.x, imm);\ + dst2 = _mm512_mask_cmp_epu16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 16; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epu16_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epu16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 8; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epu16_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epu16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +void +TEST () +{ + unsigned short s1[32] = {2134, 6678, 453, 54646, + 231, 5674, 111, 23241, + 12314, 145, 671, 7575, + 23455, 166, 5321, 5673, + 2134, 6678, 453, 54646, + 231, 5674, 111, 23241, + 12314, 145, 671, 7575, + 23455, 166, 5321, 5673}; + unsigned short s2[32] = {41124, 6678, 8653, 856, + 231, 4646, 111, 124, + 2745, 4567, 3676, 123, + 714, 3589, 5683, 5673, + 41124, 6678, 8653, 856, + 231, 4646, 111, 124, + 2745, 4567, 3676, 123, + 714, 3589, 5683, 5673}; + UNION_TYPE (AVX512F_LEN, i_w) source1, source2; + MASK_TYPE dst1, dst2, dst_ref; + MASK_TYPE mask = MASK_VALUE; + int i; + + CMP(0x00, s1[i] == s2[i]); + CMP(0x01, s1[i] < s2[i]); + CMP(0x02, s1[i] <= s2[i]); + CMP(0x03, 0); + CMP(0x04, s1[i] != s2[i]); + CMP(0x05, s1[i] >= s2[i]); + CMP(0x06, s1[i] > s2[i]); + CMP(0x07, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-1.c new file mode 100644 index 00000000000..a506dc12e0a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m512i xq; +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; +volatile __mmask16 mm; +volatile __mmask32 mmm; + +void extern +avx512bw_test (void) +{ + mmm = _mm512_cmp_epi16_mask (xq, xq, _MM_CMPINT_GT); + mmm = _mm512_mask_cmp_epi16_mask (m, xq, xq, _MM_CMPINT_EQ); + mm = _mm256_cmp_epi16_mask (x, x, _MM_CMPINT_EQ); + mm = _mm256_mask_cmp_epi16_mask (m, x, x, _MM_CMPINT_LT); + m = _mm_cmp_epi16_mask (xx, xx, _MM_CMPINT_LE); + m = _mm_mask_cmp_epi16_mask (m, xx, xx, _MM_CMPINT_UNUSED); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-2.c new file mode 100644 index 00000000000..54c3588238b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpw-2.c @@ -0,0 +1,91 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#if AVX512F_LEN == 512 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 32; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm512_loadu_si512 (s1); \ + source2.x = _mm512_loadu_si512 (s2); \ + dst1 = _mm512_cmp_epi16_mask (source1.x, source2.x, imm);\ + dst2 = _mm512_mask_cmp_epi16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 16; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epi16_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epi16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 8; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epi16_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epi16_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +void +TEST () +{ + short s1[32] = {2134, 6678, 453, 54646, + 231, 5674, 111, 23241, + 12314, 145, 671, 7575, + 23455, 166, 5321, 5673, + 2134, 6678, 453, 54646, + 231, 5674, 111, 23241, + 12314, 145, 671, 7575, + 23455, 166, 5321, 5673}; + short s2[32] = {41124, 6678, 8653, 856, + 231, 4646, 111, 124, + 2745, 4567, 3676, 123, + 714, 3589, 5683, 5673, + 41124, 6678, 8653, 856, + 231, 4646, 111, 124, + 2745, 4567, 3676, 123, + 714, 3589, 5683, 5673}; + UNION_TYPE (AVX512F_LEN, i_w) source1, source2; + MASK_TYPE dst1, dst2, dst_ref; + MASK_TYPE mask = MASK_VALUE; + int i; + + CMP(0x00, s1[i] == s2[i]); + CMP(0x01, s1[i] < s2[i]); + CMP(0x02, s1[i] <= s2[i]); + CMP(0x03, 0); + CMP(0x04, s1[i] != s2[i]); + CMP(0x05, s1[i] >= s2[i]); + CMP(0x06, s1[i] > s2[i]); + CMP(0x07, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-1.c new file mode 100644 index 00000000000..275fef47c2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermi2w\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2w\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2w\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x3; +volatile __m256i x2; +volatile __m128i x1; +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m3; +volatile __mmask16 m2; +volatile __mmask8 m1; + +void extern +avx512bw_test (void) +{ + x3 = _mm512_mask2_permutex2var_epi16 (x3, z, m3, x3); + x2 = _mm256_mask2_permutex2var_epi16 (x2, y, m2, x2); + x1 = _mm_mask2_permutex2var_epi16 (x1, x, m1, x1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-2.c new file mode 100644 index 00000000000..52d7ac274fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermi2w-2.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "math.h" +#include "values.h" +#include "avx512f-mask-type.h" + +#define NUM 32 + +void +CALC (short *dst, short *src1, short *ind, short *src2) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + unsigned long long offset = ind[i] & (SIZE - 1); + unsigned long long cond = ind[i] & SIZE; + + dst[i] = cond ? src2[offset] : src1[offset]; + } +} + +void +TEST (void) +{ + int i, j; + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res, ind; + short res_ref[SIZE]; + + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < NUM; i++) + { + for (j = 0; j < SIZE; j++) + { + ind.a[j] = DEFAULT_VALUE; + s1.a[j] = i * 2 * j + 1; + s2.a[j] = i * 2 * j; + + res.a[j] = DEFAULT_VALUE; + } + + CALC (res_ref, s1.a, ind.a, s2.a); + + res.x = + INTRINSIC (_mask2_permutex2var_epi16) (s1.x, ind.x, mask, + s2.x); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res, res_ref)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c new file mode 100644 index 00000000000..1596695251c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } * +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2w\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x3; +volatile __m256i x2; +volatile __m128i x1; +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m3; +volatile __mmask16 m2; +volatile __mmask8 m1; + +void extern +avx512bw_test (void) +{ + x3 = _mm512_permutex2var_epi16 (x3, z, x3); + x3 = _mm512_mask_permutex2var_epi16 (x3, m3, z, x3); + x3 = _mm512_maskz_permutex2var_epi16 (m3, x3, z, x3); + x2 = _mm256_permutex2var_epi16 (x2, y, x2); + x2 = _mm256_mask_permutex2var_epi16 (x2, m2, y, x2); + x2 = _mm256_maskz_permutex2var_epi16 (m2, x2, y, x2); + x1 = _mm_permutex2var_epi16 (x1, x, x1); + x1 = _mm_mask_permutex2var_epi16 (x1, m1, x, x1); + x1 = _mm_maskz_permutex2var_epi16 (m1, x1, x, x1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-2.c new file mode 100644 index 00000000000..58d75f4b8ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-2.c @@ -0,0 +1,70 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "math.h" +#include "values.h" +#include "avx512f-mask-type.h" + +#define NUM 32 + +void +CALC (short *dst, short *src1, short *ind, short *src2) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + unsigned long long offset = ind[i] & (SIZE - 1); + unsigned long long cond = ind[i] & SIZE; + + dst[i] = cond ? src2[offset] : src1[offset]; + } +} + +void +TEST (void) +{ + int i, j; + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3, ind; + short res_ref[SIZE]; + + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < NUM; i++) + { + for (j = 0; j < SIZE; j++) + { + ind.a[j] = i * (j << 1); + s1.a[j] = DEFAULT_VALUE; + s2.a[j] = 1.5 * i * 2 * j; + + res1.a[j] = DEFAULT_VALUE; + res2.a[j] = DEFAULT_VALUE; + res3.a[j] = DEFAULT_VALUE; + } + + CALC (res_ref, s1.a, ind.a, s2.a); + + res1.x = INTRINSIC (_permutex2var_epi16) (s1.x, ind.x, s2.x); + res2.x = + INTRINSIC (_mask_permutex2var_epi16) (s1.x, mask, ind.x, s2.x); + res3.x = + INTRINSIC (_maskz_permutex2var_epi16) (mask, s1.x, ind.x, + s2.x); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-1.c new file mode 100644 index 00000000000..4d8f356ddc8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i x3; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + x1 = _mm512_permutexvar_epi16 (x1, x1); + x1 = _mm512_maskz_permutexvar_epi16 (m1, x1, x1); + x1 = _mm512_mask_permutexvar_epi16 (x1, m1, x1, x1); + x2 = _mm256_permutexvar_epi16 (x2, x2); + x2 = _mm256_maskz_permutexvar_epi16 (m2, x2, x2); + x2 = _mm256_mask_permutexvar_epi16 (x2, m2, x2, x2); + x3 = _mm_permutexvar_epi16 (x3, x3); + x3 = _mm_maskz_permutexvar_epi16 (m3, x3, x3); + x3 = _mm_mask_permutexvar_epi16 (x3, m3, x3, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-2.c new file mode 100644 index 00000000000..42bedd9f89a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermw-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *src, short *ind, short *res) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + res[i] = src[ind[i] & (SIZE - 1)]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3; + short res_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * i * i; + s2.a[i] = i + 20; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_permutexvar_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_permutexvar_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_permutexvar_epi16) (mask, s1.x, s2.x); + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w)(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w)(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-1.c new file mode 100644 index 00000000000..f4f41b58df7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddubsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i xq; +volatile __m128i xw; + +void extern +avx512bw_test (void) +{ + x = _mm512_maddubs_epi16 (x, x); + x = _mm512_mask_maddubs_epi16 (x, 2, x, x); + x = _mm512_maskz_maddubs_epi16 (2, x, x); + xq = _mm256_mask_maddubs_epi16 (xq, 2, xq, xq); + xq = _mm256_maskz_maddubs_epi16 (2, xq, xq); + xw = _mm_mask_maddubs_epi16 (xw, 2, xw, xw); + xw = _mm_maskz_maddubs_epi16 (2, xw, xw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-2.c new file mode 100644 index 00000000000..e3bd83fee8a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-2.c @@ -0,0 +1,66 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#include <values.h> +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *i1, short *i2, short *r) +{ + unsigned char *ub1 = (unsigned char *) i1; + char *sb2 = (char *) i2; + short *sout = (short *) r; + int t0; + int i; + + for (i = 0; i < SIZE; i++) + { + t0 = ((int) ub1[2 * i] * (int) sb2[2 * i] + + (int) ub1[2 * i + 1] * (int) sb2[2 * i + 1]); + if (t0 > (int) 0x7fff) + sout[i] = 0x7fff; + else if (t0 < (int) 0xffff8000) + sout[i] = 0x8000; + else + sout[i] = (short) t0; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3; + short res_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i; + int fail = 0; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * 17 + i; + s2.a[i] = i * -17 + i * 2; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_maddubs_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_maddubs_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_maddubs_epi16) (mask, s1.x, s2.x); + + CALC(s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-1.c new file mode 100644 index 00000000000..42e20a6799c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaddwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i xq; +volatile __m128i xw; + +void extern +avx512bw_test (void) +{ + x = _mm512_madd_epi16 (x, x); + x = _mm512_mask_madd_epi16 (x, 2, x, x); + x = _mm512_maskz_madd_epi16 (2, x, x); + xq = _mm256_mask_madd_epi16 (xq, 2, xq, xq); + xq = _mm256_maskz_madd_epi16 (2, xq, xq); + xw = _mm_mask_madd_epi16 (xw, 2, xw, xw); + xw = _mm_maskz_madd_epi16 (2, xw, xw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-2.c new file mode 100644 index 00000000000..fb6ef8e1b94 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-2.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#include <math.h> +#include <values.h> +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +void +CALC (short *i1, short *i2, int *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + r[i] = ((int) i1[2 * i] * (int) i2[2 * i] + + (int) i1[2 * i + 1] * (int) i2[2 * i + 1]); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2; + UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3; + int res_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i; + + for (i = 0; i < SIZE * 2; i++) + { + s1.a[i] = i * 17 + i; + s2.a[i] = i * -17 + i * 2; + } + + for (i = 0; i < SIZE; i++) + { + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_madd_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_madd_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_madd_epi16) (mask, s1.x, s2.x); + + CALC(s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) + abort (); + + MASK_MERGE (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) + abort (); + + MASK_ZERO (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-1.c new file mode 100644 index 00000000000..ad8d9095a8d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_max_epi8 (x, x); + x = _mm512_mask_max_epi8 (x, mx, x, x); + x = _mm512_maskz_max_epi8 (mx, x, x); + y = _mm256_mask_max_epi8 (y, my, y, y); + y = _mm256_maskz_max_epi8 (my, y, y); + z = _mm_mask_max_epi8 (z, mz, z, z); + z = _mm_maskz_max_epi8 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-2.c new file mode 100644 index 00000000000..856d1c4c9b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsb-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) + +#include "avx512f-mask-type.h" + +CALC (char *src1, char *src2, char *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] > src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * sign; + src2.a[i] = (i + 20) * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_max_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_max_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_max_epi8) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-1.c new file mode 100644 index 00000000000..237b9b8b287 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_max_epi16 (x, x); + x = _mm512_mask_max_epi16 (x, mx, x, x); + x = _mm512_maskz_max_epi16 (mx, x, x); + y = _mm256_mask_max_epi16 (y, my, y, y); + y = _mm256_maskz_max_epi16 (my, y, y); + z = _mm_mask_max_epi16 (z, mz, z, z); + z = _mm_maskz_max_epi16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-2.c new file mode 100644 index 00000000000..0469fe53a8c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxsw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) + +#include "avx512f-mask-type.h" + +CALC (short *src1, short *src2, short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] > src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * sign; + src2.a[i] = (i + 20) * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_max_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_max_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_max_epi16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-1.c new file mode 100644 index 00000000000..87728891557 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_max_epu8 (x, x); + x = _mm512_mask_max_epu8 (x, mx, x, x); + x = _mm512_maskz_max_epu8 (mx, x, x); + y = _mm256_mask_max_epu8 (y, my, y, y); + y = _mm256_maskz_max_epu8 (my, y, y); + z = _mm_mask_max_epu8 (z, mz, z, z); + z = _mm_maskz_max_epu8 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-2.c new file mode 100644 index 00000000000..bccf5b8d4e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxub-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) + +#include "avx512f-mask-type.h" + +CALC (unsigned char *src1, unsigned char *src2, + unsigned char *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] > src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i; + src2.a[i] = i + 20; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_max_epu8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_max_epu8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_max_epu8) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-1.c new file mode 100644 index 00000000000..a0dc29f2293 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_max_epu16 (x, x); + x = _mm512_mask_max_epu16 (x, mx, x, x); + x = _mm512_maskz_max_epu16 (mx, x, x); + y = _mm256_mask_max_epu16 (y, my, y, y); + y = _mm256_maskz_max_epu16 (my, y, y); + z = _mm_mask_max_epu16 (z, mz, z, z); + z = _mm_maskz_max_epu16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-2.c new file mode 100644 index 00000000000..b9af22cc55c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaxuw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) + +#include "avx512f-mask-type.h" + +CALC (unsigned short *src1, unsigned short *src2, + unsigned short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] > src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i; + src2.a[i] = i + 20; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_max_epu16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_max_epu16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_max_epu16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-1.c new file mode 100644 index 00000000000..091607373b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_min_epi8 (x, x); + x = _mm512_mask_min_epi8 (x, mx, x, x); + x = _mm512_maskz_min_epi8 (mx, x, x); + y = _mm256_mask_min_epi8 (y, my, y, y); + y = _mm256_maskz_min_epi8 (my, y, y); + z = _mm_mask_min_epi8 (z, mz, z, z); + z = _mm_maskz_min_epi8 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-2.c new file mode 100644 index 00000000000..aa2509cfc9f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsb-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) + +#include "avx512f-mask-type.h" + +CALC (char *src1, char *src2, char *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] < src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * sign; + src2.a[i] = (i + 20) * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_min_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_min_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_min_epi8) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-1.c new file mode 100644 index 00000000000..e7127520781 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_min_epi16 (x, x); + x = _mm512_mask_min_epi16 (x, mx, x, x); + x = _mm512_maskz_min_epi16 (mx, x, x); + y = _mm256_mask_min_epi16 (y, my, y, y); + y = _mm256_maskz_min_epi16 (my, y, y); + z = _mm_mask_min_epi16 (z, mz, z, z); + z = _mm_maskz_min_epi16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-2.c new file mode 100644 index 00000000000..1161558751b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminsw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) + +#include "avx512f-mask-type.h" + +CALC (short *src1, short *src2, short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] < src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * sign; + src2.a[i] = (i + 20) * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_min_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_min_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_min_epi16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-1.c new file mode 100644 index 00000000000..6e36e344558 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_min_epu8 (x, x); + x = _mm512_mask_min_epu8 (x, mx, x, x); + x = _mm512_maskz_min_epu8 (mx, x, x); + y = _mm256_mask_min_epu8 (y, my, y, y); + y = _mm256_maskz_min_epu8 (my, y, y); + z = _mm_mask_min_epu8 (z, mz, z, z); + z = _mm_maskz_min_epu8 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-2.c new file mode 100644 index 00000000000..bbf2e1996eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminub-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) + +#include "avx512f-mask-type.h" + +CALC (unsigned char *src1, unsigned char *src2, + unsigned char *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] < src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i; + src2.a[i] = i + 20; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_min_epu8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_min_epu8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_min_epu8) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-1.c new file mode 100644 index 00000000000..4ca15b38abb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask32 mx; +volatile __mmask16 my; +volatile __mmask8 mz; + +void extern +avx512bw_test (void) +{ + x = _mm512_min_epu16 (x, x); + x = _mm512_mask_min_epu16 (x, mx, x, x); + x = _mm512_maskz_min_epu16 (mx, x, x); + y = _mm256_mask_min_epu16 (y, my, y, y); + y = _mm256_maskz_min_epu16 (my, y, y); + z = _mm_mask_min_epu16 (z, mz, z, z); + z = _mm_maskz_min_epu16 (mz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-2.c new file mode 100644 index 00000000000..9ee63b93776 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpminuw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) + +#include "avx512f-mask-type.h" + +CALC (unsigned short *src1, unsigned short *src2, + unsigned short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] < src2[i] ? src1[i] : src2[i]; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i; + src2.a[i] = i + 20; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_min_epu16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_min_epu16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_min_epu16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-1.c new file mode 100644 index 00000000000..48284783bef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovb2m\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovb2m\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovb2m\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m64; +volatile __mmask32 m32; +volatile __mmask16 m16; + +void extern +avx512bw_test (void) +{ + m16 = _mm_movepi8_mask (x128); + m32 = _mm256_movepi8_mask (x256); + m64 = _mm512_movepi8_mask (x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-2.c new file mode 100644 index 00000000000..5bed63ebd75 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovb2m-2.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, char *s1) +{ + int i; + MASK_TYPE res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >> 7) + res = res | (one << i); + + *r = res; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) src; + MASK_TYPE res, res_ref = 0; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 2 * i * sign; + sign = sign * -1; + } + + res = INTRINSIC (_movepi8_mask) (src.x); + + CALC (&res_ref, src.a); + + if (res_ref != res) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-1.c new file mode 100644 index 00000000000..a832479dc4f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovm2b\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%xmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2b\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%ymm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2b\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%zmm\[0-9\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m64; +volatile __mmask32 m32; +volatile __mmask16 m16; + +void extern +avx512bw_test (void) +{ + x128 = _mm_movm_epi8 (m16); + x256 = _mm256_movm_epi8 (m32); + x512 = _mm512_movm_epi8 (m64); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-2.c new file mode 100644 index 00000000000..e054bf78365 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2b-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, MASK_TYPE s) +{ + int i; + char all_ones = 0xff; + + for (i = 0; i < SIZE; i++) + r[i] = ((s >> i) & 1) ? all_ones : 0; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) res, res_ref; + MASK_TYPE src = (MASK_TYPE) 0x1111abeffeec1234; + + res.x = INTRINSIC (_movm_epi8) (src); + + CALC (res_ref.a, src); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res, res_ref.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-1.c new file mode 100644 index 00000000000..d356d5e89a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovm2w\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%xmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2w\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%ymm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2w\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%zmm\[0-9\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m32; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512bw_test (void) +{ + x128 = _mm_movm_epi16 (m8); + x256 = _mm256_movm_epi16 (m16); + x512 = _mm512_movm_epi16 (m32); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-2.c new file mode 100644 index 00000000000..24b0737bf3d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovm2w-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, MASK_TYPE s) +{ + int i; + short all_ones = 0xffff; + + for (i = 0; i < SIZE; i++) + r[i] = ((s >> i) & 1) ? all_ones : 0; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) res, res_ref; + MASK_TYPE src = (MASK_TYPE) 0x1111abc2; + + res.x = INTRINSIC (_movm_epi16) (src); + + CALC (res_ref.a, src); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res, res_ref.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-1.c new file mode 100644 index 00000000000..ea02205b069 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __m512i u; +volatile __mmask8 m1; +volatile __mmask16 m2; +volatile __mmask32 m3; + +void extern +avx512bw_test (void) +{ + z = _mm_cvtsepi16_epi8 (x); + z = _mm_mask_cvtsepi16_epi8 (z, m1, x); + z = _mm_maskz_cvtsepi16_epi8 (m1, x); + z = _mm256_cvtsepi16_epi8 (y); + z = _mm256_mask_cvtsepi16_epi8 (z, m2, y); + z = _mm256_maskz_cvtsepi16_epi8 (m2, y); + y = _mm512_cvtsepi16_epi8 (u); + y = _mm512_mask_cvtsepi16_epi8 (y, m3, u); + y = _mm512_maskz_cvtsepi16_epi8 (m3, u); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-2.c new file mode 100644 index 00000000000..88d1ee101dc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-2.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#define SIZE_HALF (AVX512F_LEN_HALF / 8) +#include "avx512f-mask-type.h" +#include <limits.h> + +CALC (char *r, short *s) +{ + int i; + for (i = 0; i < SIZE_HALF; i++) + { + if (s[i] < CHAR_MIN) + r[i] = CHAR_MIN; + else if (s[i] > CHAR_MAX) + r[i] = CHAR_MAX; + else + r[i] = s[i]; + r[i] = (i < SIZE) ? r[i] : 0; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN_HALF, i_b) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_w) src; + MASK_TYPE mask = MASK_VALUE; + char res_ref[32]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 1 + 34 * i * sign; + sign = sign * -1; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtsepi16_epi8) (src.x); + res2.x = INTRINSIC (_mask_cvtsepi16_epi8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvtsepi16_epi8) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-1.c new file mode 100644 index 00000000000..78be054595e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i res1; +volatile __m256i s1, res2; +volatile __m128i s2, res3; +volatile __mmask32 m32; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512bw_test (void) +{ + res1 = _mm512_cvtepi8_epi16 (s1); + + res1 = _mm512_mask_cvtepi8_epi16 (res1, m32, s1); + res2 = _mm256_mask_cvtepi8_epi16 (res2, m16, s2); + res3 = _mm_mask_cvtepi8_epi16 (res3, m8, s2); + + res1 = _mm512_maskz_cvtepi8_epi16 (m32, s1); + res2 = _mm256_maskz_cvtepi8_epi16 (m16, s2); + res3 = _mm_maskz_cvtepi8_epi16 (m8, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-2.c new file mode 100644 index 00000000000..4cc44053068 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovsxbw-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SRC_SIZE (AVX512F_LEN_HALF / 8) +#define DST_SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (char *s, short *r) +{ + int i; + + for (i = 0; i < DST_SIZE; i++) + { + r[i] = (short) s[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN_HALF, i_b) s; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[DST_SIZE]; + int i, sign = 1; + + for (i = 0; i < SRC_SIZE; i++) + { + s.a[i] = 8 * i * sign; + sign = -sign; + } + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_cvtepi8_epi16) (s.x); + res2.x = INTRINSIC (_mask_cvtepi8_epi16) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepi8_epi16) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-1.c new file mode 100644 index 00000000000..03fd07bea63 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovuswb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __m512i u; +volatile __mmask8 m1; +volatile __mmask16 m2; +volatile __mmask32 m3; + +void extern +avx512bw_test (void) +{ + z = _mm_cvtusepi16_epi8 (x); + z = _mm_mask_cvtusepi16_epi8 (z, m1, x); + z = _mm_maskz_cvtusepi16_epi8 (m1, x); + z = _mm256_cvtusepi16_epi8 (y); + z = _mm256_mask_cvtusepi16_epi8 (z, m2, y); + z = _mm256_maskz_cvtusepi16_epi8 (m2, y); + y = _mm512_cvtusepi16_epi8 (u); + y = _mm512_mask_cvtusepi16_epi8 (y, m3, u); + y = _mm512_maskz_cvtusepi16_epi8 (m3, u); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-2.c new file mode 100644 index 00000000000..a25dac3d699 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#define SIZE_HALF (AVX512F_LEN_HALF / 8) +#include "avx512f-mask-type.h" +#include <limits.h> + +CALC (unsigned char *r, unsigned short *s) +{ + int i; + for (i = 0; i < SIZE_HALF; i++) + { + r[i] = (s[i] > UCHAR_MAX) ? UCHAR_MAX : s[i]; + r[i] = (i < SIZE) ? r[i] : 0; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN_HALF, i_b) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_w) src; + MASK_TYPE mask = MASK_VALUE; + unsigned char res_ref[32]; + + for (i = 0; i < SIZE; i++) + { + src.a[i] = 1 + 34 * i; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtusepi16_epi8) (src.x); + res2.x = INTRINSIC (_mask_cvtusepi16_epi8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvtusepi16_epi8) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-1.c new file mode 100644 index 00000000000..31a64ffc0d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovw2m\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovw2m\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovw2m\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_movepi16_mask (x128); + m16 = _mm256_movepi16_mask (x256); + m32 = _mm512_movepi16_mask (x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-2.c new file mode 100644 index 00000000000..1c8ae02beb2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovw2m-2.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, short *s1) +{ + int i; + MASK_TYPE res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >> 15) + res = res | (one << i); + + *r = res; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) src; + MASK_TYPE res, res_ref = 0; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 2 * i * sign; + sign = sign * -1; + } + + res = INTRINSIC (_movepi16_mask) (src.x); + + CALC (&res_ref, src.a); + + if (res_ref != res) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-1.c new file mode 100644 index 00000000000..115a54747f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovwb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __m512i u; +volatile __mmask8 m1; +volatile __mmask16 m2; +volatile __mmask32 m3; + +void extern +avx512bw_test (void) +{ + z = _mm_cvtepi16_epi8 (x); + z = _mm_mask_cvtepi16_epi8 (z, m1, x); + z = _mm_maskz_cvtepi16_epi8 (m1, x); + z = _mm256_cvtepi16_epi8 (y); + z = _mm256_mask_cvtepi16_epi8 (z, m2, y); + z = _mm256_maskz_cvtepi16_epi8 (m2, y); + y = _mm512_cvtepi16_epi8 (u); + y = _mm512_mask_cvtepi16_epi8 (y, m3, u); + y = _mm512_maskz_cvtepi16_epi8 (m3, u); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-2.c new file mode 100644 index 00000000000..e923d6f5b9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#define SIZE_HALF (AVX512F_LEN_HALF / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, short *s) +{ + int i; + for (i = 0; i < SIZE_HALF; i++) + { + r[i] = (i < SIZE) ? (char) s[i] : 0; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN_HALF, i_b) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_w) src; + MASK_TYPE mask = MASK_VALUE; + char res_ref[32]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 1 + 34 * i * sign; + sign = sign * -1; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtepi16_epi8) (src.x); + res2.x = INTRINSIC (_mask_cvtepi16_epi8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvtepi16_epi8) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-1.c new file mode 100644 index 00000000000..691b9b70e2c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i res1; +volatile __m256i s1, res2; +volatile __m128i s2, res3; +volatile __mmask32 m32; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512bw_test (void) +{ + res1 = _mm512_cvtepu8_epi16 (s1); + + res1 = _mm512_mask_cvtepu8_epi16 (res1, m32, s1); + res2 = _mm256_mask_cvtepu8_epi16 (res2, m16, s2); + res3 = _mm_mask_cvtepu8_epi16 (res3, m8, s2); + + res1 = _mm512_maskz_cvtepu8_epi16 (m32, s1); + res2 = _mm256_maskz_cvtepu8_epi16 (m16, s2); + res3 = _mm_maskz_cvtepu8_epi16 (m8, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-2.c new file mode 100644 index 00000000000..7048147e743 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmovzxbw-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SRC_SIZE (AVX512F_LEN_HALF / 8) +#define DST_SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (unsigned char *s, short *r) +{ + int i; + + for (i = 0; i < DST_SIZE; i++) + { + r[i] = s[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN_HALF, i_b) s; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[DST_SIZE]; + int i; + + for (i = 0; i < SRC_SIZE; i++) + { + s.a[i] = 16 * i; + } + + for (i = 0; i < DST_SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_cvtepu8_epi16) (s.x); + res2.x = INTRINSIC (_mask_cvtepu8_epi16) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepu8_epi16) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, DST_SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-1.c new file mode 100644 index 00000000000..066da24dfae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhrsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x, y, z; +volatile __m256i xq, yq, zq; +volatile __m128i xw, yw, zw; + +void extern +avx512bw_test (void) +{ + x = _mm512_mulhrs_epi16 (y, z); + x = _mm512_mask_mulhrs_epi16 (x, 2, y, z); + x = _mm512_maskz_mulhrs_epi16 (2, y, z); + xq = _mm256_mask_mulhrs_epi16 (xq, 2, yq, zq); + xq = _mm256_maskz_mulhrs_epi16 (2, yq, zq); + xw = _mm_mask_mulhrs_epi16 (xw, 2, yw, zw); + xw = _mm_maskz_mulhrs_epi16 (2, yw, zw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-2.c new file mode 100644 index 00000000000..4ae2f36f73b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhrsw-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *src1, short *src2, short *dst) +{ + int i, t0; + + for (i = 0; i < SIZE; i++) + { + t0 = (((int) src1[i] * (int) src2[i]) >> 14) + 1; + dst[i] = (short) (t0 >> 1); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, dst1, dst2, dst3; + short dst_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i, sign = -1; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i % 2; + src2.a[i] = i * sign; + dst2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + dst1.x = INTRINSIC (_mulhrs_epi16) (src1.x, src2.x); + dst2.x = + INTRINSIC (_mask_mulhrs_epi16) (dst2.x, mask, src1.x, src2.x); + dst3.x = INTRINSIC (_maskz_mulhrs_epi16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (dst1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-1.c new file mode 100644 index 00000000000..4ffda936549 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x, y, z; +volatile __m256i xq, yq, zq; +volatile __m128i xw, yw, zw; + +void extern +avx512bw_test (void) +{ + x = _mm512_mulhi_epu16 (y, z); + x = _mm512_mask_mulhi_epu16 (x, 2, y, z); + x = _mm512_maskz_mulhi_epu16 (2, y, z); + xq = _mm256_mask_mulhi_epu16 (xq, 2, yq, zq); + xq = _mm256_maskz_mulhi_epu16 (2, yq, zq); + xw = _mm_mask_mulhi_epu16 (xw, 2, yw, zw); + xw = _mm_maskz_mulhi_epu16 (2, yw, zw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-2.c new file mode 100644 index 00000000000..512940a2765 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhuw-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *src1, short *src2, short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = (src1[i] * src2[i]) >> 16; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, dst1, dst2, dst3; + short dst_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i, sign = -1; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i % 2; + src2.a[i] = i * sign; + dst2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + dst1.x = INTRINSIC (_mulhi_epu16) (src1.x, src2.x); + dst2.x = + INTRINSIC (_mask_mulhi_epu16) (dst2.x, mask, src1.x, src2.x); + dst3.x = INTRINSIC (_maskz_mulhi_epu16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (dst1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-1.c new file mode 100644 index 00000000000..70c2f561bda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulhw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x, y, z; +volatile __m256i xq, yq, zq; +volatile __m128i xw, yw, zw; + +void extern +avx512bw_test (void) +{ + x = _mm512_mulhi_epi16 (y, z); + x = _mm512_mask_mulhi_epi16 (x, 2, y, z); + x = _mm512_maskz_mulhi_epi16 (2, y, z); + xq = _mm256_mask_mulhi_epi16 (xq, 2, yq, zq); + xq = _mm256_maskz_mulhi_epi16 (2, yq, zq); + xw = _mm_mask_mulhi_epi16 (xw, 2, yw, zw); + xw = _mm_maskz_mulhi_epi16 (2, yw, zw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-2.c new file mode 100644 index 00000000000..d87932d304e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmulhw-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *src1, short *src2, short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = (src1[i] * src2[i]) >> 16; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, dst1, dst2, dst3; + short dst_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i, sign = -1; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i % 2; + src2.a[i] = i * sign; + dst2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + dst1.x = INTRINSIC (_mulhi_epi16) (src1.x, src2.x); + dst2.x = + INTRINSIC (_mask_mulhi_epi16) (dst2.x, mask, src1.x, src2.x); + dst3.x = INTRINSIC (_maskz_mulhi_epi16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (dst1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-1.c new file mode 100644 index 00000000000..1d27e88a936 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x, y, z; +volatile __m256i xq, yq, zq; +volatile __m128i xw, yw, zw; + +void extern +avx512bw_test (void) +{ + x = _mm512_mullo_epi16 (y, z); + x = _mm512_mask_mullo_epi16 (x, 3, y, z); + x = _mm512_maskz_mullo_epi16 (3, y, z); + xq = _mm256_mask_mullo_epi16 (xq, 3, yq, zq); + xq = _mm256_maskz_mullo_epi16 (3, yq, zq); + xw = _mm_mask_mullo_epi16 (xw, 3, yw, zw); + xw = _mm_maskz_mullo_epi16 (3, yw, zw); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-2.c new file mode 100644 index 00000000000..603882330b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmullw-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *src1, short *src2, short *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = (short) ((int) src1[i] * (int) src2[i]); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) src1, src2, dst1, dst2, dst3; + short dst_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * sign; + src2.a[i] = i + 20 * sign; + sign = -sign; + dst2.a[i] = DEFAULT_VALUE; + } + + dst1.x = INTRINSIC (_mullo_epi16) (src1.x, src2.x); + dst2.x = INTRINSIC (_mask_mullo_epi16) (dst2.x, mask, src1.x, src2.x); + dst3.x = INTRINSIC (_maskz_mullo_epi16) (mask, src1.x, src2.x); + + CALC (src1.a, src2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (dst1, dst_ref)) + abort (); + + MASK_MERGE (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst2, dst_ref)) + abort (); + + MASK_ZERO (i_w) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (dst3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-1.c new file mode 100644 index 00000000000..200ec8957f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_shuffle_epi8 (z, z); + z = _mm512_mask_shuffle_epi8 (z, m1, z, z); + z = _mm512_maskz_shuffle_epi8 (m1, z, z); + y = _mm256_mask_shuffle_epi8 (y, m2, y, y); + y = _mm256_maskz_shuffle_epi8 (m2, y, y); + x = _mm_mask_shuffle_epi8 (x, m3, x, x); + x = _mm_maskz_shuffle_epi8 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-2.c new file mode 100644 index 00000000000..6b43dcfb744 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufb-2.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (char *s1, char *s2, char *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + if (s2[i] < 0) + r[i] = 0; + else + r[i] = s1[(s2[i] & 0xf) + 16 * (i / 16)]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_b) s1, s2, res1, res2, res3; + char res_ref[SIZE]; + int i, sign = 1; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * i * sign; + s2.a[i] = 179 - i; + res1.a[i] = DEFAULT_VALUE; + res2.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_shuffle_epi8) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_shuffle_epi8) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_shuffle_epi8) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-1.c new file mode 100644 index 00000000000..66de86451dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufhw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_shufflehi_epi16 (z, _MM_PERM_AADB); + z = _mm512_mask_shufflehi_epi16 (z, m1, z, _MM_PERM_AADB); + z = _mm512_maskz_shufflehi_epi16 (m1, z, _MM_PERM_AADB); + y = _mm256_mask_shufflehi_epi16 (y, m2, y, _MM_PERM_AADB); + y = _mm256_maskz_shufflehi_epi16 (m2, y, _MM_PERM_AADB); + x = _mm_mask_shufflehi_epi16 (x, m3, x, _MM_PERM_AADB); + x = _mm_maskz_shufflehi_epi16 (m3, x, _MM_PERM_AADB); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-2.c new file mode 100644 index 00000000000..4043217ba7b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshufhw-2.c @@ -0,0 +1,62 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s, unsigned char imm, short *r) +{ + int i; + + for (i = 0; i < SIZE / 8; i++) + { + r[8 * i] = s[8 * i]; + r[8 * i + 1] = s[8 * i + 1]; + r[8 * i + 2] = s[8 * i + 2]; + r[8 * i + 3] = s[8 * i + 3]; + r[8 * i + 4] = s[8 * i + (imm >> 0 & 3) + 4]; + r[8 * i + 5] = s[8 * i + (imm >> 2 & 3) + 4]; + r[8 * i + 6] = s[8 * i + (imm >> 4 & 3) + 4]; + r[8 * i + 7] = s[8 * i + (imm >> 6 & 3) + 4]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, res1, res2, res3; + short res_ref[SIZE]; + int i, sign = 1; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * i * sign; + res1.a[i] = DEFAULT_VALUE; + res2.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_shufflehi_epi16) (s1.x, 0xec); + res2.x = + INTRINSIC (_mask_shufflehi_epi16) (res2.x, mask, s1.x, 0xec); + res3.x = INTRINSIC (_maskz_shufflehi_epi16) (mask, s1.x, 0xec); + + CALC (s1.a, 0xec, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-1.c new file mode 100644 index 00000000000..1b18f99c0c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshuflw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_shufflelo_epi16 (z, _MM_PERM_AADB); + z = _mm512_mask_shufflelo_epi16 (z, m1, z, _MM_PERM_AADB); + z = _mm512_maskz_shufflelo_epi16 (m1, z, _MM_PERM_AADB); + y = _mm256_mask_shufflelo_epi16 (y, m2, y, _MM_PERM_AADB); + y = _mm256_maskz_shufflelo_epi16 (m2, y, _MM_PERM_AADB); + x = _mm_mask_shufflelo_epi16 (x, m3, x, _MM_PERM_AADB); + x = _mm_maskz_shufflelo_epi16 (m3, x, _MM_PERM_AADB); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-2.c new file mode 100644 index 00000000000..72dda61c3c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpshuflw-2.c @@ -0,0 +1,62 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s, unsigned char imm, short *r) +{ + int i; + + for (i = 0; i < SIZE / 8; i++) + { + r[8 * i] = s[8 * i + (imm >> 0 & 3)]; + r[8 * i + 1] = s[8 * i + (imm >> 2 & 3)]; + r[8 * i + 2] = s[8 * i + (imm >> 4 & 3)]; + r[8 * i + 3] = s[8 * i + (imm >> 6 & 3)]; + r[8 * i + 4] = s[8 * i + 4]; + r[8 * i + 5] = s[8 * i + 5]; + r[8 * i + 6] = s[8 * i + 6]; + r[8 * i + 7] = s[8 * i + 7]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, res1, res2, res3; + short res_ref[SIZE]; + int i, sign = 1; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * i * sign; + res1.a[i] = DEFAULT_VALUE; + res2.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_shufflelo_epi16) (s1.x, 0xec); + res2.x = + INTRINSIC (_mask_shufflelo_epi16) (res2.x, mask, s1.x, 0xec); + res3.x = INTRINSIC (_maskz_shufflelo_epi16) (mask, s1.x, 0xec); + + CALC (s1.a, 0xec, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpslldq-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpslldq-1.c new file mode 100644 index 00000000000..4964c1df895 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpslldq-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpslldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +extern volatile __m512i x; + +void extern +avx512bw_test (void) +{ + x = _mm512_bslli_epi128 (x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-1.c new file mode 100644 index 00000000000..bdf0da64e50 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_sllv_epi16 (z, z); + z = _mm512_mask_sllv_epi16 (z, m1, z, z); + z = _mm512_maskz_sllv_epi16 (m1, z, z); + y = _mm256_sllv_epi16 (y, y); + y = _mm256_mask_sllv_epi16 (y, m2, y, y); + y = _mm256_maskz_sllv_epi16 (m2, y, y); + x = _mm_sllv_epi16 (x, x); + x = _mm_mask_sllv_epi16 (x, m3, x, x); + x = _mm_maskz_sllv_epi16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-2.c new file mode 100644 index 00000000000..e8a5f20b657 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllvw-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s1, short *s2, short *r) +{ + int i; + + for (i = 0; i < SIZE; ++i) + { + r[i] = ((unsigned short) s1[i]) << s2[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * sign; + s2.a[i] = i >> 2; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_sllv_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_sllv_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_sllv_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-1.c new file mode 100644 index 00000000000..42457fb0107 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 7 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m512i x; +volatile __m256i x256; +volatile __m128i x128; +volatile __m128i y; +volatile __mmask32 m; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x = _mm512_sll_epi16 (x, y); + x = _mm512_mask_sll_epi16 (x, m, x, y); + x = _mm512_maskz_sll_epi16 (m, x, y); + x256 = _mm256_mask_sll_epi16 (x256, m256, x256, y); + x256 = _mm256_maskz_sll_epi16 (m256, x256, y); + x128 = _mm_mask_sll_epi16 (x128, m128, x128, y); + x128 = _mm_maskz_sll_epi16 (m128, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-2.c new file mode 100644 index 00000000000..7c74742161a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllw-2.c @@ -0,0 +1,64 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, long long *s2) +{ + int i; + long long count = s2[0]; + for (i = 0; i < SIZE; i++) + { + r[i] = count < 16 ? (s1[i] << count) : 0; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1; + UNION_TYPE (128, i_q) src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + long long imm; + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + sign = sign * -1; + } + for (i = 0; i < 2; i++) + { + src2.a[i] = 0; + } + + for (imm = 1; imm <= 17; imm++) + { + src2.a[0] = imm; + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_sll_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_sll_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_sll_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-1.c new file mode 100644 index 00000000000..83d4c04710e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m512i x; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m; +volatile __mmask16 m256; +volatile __mmask8 m128; +#define y 7 + +void extern +avx512bw_test (void) +{ + x = _mm512_slli_epi16 (x, y); + x = _mm512_mask_slli_epi16 (x, m, x, y); + x = _mm512_maskz_slli_epi16 (m, x, y); + x256 = _mm256_mask_slli_epi16 (x256, m256, x256, y); + x256 = _mm256_maskz_slli_epi16 (m256, x256, y); + x128 = _mm_mask_slli_epi16 (x128, m128, x128, y); + x128 = _mm_maskz_slli_epi16 (m128, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-2.c new file mode 100644 index 00000000000..21898f5cdb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsllwi-2.c @@ -0,0 +1,74 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short count) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = count < 16 ? (s1[i] << count) : 0; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + sign = sign * -1; + } + + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_slli_epi16) (src1.x, 5); + res2.x = INTRINSIC (_mask_slli_epi16) (res2.x, mask, src1.x, 5); + res3.x = INTRINSIC (_maskz_slli_epi16) (mask, src1.x, 5); + + CALC (res_ref, src1.a, 5); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + + + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_slli_epi16) (src1.x, 17); + res2.x = INTRINSIC (_mask_slli_epi16) (res2.x, mask, src1.x, 17); + res3.x = INTRINSIC (_maskz_slli_epi16) (mask, src1.x, 17); + + CALC (res_ref, src1.a, 17); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-1.c new file mode 100644 index 00000000000..70db2fda453 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_srav_epi16 (z, z); + z = _mm512_mask_srav_epi16 (z, m1, z, z); + z = _mm512_maskz_srav_epi16 (m1, z, z); + y = _mm256_srav_epi16 (y, y); + y = _mm256_mask_srav_epi16 (y, m2, y, y); + y = _mm256_maskz_srav_epi16 (m2, y, y); + x = _mm_srav_epi16 (x, x); + x = _mm_mask_srav_epi16 (x, m3, x, x); + x = _mm_maskz_srav_epi16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-2.c new file mode 100644 index 00000000000..225d732a7b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsravw-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s1, short *s2, short *r) +{ + int i; + + for (i = 0; i < SIZE; ++i) + { + r[i] = s2[i] < 16 ? (s1[i] >> s2[i]) : (s1[i] > 0 ? 0 : 0xFFFF); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * sign; + s2.a[i] = i >> 2; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_srav_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_srav_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_srav_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-1.c new file mode 100644 index 00000000000..667825bd7eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_sra_epi16 (z, x); + z = _mm512_mask_sra_epi16 (z, m1, z, x); + z = _mm512_maskz_sra_epi16 (m1, z, x); + y = _mm256_mask_sra_epi16 (y, m2, y, x); + y = _mm256_maskz_sra_epi16 (m2, y, x); + x = _mm_mask_sra_epi16 (x, m3, x, x); + x = _mm_maskz_sra_epi16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-2.c new file mode 100644 index 00000000000..f1649c23542 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsraw-2.c @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#include <string.h> + +#define N 0x5 + +void +CALC (short *s1, long long int *s2, short *r) +{ + int i; + long long int count = s2[0]; + + memset (r, 0, SIZE); + + if (count < 16) + for (i = 0; i < SIZE; ++i) + r[i] = s1[i] >> count; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + union128i_q s2; + short res_ref[SIZE]; + int i, sign; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + s2.a[0] = N; + + res1.x = INTRINSIC (_sra_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_sra_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_sra_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-1.c new file mode 100644 index 00000000000..ebb9fa9f4a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_srai_epi16 (z, 13); + z = _mm512_mask_srai_epi16 (z, m1, z, 13); + z = _mm512_maskz_srai_epi16 (m1, z, 13); + y = _mm256_mask_srai_epi16 (y, m2, y, 13); + y = _mm256_maskz_srai_epi16 (m2, y, 13); + x = _mm_mask_srai_epi16 (x, m3, x, 13); + x = _mm_maskz_srai_epi16 (m3, x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-2.c new file mode 100644 index 00000000000..b72b806a482 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrawi-2.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +#include <string.h> + +#define N 0x5 + +void +CALC (short *s1, short *r) +{ + int i; + + memset (r, 0, SIZE); + + if (N < 16) + for (i = 0; i < SIZE; ++i) + r[i] = s1[i] >> N; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + union128i_q s2; + short res_ref[SIZE]; + int i, sign; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * sign; + sign = -sign; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_srai_epi16) (s1.x, N); + res2.x = INTRINSIC (_mask_srai_epi16) (res2.x, mask, s1.x, N); + res3.x = INTRINSIC (_maskz_srai_epi16) (mask, s1.x, N); + + CALC (s1.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrldq-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrldq-1.c new file mode 100644 index 00000000000..d9424f51069 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrldq-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpsrldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +extern volatile __m512i x; + +void extern +avx512bw_test (void) +{ + x = _mm512_bsrli_epi128 (x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-1.c new file mode 100644 index 00000000000..a94b7cfa30e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_srlv_epi16 (z, z); + z = _mm512_mask_srlv_epi16 (z, m1, z, z); + z = _mm512_maskz_srlv_epi16 (m1, z, z); + y = _mm256_srlv_epi16 (y, y); + y = _mm256_mask_srlv_epi16 (y, m2, y, y); + y = _mm256_maskz_srlv_epi16 (m2, y, y); + x = _mm_srlv_epi16 (x, x); + x = _mm_mask_srlv_epi16 (x, m3, x, x); + x = _mm_maskz_srlv_epi16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-2.c new file mode 100644 index 00000000000..eb98685770b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlvw-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (short *s1, short *s2, short *r) +{ + int i; + + for (i = 0; i < SIZE; ++i) + { + r[i] = ((unsigned short) s1[i]) >> s2[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_w) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = i * sign; + s2.a[i] = i >> 2; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_srlv_epi16) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_srlv_epi16) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_srlv_epi16) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-1.c new file mode 100644 index 00000000000..584f30346d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_srl_epi16 (z, x); + z = _mm512_mask_srl_epi16 (z, m1, z, x); + z = _mm512_maskz_srl_epi16 (m1, z, x); + y = _mm256_mask_srl_epi16 (y, m2, y, x); + y = _mm256_maskz_srl_epi16 (m2, y, x); + x = _mm_mask_srl_epi16 (x, m3, x, x); + x = _mm_maskz_srl_epi16 (m3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-2.c new file mode 100644 index 00000000000..611a8a84b83 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlw-2.c @@ -0,0 +1,82 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (unsigned short *r, unsigned short *s1, unsigned short *s2) +{ + int i; + unsigned short count = s2[0]; + for (i = 0; i < SIZE; i++) + { + r[i] = count < 16 ? (s1[i] >> count) : 0; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1; + UNION_TYPE (128, i_w) src2; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + } + + for (i = 0; i < 128 / 16; i++) + { + src2.a[i] = 0; + } + + src2.a[0] = 1; + src2.a[1] = 0; + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_srl_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_srl_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_srl_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + + src2.a[0] = 17; + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_srl_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_srl_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_srl_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-1.c new file mode 100644 index 00000000000..0ca04050e4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i y; +volatile __m128i x; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + z = _mm512_srli_epi16 (z, 13); + z = _mm512_mask_srli_epi16 (z, m1, z, 13); + z = _mm512_maskz_srli_epi16 (m1, z, 13); + y = _mm256_mask_srli_epi16 (y, m2, y, 13); + y = _mm256_maskz_srli_epi16 (m2, y, 13); + x = _mm_mask_srli_epi16 (x, m3, x, 13); + x = _mm_maskz_srli_epi16 (m3, x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-2.c new file mode 100644 index 00000000000..1dfe6448af8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsrlwi-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (unsigned short *r, unsigned short *s1, unsigned short count) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = count < 16 ? (s1[i] >> count) : 0; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + } + + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_srli_epi16) (src1.x, 5); + res2.x = INTRINSIC (_mask_srli_epi16) (res2.x, mask, src1.x, 5); + res3.x = INTRINSIC (_maskz_srli_epi16) (mask, src1.x, 5); + + CALC (res_ref, src1.a, 5); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); + + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_srli_epi16) (src1.x, 17); + res2.x = INTRINSIC (_mask_srli_epi16) (res2.x, mask, src1.x, 17); + res3.x = INTRINSIC (_maskz_srli_epi16) (mask, src1.x, 17); + + CALC (res_ref, src1.a, 17); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-1.c new file mode 100644 index 00000000000..6ce3113845a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_sub_epi8 (x512, x512); + x512 = _mm512_mask_sub_epi8 (x512, m512, x512, x512); + x512 = _mm512_maskz_sub_epi8 (m512, x512, x512); + x256 = _mm256_mask_sub_epi8 (x256, m256, x256, x256); + x256 = _mm256_maskz_sub_epi8 (m256, x256, x256); + x128 = _mm_mask_sub_epi8 (x128, m128, x128, x128); + x128 = _mm_maskz_sub_epi8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-2.c new file mode 100644 index 00000000000..00d9ec97671 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubb-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s1[i] - s2[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_sub_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_sub_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_sub_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-1.c new file mode 100644 index 00000000000..cf27ca0dc43 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_subs_epi8 (x512, x512); + x512 = _mm512_mask_subs_epi8 (x512, m512, x512, x512); + x512 = _mm512_maskz_subs_epi8 (m512, x512, x512); + x256 = _mm256_mask_subs_epi8 (x256, m256, x256, x256); + x256 = _mm256_maskz_subs_epi8 (m256, x256, x256); + x128 = _mm_mask_subs_epi8 (x128, m128, x128, x128); + x128 = _mm_maskz_subs_epi8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-2.c new file mode 100644 index 00000000000..bb53926ef60 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsb-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] - (int)s2[i]; + if (tmp > 0x7F) tmp = 0x7F; + if (tmp < (char)0x80) tmp = (char)0x80; + r[i] = (char)tmp; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_subs_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_subs_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_subs_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-1.c new file mode 100644 index 00000000000..583fc791594 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubsw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_subs_epi16 (x512, x512); + x512 = _mm512_mask_subs_epi16 (x512, m512, x512, x512); + x512 = _mm512_maskz_subs_epi16 (m512, x512, x512); + x256 = _mm256_mask_subs_epi16 (x256, m256, x256, x256); + x256 = _mm256_maskz_subs_epi16 (m256, x256, x256); + x128 = _mm_mask_subs_epi16 (x128, m128, x128, x128); + x128 = _mm_maskz_subs_epi16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-2.c new file mode 100644 index 00000000000..d654f4b80a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubsw-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] - (int)s2[i]; + if (tmp > 0x7FFF) tmp = 0x7FFF; + if (tmp < (short)0x8000) tmp = (short)0x8000; + r[i] = (short)tmp; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_subs_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_subs_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_subs_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-1.c new file mode 100644 index 00000000000..0012e92de1d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask64 m512; +volatile __mmask32 m256; +volatile __mmask16 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_subs_epu8 (x512, x512); + x512 = _mm512_mask_subs_epu8 (x512, m512, x512, x512); + x512 = _mm512_maskz_subs_epu8 (m512, x512, x512); + x256 = _mm256_mask_subs_epu8 (x256, m256, x256, x256); + x256 = _mm256_maskz_subs_epu8 (m256, x256, x256); + x128 = _mm_mask_subs_epu8 (x128, m128, x128, x128); + x128 = _mm_maskz_subs_epu8 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-2.c new file mode 100644 index 00000000000..f282919e6a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusb-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (unsigned char *r, unsigned char *s1, unsigned char *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] - (int)s2[i]; + if (tmp > 0xFF) tmp = 0xFF; + if (tmp < 0) tmp = 0; + r[i] = (unsigned char)tmp; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned char res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + src2.a[i] = 3 + 11 * (i % 377) * i; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_subs_epu8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_subs_epu8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_subs_epu8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-1.c new file mode 100644 index 00000000000..c5f448d6909 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubusw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_subs_epu16 (x512, x512); + x512 = _mm512_mask_subs_epu16 (x512, m512, x512, x512); + x512 = _mm512_maskz_subs_epu16 (m512, x512, x512); + x256 = _mm256_mask_subs_epu16 (x256, m256, x256, x256); + x256 = _mm256_maskz_subs_epu16 (m256, x256, x256); + x128 = _mm_mask_subs_epu16 (x128, m128, x128, x128); + x128 = _mm_maskz_subs_epu16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-2.c new file mode 100644 index 00000000000..b5d63f330f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubusw-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (unsigned short *r, unsigned short *s1, unsigned short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + int tmp = (int)s1[i] - (int)s2[i]; + if (tmp > 0xFFFF) tmp = 0xFFFF; + if (tmp < 0) tmp = 0; + r[i] = (unsigned short)tmp; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned short res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + 7 * i % 291; + src2.a[i] = 3 + 11 * (i % 377) * i; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_subs_epu16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_subs_epu16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_subs_epu16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-1.c new file mode 100644 index 00000000000..68127e7d23e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask32 m512; +volatile __mmask16 m256; +volatile __mmask8 m128; + +void extern +avx512bw_test (void) +{ + x512 = _mm512_sub_epi16 (x512, x512); + x512 = _mm512_mask_sub_epi16 (x512, m512, x512, x512); + x512 = _mm512_maskz_sub_epi16 (m512, x512, x512); + x256 = _mm256_mask_sub_epi16 (x256, m256, x256, x256); + x256 = _mm256_maskz_sub_epi16 (m256, x256, x256); + x128 = _mm_mask_sub_epi16 (x128, m128, x128, x128); + x128 = _mm_maskz_sub_epi16 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-2.c new file mode 100644 index 00000000000..487dcd93450 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpsubw-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s1[i] - s2[i]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 2 + sign * 7 * i % 291; + src2.a[i] = 3 + sign * 11 * (i % 377) * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_sub_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_sub_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_sub_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-1.c new file mode 100644 index 00000000000..62137d05bde --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmb\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __m512i x512; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_test_epi8_mask (x128, x128); + m32 = _mm256_test_epi8_mask (x256, x256); + m64 = _mm512_test_epi8_mask (x512, x512); + m16 = _mm_mask_test_epi8_mask (3, x128, x128); + m32 = _mm256_mask_test_epi8_mask (3, x256, x256); + m64 = _mm512_mask_test_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-2.c new file mode 100644 index 00000000000..d39f593c629 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmb-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *res, char *src1, char *src2) +{ + int i; + *res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (src1[i] & src2[i]) + *res = *res | one << i; +} + +void +TEST (void) +{ + int i, sign = 1; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i * sign; + src2.a[i] = i + 20; + sign = -sign; + } + + res1 = INTRINSIC (_test_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_test_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-1.c new file mode 100644 index 00000000000..8194a11b1b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmw\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __m512i x512; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_test_epi16_mask (x128, x128); + m16 = _mm256_test_epi16_mask (x256, x256); + m32 = _mm512_test_epi16_mask (x512, x512); + m8 = _mm_mask_test_epi16_mask (3, x128, x128); + m16 = _mm256_mask_test_epi16_mask (3, x256, x256); + m32 = _mm512_mask_test_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-2.c new file mode 100644 index 00000000000..5301dfa325f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestmw-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *res, short *src1, short *src2) +{ + int i; + *res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (src1[i] & src2[i]) + *res = *res | one << i; +} + +void +TEST (void) +{ + int i, sign = 1; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i * sign; + src2.a[i] = i + 20; + sign = -sign; + } + + res1 = INTRINSIC (_test_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_test_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-1.c new file mode 100644 index 00000000000..bb126fbd2ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmb\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __m512i x512; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_testn_epi8_mask (x128, x128); + m32 = _mm256_testn_epi8_mask (x256, x256); + m64 = _mm512_testn_epi8_mask (x512, x512); + m16 = _mm_mask_testn_epi8_mask (3, x128, x128); + m32 = _mm256_mask_testn_epi8_mask (3, x256, x256); + m64 = _mm512_mask_testn_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-2.c new file mode 100644 index 00000000000..ba54bd1c6ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmb-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *res, char *src1, char *src2) +{ + int i; + *res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (!(src1[i] & src2[i])) + *res = *res | one << i; +} + +void +TEST (void) +{ + int i, sign = 1; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i * sign; + src2.a[i] = i + 20; + sign = -sign; + } + + res1 = INTRINSIC (_testn_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_testn_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-1.c new file mode 100644 index 00000000000..82944b56e1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmw\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __m512i x512; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_testn_epi16_mask (x128, x128); + m16 = _mm256_testn_epi16_mask (x256, x256); + m32 = _mm512_testn_epi16_mask (x512, x512); + m8 = _mm_mask_testn_epi16_mask (3, x128, x128); + m16 = _mm256_mask_testn_epi16_mask (3, x256, x256); + m32 = _mm512_mask_testn_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-2.c new file mode 100644 index 00000000000..eac1fc5c55e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vptestnmw-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *res, short *src1, short *src2) +{ + int i; + *res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (!(src1[i] & src2[i])) + *res = *res | one << i; +} + +void +TEST (void) +{ + int i, sign = 1; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i * i * sign; + src2.a[i] = i + 20; + sign = -sign; + } + + res1 = INTRINSIC (_testn_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_testn_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-1.c new file mode 100644 index 00000000000..8beb7cc9c1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i d, e, f; +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + d = _mm512_unpackhi_epi8 (e, f); + d = _mm512_mask_unpackhi_epi8 (d, m1, e, f); + d = _mm512_maskz_unpackhi_epi8 (m1, e, f); + x = _mm256_mask_unpackhi_epi8 (x, m2, y, z); + x = _mm256_maskz_unpackhi_epi8 (m2, y, z); + a = _mm_mask_unpackhi_epi8 (a, m3, b, c); + a = _mm_maskz_unpackhi_epi8 (m3, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-2.c new file mode 100644 index 00000000000..6de5c013532 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhbw-2.c @@ -0,0 +1,68 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE/16; i++) + { + r[16 * i] = s1[16 * i + 8]; + r[16 * i + 1] = s2[16 * i + 8]; + r[16 * i + 2] = s1[16 * i + 9]; + r[16 * i + 3] = s2[16 * i + 9]; + r[16 * i + 4] = s1[16 * i + 10]; + r[16 * i + 5] = s2[16 * i + 10]; + r[16 * i + 6] = s1[16 * i + 11]; + r[16 * i + 7] = s2[16 * i + 11]; + r[16 * i + 8] = s1[16 * i + 12]; + r[16 * i + 9] = s2[16 * i + 12]; + r[16 * i + 10] = s1[16 * i + 13]; + r[16 * i + 11] = s2[16 * i + 13]; + r[16 * i + 12] = s1[16 * i + 14]; + r[16 * i + 13] = s2[16 * i + 14]; + r[16 * i + 14] = s1[16 * i + 15]; + r[16 * i + 15] = s2[16 * i + 15]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 34 * i * sign; + src1.a[i] = 179 * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_unpackhi_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_unpackhi_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_unpackhi_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-1.c new file mode 100644 index 00000000000..069cf7fef1c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i d, e, f; +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + d = _mm512_unpackhi_epi16 (e, f); + d = _mm512_mask_unpackhi_epi16 (d, m1, e, f); + d = _mm512_maskz_unpackhi_epi16 (m1, e, f); + x = _mm256_mask_unpackhi_epi16 (x, m2, y, z); + x = _mm256_maskz_unpackhi_epi16 (m2, y, z); + a = _mm_mask_unpackhi_epi16 (a, m3, b, c); + a = _mm_maskz_unpackhi_epi16 (m3, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-2.c new file mode 100644 index 00000000000..a1e27588abc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpckhwd-2.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE/8; i++) + { + r[8 * i] = s1[8 * i + 4]; + r[8 * i + 1] = s2[8 * i + 4]; + r[8 * i + 2] = s1[8 * i + 5]; + r[8 * i + 3] = s2[8 * i + 5]; + r[8 * i + 4] = s1[8 * i + 6]; + r[8 * i + 5] = s2[8 * i + 6]; + r[8 * i + 6] = s1[8 * i + 7]; + r[8 * i + 7] = s2[8 * i + 7]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 34 * i * sign; + src1.a[i] = 179 * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_unpackhi_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_unpackhi_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_unpackhi_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-1.c new file mode 100644 index 00000000000..34ed46d4cc5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklbw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i d, e, f; +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask64 m1; +volatile __mmask32 m2; +volatile __mmask16 m3; + +void extern +avx512bw_test (void) +{ + d = _mm512_unpacklo_epi8 (e, f); + d = _mm512_mask_unpacklo_epi8 (d, m1, e, f); + d = _mm512_maskz_unpacklo_epi8 (m1, e, f); + x = _mm256_mask_unpacklo_epi8 (x, m2, y, z); + x = _mm256_maskz_unpacklo_epi8 (m2, y, z); + a = _mm_mask_unpacklo_epi8 (a, m3, b, c); + a = _mm_maskz_unpacklo_epi8 (m3, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-2.c new file mode 100644 index 00000000000..aea8839ec6e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklbw-2.c @@ -0,0 +1,68 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +CALC (char *r, char *s1, char *s2) +{ + int i; + for (i = 0; i < SIZE/16; i++) + { + r[16 * i] = s1[16 * i]; + r[16 * i + 1] = s2[16 * i]; + r[16 * i + 2] = s1[16 * i + 1]; + r[16 * i + 3] = s2[16 * i + 1]; + r[16 * i + 4] = s1[16 * i + 2]; + r[16 * i + 5] = s2[16 * i + 2]; + r[16 * i + 6] = s1[16 * i + 3]; + r[16 * i + 7] = s2[16 * i + 3]; + r[16 * i + 8] = s1[16 * i + 4]; + r[16 * i + 9] = s2[16 * i + 4]; + r[16 * i + 10] = s1[16 * i + 5]; + r[16 * i + 11] = s2[16 * i + 5]; + r[16 * i + 12] = s1[16 * i + 6]; + r[16 * i + 13] = s2[16 * i + 6]; + r[16 * i + 14] = s1[16 * i + 7]; + r[16 * i + 15] = s2[16 * i + 7]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_b) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + char res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 34 * i * sign; + src1.a[i] = 179 * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_unpacklo_epi8) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_unpacklo_epi8) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_unpacklo_epi8) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) + abort (); + + MASK_MERGE (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) + abort (); + + MASK_ZERO (i_b) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-1.c new file mode 100644 index 00000000000..79963113736 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i d, e, f; +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask32 m1; +volatile __mmask16 m2; +volatile __mmask8 m3; + +void extern +avx512bw_test (void) +{ + d = _mm512_unpacklo_epi16 (e, f); + d = _mm512_mask_unpacklo_epi16 (d, m1, e, f); + d = _mm512_maskz_unpacklo_epi16 (m1, e, f); + x = _mm256_mask_unpacklo_epi16 (x, m2, y, z); + x = _mm256_maskz_unpacklo_epi16 (m2, y, z); + a = _mm_mask_unpacklo_epi16 (a, m3, b, c); + a = _mm_maskz_unpacklo_epi16 (m3, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-2.c new file mode 100644 index 00000000000..c771bd9bced --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpunpcklwd-2.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +CALC (short *r, short *s1, short *s2) +{ + int i; + for (i = 0; i < SIZE/8; i++) + { + r[8 * i] = s1[8 * i]; + r[8 * i + 1] = s2[8 * i]; + r[8 * i + 2] = s1[8 * i + 1]; + r[8 * i + 3] = s2[8 * i + 1]; + r[8 * i + 4] = s1[8 * i + 2]; + r[8 * i + 5] = s2[8 * i + 2]; + r[8 * i + 6] = s1[8 * i + 3]; + r[8 * i + 7] = s2[8 * i + 3]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3, src1, src2; + MASK_TYPE mask = MASK_VALUE; + short res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 34 * i * sign; + src1.a[i] = 179 * i; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_unpacklo_epi16) (src1.x, src2.x); + res2.x = INTRINSIC (_mask_unpacklo_epi16) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_unpacklo_epi16) (mask, src1.x, src2.x); + + CALC (res_ref, src1.a, src2.a); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) + abort (); + + MASK_MERGE (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref)) + abort (); + + MASK_ZERO (i_w) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-check.h b/gcc/testsuite/gcc.target/i386/avx512dq-check.h new file mode 100644 index 00000000000..e8dcf4b7d9f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-check.h @@ -0,0 +1,47 @@ +#include <stdlib.h> +#include "cpuid.h" +#include "m512-check.h" +#include "avx512f-os-support.h" + +static void avx512dq_test (void); + +static void __attribute__ ((noinline)) do_test (void) +{ + avx512dq_test (); +} + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AVX512DQ test only if host has AVX512DQ support. */ + if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE)) + { + if (__get_cpuid_max (0, NULL) < 7) + return 0; + + __cpuid_count (7, 0, eax, ebx, ecx, edx); + + if ((avx512f_os_support ()) && ((ebx & bit_AVX512DQ) == bit_AVX512DQ)) + { + do_test (); +#ifdef DEBUG + printf ("PASSED\n"); +#endif + return 0; + } +#ifdef DEBUG + printf ("SKIPPED\n"); +#endif + } +#ifdef DEBUG + else + printf ("SKIPPED\n"); +#endif + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-1.c new file mode 100644 index 00000000000..bb6cf9250e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d z; +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + z = _mm512_andnot_pd (z, z); + z = _mm512_mask_andnot_pd (z, m, z, z); + z = _mm512_maskz_andnot_pd (m, z, z); + y = _mm256_mask_andnot_pd (y, m, y, y); + y = _mm256_maskz_andnot_pd (m, y, y); + x = _mm_mask_andnot_pd (x, m, x, x); + x = _mm_maskz_andnot_pd (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-2.c new file mode 100644 index 00000000000..88e52e0d891 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandnpd-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s1, double *s2, double *r) +{ + int i; + long long tmp; + + for (i = 0; i < SIZE; i++) + { + tmp = (~(*(long long *) &s1[i])) & (*(long long *) &s2[i]); + r[i] = *(double *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 13. * i; + s2.a[i] = 17. * i; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_andnot_pd) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_andnot_pd) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_andnot_pd) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-1.c new file mode 100644 index 00000000000..6a76a2564c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandnps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 z; +volatile __m256 y; +volatile __m128 x; +volatile __mmask16 m1; +volatile __mmask8 m2; + +void extern +avx512dq_test (void) +{ + z = _mm512_andnot_ps (z, z); + z = _mm512_mask_andnot_ps (z, m1, z, z); + z = _mm512_maskz_andnot_ps (m1, z, z); + y = _mm256_mask_andnot_ps (y, m2, y, y); + y = _mm256_maskz_andnot_ps (m2, y, y); + x = _mm_mask_andnot_ps (x, m2, x, x); + x = _mm_maskz_andnot_ps (m2, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-2.c new file mode 100644 index 00000000000..14df2fbdef2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandnps-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +void +CALC (float *s1, float *s2, float *r) +{ + int i; + int tmp; + + for (i = 0; i < SIZE; i++) + { + tmp = (~(*(int *) &s1[i])) & (*(int *) &s2[i]); + r[i] = *(float *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, ) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 13. * i; + s2.a[i] = 17. * i; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_andnot_ps) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_andnot_ps) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_andnot_ps) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref)) + abort (); + + MASK_MERGE () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref)) + abort (); + + MASK_ZERO () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-1.c new file mode 100644 index 00000000000..212754d425f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d z; +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + z = _mm512_and_pd (z, z); + z = _mm512_mask_and_pd (z, m, z, z); + z = _mm512_maskz_and_pd (m, z, z); + y = _mm256_mask_and_pd (y, m, y, y); + y = _mm256_maskz_and_pd (m, y, y); + x = _mm_mask_and_pd (x, m, x, x); + x = _mm_maskz_and_pd (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-2.c new file mode 100644 index 00000000000..e5a73658b10 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandpd-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s1, double *s2, double *r) +{ + int i; + long long tmp; + + for (i = 0; i < SIZE; i++) + { + tmp = (*(long long *) &s1[i]) & (*(long long *) &s2[i]); + r[i] = *(double *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 13. * i; + s2.a[i] = 17. * i; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_and_pd) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_and_pd) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_and_pd) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandps-1.c new file mode 100644 index 00000000000..e41a7db041b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandps-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vandps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 z; +volatile __m256 y; +volatile __m128 x; +volatile __mmask16 m1; +volatile __mmask8 m2; + +void extern +avx512dq_test (void) +{ + z = _mm512_and_ps (z, z); + z = _mm512_mask_and_ps (z, m1, z, z); + z = _mm512_maskz_and_ps (m1, z, z); + y = _mm256_mask_and_ps (y, m2, y, y); + y = _mm256_maskz_and_ps (m2, y, y); + x = _mm_mask_and_ps (x, m2, x, x); + x = _mm_maskz_and_ps (m2, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vandps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vandps-2.c new file mode 100644 index 00000000000..013e1ecc7a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vandps-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +void +CALC (float *s1, float *s2, float *r) +{ + int i; + int tmp; + + for (i = 0; i < SIZE; i++) + { + tmp = (*(int *) &s1[i]) & (*(int *) &s2[i]); + r[i] = *(float *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, ) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 13. * i; + s2.a[i] = 17. * i; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_and_ps) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_and_ps) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_and_ps) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref)) + abort (); + + MASK_MERGE () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref)) + abort (); + + MASK_ZERO () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-1.c new file mode 100644 index 00000000000..6f0072c7770 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 x; +volatile __m256 y; +volatile __m128 z; +volatile __mmask16 mx; +volatile __mmask8 my; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_f32x2 (z); + x = _mm512_mask_broadcast_f32x2 (x, mx, z); + x = _mm512_maskz_broadcast_f32x2 (mx, z); + y = _mm256_broadcast_f32x2 (z); + y = _mm256_mask_broadcast_f32x2 (y, my, z); + y = _mm256_maskz_broadcast_f32x2 (my, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-2.c new file mode 100644 index 00000000000..aa78be158f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x2-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (float *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 2]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN,) res1, res2, res3; + UNION_TYPE (128,) src; + MASK_TYPE mask = SIZE | 123; + float res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 4; i++) + { + src.a[i] = 34.67 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_f32x2) (src.x); + res2.x = INTRINSIC (_mask_broadcast_f32x2) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_f32x2) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref)) + abort (); + + MASK_MERGE ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref)) + abort (); + + MASK_ZERO ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-1.c new file mode 100644 index 00000000000..d041bba4937 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512 x; +volatile __m256 y; +volatile __mmask16 m; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_f32x8 (y); + x = _mm512_mask_broadcast_f32x8 (x, m, y); + x = _mm512_maskz_broadcast_f32x8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-2.c new file mode 100644 index 00000000000..eda3baf6da6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf32x8-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (float *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 8]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN,) res1, res2, res3; + UNION_TYPE (256,) src; + MASK_TYPE mask = SIZE | 123; + float res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 8; i++) + { + src.a[i] = 34.67 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_f32x8) (src.x); + res2.x = INTRINSIC (_mask_broadcast_f32x8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_f32x8) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref)) + abort (); + + MASK_MERGE ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref)) + abort (); + + MASK_ZERO ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-1.c new file mode 100644 index 00000000000..c240ccee5fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512d x; +volatile __m256d y; +volatile __m128d z; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_f64x2 (z); + x = _mm512_mask_broadcast_f64x2 (x, m, z); + x = _mm512_maskz_broadcast_f64x2 (m, z); + y = _mm256_broadcast_f64x2 (z); + y = _mm256_mask_broadcast_f64x2 (y, m, z); + y = _mm256_maskz_broadcast_f64x2 (m, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-2.c new file mode 100644 index 00000000000..d148fe5750b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcastf64x2-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (double *r, double *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 2]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, d) res1, res2, res3; + UNION_TYPE (128, d) src; + MASK_TYPE mask = SIZE | 123; + double res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 2; i++) + { + src.a[i] = 34.67 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_f64x2) (src.x); + res2.x = INTRINSIC (_mask_broadcast_f64x2) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_f64x2) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-1.c new file mode 100644 index 00000000000..95cfcbd2521 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask16 mx; +volatile __mmask8 my; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_i32x2 (z); + x = _mm512_mask_broadcast_i32x2 (x, mx, z); + x = _mm512_maskz_broadcast_i32x2 (mx, z); + y = _mm256_broadcast_i32x2 (z); + y = _mm256_mask_broadcast_i32x2 (y, my, z); + y = _mm256_maskz_broadcast_i32x2 (my, z); + z = _mm_broadcast_i32x2 (z); + z = _mm_mask_broadcast_i32x2 (z, my, z); + z = _mm_maskz_broadcast_i32x2 (my, z); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-2.c new file mode 100644 index 00000000000..f508d861303 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x2-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (int *r, int *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 2]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3; + UNION_TYPE (128, i_d) src; + MASK_TYPE mask = SIZE | 123; + int res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 4; i++) + { + src.a[i] = 34 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_i32x2) (src.x); + res2.x = INTRINSIC (_mask_broadcast_i32x2) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_i32x2) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) + abort (); + + MASK_MERGE (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) + abort (); + + MASK_ZERO (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-1.c new file mode 100644 index 00000000000..b9e05ea2734 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __mmask16 m; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_i32x8 (y); + x = _mm512_mask_broadcast_i32x8 (x, m, y); + x = _mm512_maskz_broadcast_i32x8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-2.c new file mode 100644 index 00000000000..bbed9aeaed3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti32x8-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (int *r, int *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 8]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3; + UNION_TYPE (256, i_d) src; + MASK_TYPE mask = SIZE | 123; + int res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 8; i++) + { + src.a[i] = 34 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_i32x8) (src.x); + res2.x = INTRINSIC (_mask_broadcast_i32x8) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_i32x8) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) + abort (); + + MASK_MERGE (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) + abort (); + + MASK_ZERO (i_d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-1.c new file mode 100644 index 00000000000..7dd332dafcf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x = _mm512_broadcast_i64x2 (z); + x = _mm512_mask_broadcast_i64x2 (x, m, z); + x = _mm512_maskz_broadcast_i64x2 (m, z); + y = _mm256_broadcast_i64x2 (z); + y = _mm256_mask_broadcast_i64x2 (y, m, z); + y = _mm256_maskz_broadcast_i64x2 (m, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-2.c new file mode 100644 index 00000000000..ca560d9b515 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vbroadcasti64x2-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (long long *r, long long *s) +{ + int i; + for (i = 0; i < SIZE; i++) + { + r[i] = s[i % 2]; + } +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + UNION_TYPE (128, i_q) src; + MASK_TYPE mask = SIZE | 123; + long long res_ref[SIZE]; + + sign = -1; + for (i = 0; i < 2; i++) + { + src.a[i] = 34 * i * sign; + sign = sign * -1; + } + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_broadcast_i64x2) (src.x); + res2.x = INTRINSIC (_mask_broadcast_i64x2) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_broadcast_i64x2) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-1.c new file mode 100644 index 00000000000..16f2c6c2dcf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d s1; +volatile __m256d s2; +volatile __m128d s3; +volatile __m512i res1; +volatile __m256i res2; +volatile __m128i res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtpd_epi64 (s1); + res2 = _mm256_cvtpd_epi64 (s2); + res3 = _mm_cvtpd_epi64 (s3); + + res1 = _mm512_mask_cvtpd_epi64 (res1, m, s1); + res2 = _mm256_mask_cvtpd_epi64 (res2, m, s2); + res3 = _mm_mask_cvtpd_epi64 (res3, m, s3); + + res1 = _mm512_maskz_cvtpd_epi64 (m, s1); + res2 = _mm256_maskz_cvtpd_epi64 (m, s2); + res3 = _mm_maskz_cvtpd_epi64 (m, s3); + + res1 = _mm512_cvt_roundpd_epi64 (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundpd_epi64 (res1, m, s1, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundpd_epi64 (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-2.c new file mode 100644 index 00000000000..0e30bfe99cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2qq-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s, long long *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + r[i] = (s[i] >= 0) ? (long long) (s[i] + 0.5) + : (long long) (s[i] - 0.5); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + long long res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_cvtpd_epi64) (s.x); + res2.x = INTRINSIC (_mask_cvtpd_epi64) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtpd_epi64) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-1.c new file mode 100644 index 00000000000..c53e41d8bef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d s1; +volatile __m256d s2; +volatile __m128d s3; +volatile __m512i res1; +volatile __m256i res2; +volatile __m128i res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtpd_epu64 (s1); + res2 = _mm256_cvtpd_epu64 (s2); + res3 = _mm_cvtpd_epu64 (s3); + + res1 = _mm512_mask_cvtpd_epu64 (res1, m, s1); + res2 = _mm256_mask_cvtpd_epu64 (res2, m, s2); + res3 = _mm_mask_cvtpd_epu64 (res3, m, s3); + + res1 = _mm512_maskz_cvtpd_epu64 (m, s1); + res2 = _mm256_maskz_cvtpd_epu64 (m, s2); + res3 = _mm_maskz_cvtpd_epu64 (m, s3); + + res1 = _mm512_cvt_roundpd_epu64 (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundpd_epu64 (res1, m, s1, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundpd_epu64 (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-2.c new file mode 100644 index 00000000000..de1462841b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtpd2uqq-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s, unsigned long long *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + r[i] = (unsigned long long) (s[i] + 0.5); + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned long long res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000); + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtpd_epu64) (s.x); + res2.x = INTRINSIC (_mask_cvtpd_epu64) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtpd_epu64) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-1.c new file mode 100644 index 00000000000..60a631f0fb4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i x3; +volatile __m256 z1; +volatile __m128 z2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_cvtps_epi64 (z1); + x1 = _mm512_mask_cvtps_epi64 (x1, m, z1); + x1 = _mm512_maskz_cvtps_epi64 (m, z1); + x2 = _mm256_cvtps_epi64 (z2); + x2 = _mm256_mask_cvtps_epi64 (x2, m, z2); + x2 = _mm256_maskz_cvtps_epi64 (m, z2); + x3 = _mm_cvtps_epi64 (z2); + x3 = _mm_mask_cvtps_epi64 (x3, m, z2); + x3 = _mm_maskz_cvtps_epi64 (m, z2); + x1 = _mm512_cvt_roundps_epi64 (z1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + x1 = _mm512_mask_cvt_roundps_epi64 (x1, m, z1, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + x1 = _mm512_maskz_cvt_roundps_epi64 (m, z1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-2.c new file mode 100644 index 00000000000..7fef656625d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2qq-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (long long *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + r[i] = (long long) (s[i] + ((s[i] >= 0) ? 0.5 : -0.5)); +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + UNION_TYPE (AVX512F_LEN_HALF,) src; + MASK_TYPE mask = MASK_VALUE; + long long res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + res2.a[i] = DEFAULT_VALUE; + src.a[i] = 1.5 + 34.67 * i * sign; + sign = sign * -1; + } + + res1.x = INTRINSIC (_cvtps_epi64) (src.x); + res2.x = INTRINSIC (_mask_cvtps_epi64) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvtps_epi64) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-1.c new file mode 100644 index 00000000000..4f41c4ab647 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i x3; +volatile __m256 z1; +volatile __m128 z2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_cvtps_epu64 (z1); + x1 = _mm512_mask_cvtps_epu64 (x1, m, z1); + x1 = _mm512_maskz_cvtps_epu64 (m, z1); + x2 = _mm256_cvtps_epu64 (z2); + x2 = _mm256_mask_cvtps_epu64 (x2, m, z2); + x2 = _mm256_maskz_cvtps_epu64 (m, z2); + x3 = _mm_cvtps_epu64 (z2); + x3 = _mm_mask_cvtps_epu64 (x3, m, z2); + x3 = _mm_maskz_cvtps_epu64 (m, z2); + x1 = _mm512_cvt_roundps_epu64 (z1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + x1 = _mm512_mask_cvt_roundps_epu64 (x1, m, z1, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + x1 = _mm512_maskz_cvt_roundps_epu64 (m, z1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-2.c new file mode 100644 index 00000000000..ca341ef1bdf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtps2uqq-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (unsigned long long *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + r[i] = (unsigned long long) (s[i] + ((s[i] >= 0) ? 0.5 : -0.5)); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + UNION_TYPE (AVX512F_LEN_HALF,) src; + MASK_TYPE mask = MASK_VALUE; + unsigned long long res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + res2.a[i] = DEFAULT_VALUE; + src.a[i] = 1.5 + 34.67 * i; + } + + res1.x = INTRINSIC (_cvtps_epu64) (src.x); + res2.x = INTRINSIC (_mask_cvtps_epu64) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvtps_epu64) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-1.c new file mode 100644 index 00000000000..7ad246c384d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-1.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i s1; +volatile __m256i s2; +volatile __m128i s3; +volatile __m512d res1; +volatile __m256d res2; +volatile __m128d res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtepi64_pd (s1); + res1 = _mm512_mask_cvtepi64_pd (res1, m, s1); + res1 = _mm512_maskz_cvtepi64_pd (m, s1); + res2 = _mm256_cvtepi64_pd (s2); + res2 = _mm256_mask_cvtepi64_pd (res2, m, s2); + res2 = _mm256_maskz_cvtepi64_pd (m, s2); + res3 = _mm_cvtepi64_pd (s3); + res3 = _mm_mask_cvtepi64_pd (res3, m, s3); + res3 = _mm_maskz_cvtepi64_pd (m, s3); + res1 = _mm512_cvt_roundepi64_pd (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundepi64_pd (res1, m, s1, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundepi64_pd (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-2.c new file mode 100644 index 00000000000..7143415198b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2pd-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (long long *s, double *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + r[i] = (double) s[i]; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s; + UNION_TYPE (AVX512F_LEN, d) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_cvtepi64_pd) (s.x); + res2.x = INTRINSIC (_mask_cvtepi64_pd) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepi64_pd) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-1.c new file mode 100644 index 00000000000..8007299490b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i s1; +volatile __m256i s2; +volatile __m128i s3; +volatile __m256 res1; +volatile __m128 res2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtepi64_ps (s1); + res1 = _mm512_mask_cvtepi64_ps (res1, m, s1); + res1 = _mm512_maskz_cvtepi64_ps (m, s1); + res2 = _mm256_cvtepi64_ps (s2); + res2 = _mm256_mask_cvtepi64_ps (res2, m, s2); + res2 = _mm256_maskz_cvtepi64_ps (m, s2); + res2 = _mm_cvtepi64_ps (s3); + res2 = _mm_mask_cvtepi64_ps (res2, m, s3); + res2 = _mm_maskz_cvtepi64_ps (m, s3); + res1 = _mm512_cvt_roundepi64_ps (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundepi64_ps (res1, m, s1, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundepi64_ps (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-2.c new file mode 100644 index 00000000000..751c086f6ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtqq2ps-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#define SIZE_HALF (AVX512F_LEN_HALF / 32) +#include "avx512f-mask-type.h" + +void +CALC (long long *s, float *r) +{ + int i; + + for (i = 0; i < SIZE_HALF; i++) + r[i] = (i < SIZE) ? (float) s[i] : 0; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s; + UNION_TYPE (AVX512F_LEN_HALF,) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE_HALF]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_cvtepi64_ps) (s.x); + res2.x = INTRINSIC (_mask_cvtepi64_ps) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepi64_ps) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN_HALF,) (res1, res_ref)) + abort (); + + MASK_MERGE ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF,) (res2, res_ref)) + abort (); + + MASK_ZERO ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-1.c new file mode 100644 index 00000000000..ec4ccf9f23a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d s1; +volatile __m256d s2; +volatile __m128d s3; +volatile __m512i res1; +volatile __m256i res2; +volatile __m128i res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvttpd_epi64 (s1); + res2 = _mm256_cvttpd_epi64 (s2); + res3 = _mm_cvttpd_epi64 (s3); + + res1 = _mm512_mask_cvttpd_epi64 (res1, m, s1); + res2 = _mm256_mask_cvttpd_epi64 (res2, m, s2); + res3 = _mm_mask_cvttpd_epi64 (res3, m, s3); + + res1 = _mm512_maskz_cvttpd_epi64 (m, s1); + res2 = _mm256_maskz_cvttpd_epi64 (m, s2); + res3 = _mm_maskz_cvttpd_epi64 (m, s3); + + res1 = _mm512_cvtt_roundpd_epi64 (s1, _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvtt_roundpd_epi64 (res1, m, s1, _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvtt_roundpd_epi64 (m, s1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-2.c new file mode 100644 index 00000000000..6b338223cbc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2qq-2.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s, long long *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + r[i] = (long long) s[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + long long res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_cvttpd_epi64) (s.x); + res2.x = INTRINSIC (_mask_cvttpd_epi64) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvttpd_epi64) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-1.c new file mode 100644 index 00000000000..a4ceec9a8e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d s1; +volatile __m256d s2; +volatile __m128d s3; +volatile __m512i res1; +volatile __m256i res2; +volatile __m128i res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvttpd_epu64 (s1); + res2 = _mm256_cvttpd_epu64 (s2); + res3 = _mm_cvttpd_epu64 (s3); + + res1 = _mm512_mask_cvttpd_epu64 (res1, m, s1); + res2 = _mm256_mask_cvttpd_epu64 (res2, m, s2); + res3 = _mm_mask_cvttpd_epu64 (res3, m, s3); + + res1 = _mm512_maskz_cvttpd_epu64 (m, s1); + res2 = _mm256_maskz_cvttpd_epu64 (m, s2); + res3 = _mm_maskz_cvttpd_epu64 (m, s3); + + res1 = _mm512_cvtt_roundpd_epu64 (s1, _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvtt_roundpd_epu64 (res1, m, s1, _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvtt_roundpd_epu64 (m, s1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-2.c new file mode 100644 index 00000000000..39f450c9ea0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttpd2uqq-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *s, unsigned long long *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + r[i] = (unsigned long long) s[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + unsigned long long res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000); + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvttpd_epu64) (s.x); + res2.x = INTRINSIC (_mask_cvttpd_epu64) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvttpd_epu64) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-1.c new file mode 100644 index 00000000000..dd3b451f25e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i x3; +volatile __m256 z1; +volatile __m128 z2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_cvttps_epi64 (z1); + x1 = _mm512_mask_cvttps_epi64 (x1, m, z1); + x1 = _mm512_maskz_cvttps_epi64 (m, z1); + x2 = _mm256_cvttps_epi64 (z2); + x2 = _mm256_mask_cvttps_epi64 (x2, m, z2); + x2 = _mm256_maskz_cvttps_epi64 (m, z2); + x3 = _mm_cvttps_epi64 (z2); + x3 = _mm_mask_cvttps_epi64 (x3, m, z2); + x3 = _mm_maskz_cvttps_epi64 (m, z2); + x1 = _mm512_cvtt_roundps_epi64 (z1, _MM_FROUND_NO_EXC); + x1 = _mm512_mask_cvtt_roundps_epi64 (x1, m, z1, _MM_FROUND_NO_EXC); + x1 = _mm512_maskz_cvtt_roundps_epi64 (m, z1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-2.c new file mode 100644 index 00000000000..c56f6c97fcd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2qq-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (long long *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + r[i] = (long long) s[i]; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + UNION_TYPE (AVX512F_LEN_HALF,) src; + MASK_TYPE mask = MASK_VALUE; + long long res_ref[SIZE]; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + res2.a[i] = DEFAULT_VALUE; + src.a[i] = 1.5 + 34.67 * i * sign; + sign = sign * -1; + } + + res1.x = INTRINSIC (_cvttps_epi64) (src.x); + res2.x = INTRINSIC (_mask_cvttps_epi64) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvttps_epi64) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-1.c new file mode 100644 index 00000000000..9ef629b887a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i x3; +volatile __m256 z1; +volatile __m128 z2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_cvttps_epu64 (z1); + x1 = _mm512_mask_cvttps_epu64 (x1, m, z1); + x1 = _mm512_maskz_cvttps_epu64 (m, z1); + x2 = _mm256_cvttps_epu64 (z2); + x2 = _mm256_mask_cvttps_epu64 (x2, m, z2); + x2 = _mm256_maskz_cvttps_epu64 (m, z2); + x3 = _mm_cvttps_epu64 (z2); + x3 = _mm_mask_cvttps_epu64 (x3, m, z2); + x3 = _mm_maskz_cvttps_epu64 (m, z2); + x1 = _mm512_cvtt_roundps_epu64 (z1, _MM_FROUND_NO_EXC); + x1 = _mm512_mask_cvtt_roundps_epu64 (x1, m, z1, _MM_FROUND_NO_EXC); + x1 = _mm512_maskz_cvtt_roundps_epu64 (m, z1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-2.c new file mode 100644 index 00000000000..6b90e7a3f0d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvttps2uqq-2.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (unsigned long long *r, float *s) +{ + int i; + for (i = 0; i < SIZE; i++) + r[i] = (unsigned long long) s[i]; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3; + UNION_TYPE (AVX512F_LEN_HALF,) src; + MASK_TYPE mask = MASK_VALUE; + unsigned long long res_ref[SIZE]; + + for (i = 0; i < SIZE; i++) + { + res2.a[i] = DEFAULT_VALUE; + src.a[i] = 1.5 + 34.67 * i; + } + + res1.x = INTRINSIC (_cvttps_epu64) (src.x); + res2.x = INTRINSIC (_mask_cvttps_epu64) (res2.x, mask, src.x); + res3.x = INTRINSIC (_maskz_cvttps_epu64) (mask, src.x); + + CALC (res_ref, src.a); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-1.c new file mode 100644 index 00000000000..55fad80c835 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-1.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i s1; +volatile __m256i s2; +volatile __m128i s3; +volatile __m512d res1; +volatile __m256d res2; +volatile __m128d res3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtepu64_pd (s1); + res1 = _mm512_mask_cvtepu64_pd (res1, m, s1); + res1 = _mm512_maskz_cvtepu64_pd (m, s1); + res2 = _mm256_cvtepu64_pd (s2); + res2 = _mm256_mask_cvtepu64_pd (res2, m, s2); + res2 = _mm256_maskz_cvtepu64_pd (m, s2); + res3 = _mm_cvtepu64_pd (s3); + res3 = _mm_mask_cvtepu64_pd (res3, m, s3); + res3 = _mm_maskz_cvtepu64_pd (m, s3); + res1 = _mm512_cvt_roundepu64_pd (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundepu64_pd (res1, m, s1, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundepu64_pd (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-2.c new file mode 100644 index 00000000000..907e1d9877b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (unsigned long long *s, double *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + r[i] = (double) s[i]; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s; + UNION_TYPE (AVX512F_LEN, d) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123 * (i + 2000); + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtepu64_pd) (s.x); + res2.x = INTRINSIC (_mask_cvtepu64_pd) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepu64_pd) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-1.c new file mode 100644 index 00000000000..4931bb322db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2psy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i s1; +volatile __m256i s2; +volatile __m128i s3; +volatile __m256 res1; +volatile __m128 res2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + res1 = _mm512_cvtepu64_ps (s1); + res1 = _mm512_mask_cvtepu64_ps (res1, m, s1); + res1 = _mm512_maskz_cvtepu64_ps (m, s1); + res2 = _mm256_cvtepu64_ps (s2); + res2 = _mm256_mask_cvtepu64_ps (res2, m, s2); + res2 = _mm256_maskz_cvtepu64_ps (m, s2); + res2 = _mm_cvtepu64_ps (s3); + res2 = _mm_mask_cvtepu64_ps (res2, m, s3); + res2 = _mm_maskz_cvtepu64_ps (m, s3); + res1 = _mm512_cvt_roundepu64_ps (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res1 = _mm512_mask_cvt_roundepu64_ps (res1, m, s1, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + res1 = _mm512_maskz_cvt_roundepu64_ps (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-2.c new file mode 100644 index 00000000000..794024f6ced --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2ps-2.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#define SIZE_HALF (AVX512F_LEN_HALF / 32) +#include "avx512f-mask-type.h" + +void +CALC (unsigned long long *s, float *r) +{ + int i; + + for (i = 0; i < SIZE_HALF; i++) + r[i] = (i < SIZE) ? (float) s[i] : 0; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s; + UNION_TYPE (AVX512F_LEN_HALF,) res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE_HALF]; + int i; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123 * (i + 2000); + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_cvtepu64_ps) (s.x); + res2.x = INTRINSIC (_mask_cvtepu64_ps) (res2.x, mask, s.x); + res3.x = INTRINSIC (_maskz_cvtepu64_ps) (mask, s.x); + + CALC (s.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN_HALF,) (res1, res_ref)) + abort (); + + MASK_MERGE ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF,) (res2, res_ref)) + abort (); + + MASK_ZERO ()(res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN_HALF,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextractf32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf32x8-1.c new file mode 100644 index 00000000000..03a4f2c145f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf32x8-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vextractf32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextractf32x8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf32x8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 x; +volatile __m256 y; + +void extern +avx512dq_test (void) +{ + y = _mm512_extractf32x8_ps (x, 1); + y = _mm512_mask_extractf32x8_ps (y, 2, x, 1); + y = _mm512_maskz_extractf32x8_ps (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c new file mode 100644 index 00000000000..ddd52c63754 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ + +#include <immintrin.h> + +volatile __m512d x1; +volatile __m256d x2; +volatile __m128d y; + +void extern +avx512dq_test (void) +{ + y = _mm512_extractf64x2_pd (x1, 3); + y = _mm512_mask_extractf64x2_pd (y, 2, x1, 3); + y = _mm512_maskz_extractf64x2_pd (2, x1, 3); + y = _mm256_extractf64x2_pd (x2, 1); + y = _mm256_mask_extractf64x2_pd (y, 2, x2, 1); + y = _mm256_maskz_extractf64x2_pd (2, x2, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-2.c new file mode 100644 index 00000000000..02a2543cbb1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" +#include "string.h" + +void +CALC (double *s1, double *res_ref, int mask) +{ + memset (res_ref, 0, 16); + memcpy (res_ref, s1 + mask * 2, 16); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s1; + union128d res1, res2, res3; + double res_ref[2]; + MASK_TYPE mask = MASK_VALUE; + int j; + + for (j = 0; j < SIZE; j++) + { + s1.a[j] = j * j / 4.56; + } + + for (j = 0; j < 2; j++) + { + res1.a[j] = DEFAULT_VALUE; + res2.a[j] = DEFAULT_VALUE; + res3.a[j] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_extractf64x2_pd) (s1.x, 1); + res2.x = INTRINSIC (_mask_extractf64x2_pd) (res2.x, mask, s1.x, 1); + res3.x = INTRINSIC (_maskz_extractf64x2_pd) (mask, s1.x, 1); + CALC (s1.a, res_ref, 1); + + if (check_union128d (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, 2); + if (check_union128d (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, 2); + if (check_union128d (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextracti32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti32x8-1.c new file mode 100644 index 00000000000..c1f66bc897b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti32x8-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vextracti32x8\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextracti32x8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti32x8\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; + +void extern +avx512dq_test (void) +{ + y = _mm512_extracti32x8_epi32 (x, 1); + y = _mm512_mask_extracti32x8_epi32 (y, 2, x, 1); + y = _mm512_maskz_extracti32x8_epi32 (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-1.c new file mode 100644 index 00000000000..9852d8b2b66 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ + +#include <immintrin.h> + +volatile __m512i x1; +volatile __m256i x2; +volatile __m128i y; + +void extern +avx512dq_test (void) +{ + y = _mm512_extracti64x2_epi64 (x1, 3); + y = _mm512_mask_extracti64x2_epi64 (y, 2, x1, 3); + y = _mm512_maskz_extracti64x2_epi64 (2, x1, 3); + y = _mm256_extracti64x2_epi64 (x2, 1); + y = _mm256_mask_extracti64x2_epi64 (y, 2, x2, 1); + y = _mm256_maskz_extracti64x2_epi64 (2, x2, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-2.c new file mode 100644 index 00000000000..95fb0cf6a2c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextracti64x2-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" +#include "string.h" + +void +CALC (long long int *s1, long long int *res_ref, int mask) +{ + memset (res_ref, 0, 16); + memcpy (res_ref, s1 + mask * 2, 16); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s1; + union128i_q res1, res2, res3; + long long int res_ref[2]; + MASK_TYPE mask = MASK_VALUE; + int j; + + for (j = 0; j < SIZE; j++) + { + s1.a[j] = j * j + 37; + } + + for (j = 0; j < 2; j++) + { + res1.a[j] = DEFAULT_VALUE; + res2.a[j] = DEFAULT_VALUE; + res3.a[j] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_extracti64x2_epi64) (s1.x, 1); + res2.x = + INTRINSIC (_mask_extracti64x2_epi64) (res2.x, mask, s1.x, 1); + res3.x = INTRINSIC (_maskz_extracti64x2_epi64) (mask, s1.x, 1); + CALC (s1.a, res_ref, 1); + + if (check_union128i_q (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, 2); + if (check_union128i_q (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, 2); + if (check_union128i_q (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c new file mode 100644 index 00000000000..00855bde878 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ + +#include <immintrin.h> + +volatile __m512d x512; +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + m = _mm512_fpclass_pd_mask (x512, 13); + m = _mm256_fpclass_pd_mask (x256, 13); + m = _mm_fpclass_pd_mask (x128, 13); + m = _mm512_mask_fpclass_pd_mask (2, x512, 13); + m = _mm256_mask_fpclass_pd_mask (2, x256, 13); + m = _mm_mask_fpclass_pd_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c new file mode 100644 index 00000000000..c6610fded40 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c @@ -0,0 +1,74 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#include <math.h> +#include <values.h> +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +#ifndef __FPCLASSPD__ +#define __FPCLASSPD__ +int check_fp_class_dp (double src, int imm) +{ + int qNaN_res = isnan (src); + int sNaN_res = isnan (src); + int Pzero_res = (src == 0.0); + int Nzero_res = (src == -0.0); + int PInf_res = (isinf (src) == 1); + int NInf_res = (isinf (src) == -1); + int Denorm_res = (fpclassify (src) == FP_SUBNORMAL); + int FinNeg_res = finite (src) && (src < 0); + + int result = (((imm & 1) && qNaN_res) + || (((imm >> 1) & 1) && Pzero_res) + || (((imm >> 2) & 1) && Nzero_res) + || (((imm >> 3) & 1) && PInf_res) + || (((imm >> 4) & 1) && NInf_res) + || (((imm >> 5) & 1) && Denorm_res) + || (((imm >> 6) & 1) && FinNeg_res) + || (((imm >> 7) & 1) && sNaN_res)); + return result; +} +#endif + +CALC (double *s1, int imm) +{ + int i; + __mmask8 res = 0; + + for (i = 0; i < SIZE; i++) + if (check_fp_class_dp(s1[i], imm)) + res = res | (1 << i); + + return res; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, d) src; + __mmask8 res1, res2, res_ref = 0; + MASK_TYPE mask = MASK_VALUE; + + src.a[0] = NAN; + src.a[1] = 1.0 / 0.0; + for (i = 2; i < SIZE; i++) + { + src.a[i] = -24.43 + 0.6 * i; + } + + res1 = INTRINSIC (_fpclass_pd_mask) (src.x, 0xFF); + res2 = INTRINSIC (_mask_fpclass_pd_mask) (mask, src.x, 0xFF); + + res_ref = CALC (src.a, 0xFF); + + if (res_ref != res1) + abort (); + + if ((res_ref & mask) != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c new file mode 100644 index 00000000000..b6da5e72770 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n^k\]*%k\[1-7\]\{" 1 } } */ + +#include <immintrin.h> + +volatile __m512 x512; +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + m16 = _mm512_fpclass_ps_mask (x512, 13); + m8 = _mm256_fpclass_ps_mask (x256, 13); + m8 = _mm_fpclass_ps_mask (x128, 13); + m16 = _mm512_mask_fpclass_ps_mask (2, x512, 13); + m8 = _mm256_mask_fpclass_ps_mask (2, x256, 13); + m8 = _mm_mask_fpclass_ps_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c new file mode 100644 index 00000000000..8aba38d4cfe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c @@ -0,0 +1,75 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#include <math.h> +#include <values.h> +#include "avx512f-mask-type.h" +#define SIZE (AVX512F_LEN / 32) + +#ifndef __FPCLASSPD__ +#define __FPCLASSPD__ +int check_fp_class_sp (float src, int imm) +{ + int qNaN_res = isnan (src); + int sNaN_res = isnan (src); + int Pzero_res = (src == 0.0); + int Nzero_res = (src == -0.0); + int PInf_res = (isinf (src) == 1); + int NInf_res = (isinf (src) == -1); + int Denorm_res = (fpclassify (src) == FP_SUBNORMAL); + int FinNeg_res = finite (src) && (src < 0); + + int result = (((imm & 1) && qNaN_res) + || (((imm >> 1) & 1) && Pzero_res) + || (((imm >> 2) & 1) && Nzero_res) + || (((imm >> 3) & 1) && PInf_res) + || (((imm >> 4) & 1) && NInf_res) + || (((imm >> 5) & 1) && Denorm_res) + || (((imm >> 6) & 1) && FinNeg_res) + || (((imm >> 7) & 1) && sNaN_res)); + return result; +} +#endif + +CALC (float *s1, int imm) +{ + int i; + MASK_TYPE res = 0; + + for (i = 0; i < SIZE; i++) + if (check_fp_class_sp(s1[i], imm)) + res = res | (1 << i); + + return res; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN,) src; + MASK_TYPE res1, res2, res_ref = 0; + MASK_TYPE mask = MASK_VALUE; + + src.a[0] = NAN; + src.a[1] = 1.0 / 0.0; + for (i = 2; i < SIZE; i++) + { + src.a[i] = -24.43 + 0.6 * i; + } + + res1 = INTRINSIC (_fpclass_ps_mask) (src.x, 0xFF); + res2 = INTRINSIC (_mask_fpclass_ps_mask) (mask, src.x, 0xFF); + + + res_ref = CALC (src.a, 0xFF); + + if (res_ref != res1) + abort (); + + if ((mask & res_ref) != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasssd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasssd-1.c new file mode 100644 index 00000000000..c1b5caab991 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasssd-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler "vfpclasssd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m128d x128; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + m8 = _mm_fpclass_sd_mask (x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassss-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassss-1.c new file mode 100644 index 00000000000..2f4756ea279 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassss-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler "vfpclassss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m128 x128; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + m8 = _mm_fpclass_ss_mask (x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf32x8-1.c new file mode 100644 index 00000000000..26f36c49c27 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf32x8-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vinsertf32x8\[ \\t\]+\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf32x8\[ \\t\]+\[^\n\]*\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf32x8\[ \\t\]+\[^\n\]*" 3 } } */ + +#include <immintrin.h> + +volatile __m512 x; +volatile __m256 y; + +void extern +avx512dq_test (void) +{ + x = _mm512_insertf32x8 (x, y, 1); + x = _mm512_mask_insertf32x8 (x, 2, x, y, 1); + x = _mm512_maskz_insertf32x8 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-1.c new file mode 100644 index 00000000000..8476a36b2c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm" 3 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*zmm" 3 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d y; +volatile __m512d z; + +void extern +avx512dq_test (void) +{ + x = _mm256_insertf64x2 (x, y, 1); + x = _mm256_mask_insertf64x2 (x, 2, x, y, 1); + x = _mm256_maskz_insertf64x2 (2, x, y, 1); + z = _mm512_insertf64x2 (z, y, 1); + z = _mm512_mask_insertf64x2 (z, 2, z, y, 1); + z = _mm512_maskz_insertf64x2 (2, z, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-2.c new file mode 100644 index 00000000000..00c1c8018db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinsertf64x2-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" +#include "string.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (UNION_TYPE (AVX512F_LEN, d) s1, union128d s2, + double *res_ref, int mask) +{ + memcpy (res_ref, s1.a, SIZE * sizeof (double)); + memcpy (res_ref + mask * 2, s2.a, 16); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s1, res1, res2, res3; + union128d s2; + double res_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int j; + + for (j = 0; j < SIZE; j++) + { + s1.a[j] = j * j; + res1.a[j] = DEFAULT_VALUE; + res2.a[j] = DEFAULT_VALUE; + res3.a[j] = DEFAULT_VALUE; + } + + for (j = 0; j < 2; j++) + s2.a[j] = j * j * j; + + res1.x = INTRINSIC (_insertf64x2) (s1.x, s2.x, 1); + res2.x = INTRINSIC (_mask_insertf64x2) (res2.x, mask, s1.x, s2.x, 1); + res3.x = INTRINSIC (_maskz_insertf64x2) (mask, s1.x, s2.x, 1); + + CALC (s1, s2, res_ref, 1); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinserti32x8-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti32x8-1.c new file mode 100644 index 00000000000..9bebd6836b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti32x8-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vinserti32x8\[ \\t\]+\[^\n\]*" 3 } } */ +/* { dg-final { scan-assembler-times "vinserti32x8\[ \\t\]+\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti32x8\[ \\t\]+\[^\n\]*\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i x; +volatile __m256i y; + +void extern +avx512dq_test (void) +{ + x = _mm512_inserti32x8 (x, y, 1); + x = _mm512_mask_inserti32x8 (x, 2, x, y, 1); + x = _mm512_maskz_inserti32x8 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-1.c new file mode 100644 index 00000000000..22d8f1132ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm" 3 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*zmm" 3 } } */ + +#include <immintrin.h> + +volatile __m512i z; +volatile __m256i x; +volatile __m128i y; + +void extern +avx512dq_test (void) +{ + x = _mm256_inserti64x2 (x, y, 1); + x = _mm256_mask_inserti64x2 (x, 2, x, y, 1); + x = _mm256_maskz_inserti64x2 (2, x, y, 1); + z = _mm512_inserti64x2 (z, y, 0); + z = _mm512_mask_inserti64x2 (z, 2, z, y, 0); + z = _mm512_maskz_inserti64x2 (2, z, y, 0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-2.c new file mode 100644 index 00000000000..63ed54ea0b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vinserti64x2-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" +#include "string.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (UNION_TYPE (AVX512F_LEN, i_q) s1, union128i_q s2, + long long *res_ref, int mask) +{ + memcpy (res_ref, s1.a, SIZE * sizeof (long long)); + memcpy (res_ref + mask * 2, s2.a, 16); +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) s1, res1, res2, res3; + union128i_q s2; + long long res_ref[SIZE]; + MASK_TYPE mask = MASK_VALUE; + int j; + + for (j = 0; j < SIZE; j++) + { + s1.a[j] = j * j; + res1.a[j] = DEFAULT_VALUE; + res2.a[j] = DEFAULT_VALUE; + res3.a[j] = DEFAULT_VALUE; + } + + for (j = 0; j < 2; j++) + s2.a[j] = j * j * j; + + res1.x = INTRINSIC (_inserti64x2) (s1.x, s2.x, 1); + res2.x = INTRINSIC (_mask_inserti64x2) (res2.x, mask, s1.x, s2.x, 1); + res3.x = INTRINSIC (_maskz_inserti64x2) (mask, s1.x, s2.x, 1); + + CALC (s1, s2, res_ref, 1); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) + abort (); + + MASK_MERGE (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) + abort (); + + MASK_ZERO (i_q) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-1.c new file mode 100644 index 00000000000..97383c1af69 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d z; +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + z = _mm512_or_pd (z, z); + z = _mm512_mask_or_pd (z, m, z, z); + z = _mm512_maskz_or_pd (m, z, z); + + y = _mm256_mask_or_pd (y, m, y, y); + y = _mm256_maskz_or_pd (m, y, y); + + x = _mm_mask_or_pd (x, m, x, x); + x = _mm_maskz_or_pd (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-2.c new file mode 100644 index 00000000000..c5ef0309ebe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vorpd-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *src1, double *src2, double *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + long long tmp = (*(long long *) &src1[i]) | (*(long long *) &src2[i]); + dst[i] = *(double *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,d) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double dst_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) { + s1.a[i] = 132.45 * i; + s2.a[i] = 43.6 - i * 4.4; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_or_pd) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_or_pd) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_or_pd) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN,d) (res1, dst_ref)) + abort (); + + MASK_MERGE (d) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,d) (res2, dst_ref)) + abort (); + + MASK_ZERO (d) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,d) (res3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vorps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vorps-1.c new file mode 100644 index 00000000000..7f042868431 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vorps-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 z; +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 n; +volatile __mmask16 m; + +void extern +avx512dq_test (void) +{ + z = _mm512_or_ps (z, z); + z = _mm512_mask_or_ps (z, m, z, z); + z = _mm512_maskz_or_ps (m, z, z); + + y = _mm256_mask_or_ps (y, n, y, y); + y = _mm256_maskz_or_ps (n, y, y); + + x = _mm_mask_or_ps (x, n, x, x); + x = _mm_maskz_or_ps (n, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vorps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vorps-2.c new file mode 100644 index 00000000000..87d8e02a524 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vorps-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +void +CALC (float *src1, float *src2, float *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + int tmp = (*(int *) &src1[i]) | (*(int *) &src2[i]); + dst[i] = *(float *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float dst_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) { + s1.a[i] = 132.45 * i; + s2.a[i] = 43.6 - i * 4.4; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_or_ps) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_or_ps) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_or_ps) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN,) (res1, dst_ref)) + abort (); + + MASK_MERGE () (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res2, dst_ref)) + abort (); + + MASK_ZERO () (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-1.c new file mode 100644 index 00000000000..c76bdec47e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovd2m\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovd2m\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovd2m\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; + +void extern +avx512dq_test (void) +{ + m8 = _mm_movepi32_mask (x128); + m8 = _mm256_movepi32_mask (x256); + m16 = _mm512_movepi32_mask (x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-2.c new file mode 100644 index 00000000000..9693fb6f2af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovd2m-2.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, int *s1) +{ + int i; + MASK_TYPE res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >> 31) + res = res | (one << i); + + *r = res; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_d) src; + MASK_TYPE res, res_ref = 0; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 2 * i * sign; + sign = sign * -1; + } + + res = INTRINSIC (_movepi32_mask) (src.x); + + CALC (&res_ref, src.a); + + if (res_ref != res) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-1.c new file mode 100644 index 00000000000..5afd552492d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovm2d\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%xmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2d\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%ymm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2d\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%zmm\[0-9\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + x128 = _mm_movm_epi32 (m8); + x256 = _mm256_movm_epi32 (m8); + x512 = _mm512_movm_epi32 (m16); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-2.c new file mode 100644 index 00000000000..9ec250ffc98 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2d-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +CALC (int *r, MASK_TYPE s) +{ + int i; + int all_ones = 0xffffffff; + + for (i = 0; i < SIZE; i++) + r[i] = ((s >> i) & 1) ? all_ones : 0; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_d) res, res_ref; + MASK_TYPE src = (MASK_TYPE) 0x1111; + + res.x = INTRINSIC (_movm_epi32) (src); + + CALC (res_ref.a, src); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res, res_ref.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-1.c new file mode 100644 index 00000000000..a71599e5560 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovm2q\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%xmm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2q\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%ymm\[0-9\]" } } */ +/* { dg-final { scan-assembler "vpmovm2q\[ \\t\]+\[^\n\]*%k\[1-7\]\[^\n\]*%zmm\[0-9\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + x128 = _mm_movm_epi64 (m8); + x256 = _mm256_movm_epi64 (m8); + x512 = _mm512_movm_epi64 (m8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-2.c new file mode 100644 index 00000000000..1a1c187e484 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovm2q-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (long long *r, MASK_TYPE s) +{ + int i; + long long all_ones = 0xffffffffffffffff; + + for (i = 0; i < SIZE; i++) + r[i] = ((s >> i) & 1) ? all_ones : 0; +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_q) res, res_ref; + MASK_TYPE src = (MASK_TYPE) 0xff; + + res.x = INTRINSIC (_movm_epi64) (src); + + CALC (res_ref.a, src); + + if (UNION_CHECK (AVX512F_LEN, i_q) (res, res_ref.a)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-1.c new file mode 100644 index 00000000000..8ce3694da9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpmovq2m\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovq2m\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ +/* { dg-final { scan-assembler "vpmovq2m\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]" } } */ + +#include <immintrin.h> + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + m8 = _mm_movepi64_mask (x128); + m8 = _mm256_movepi64_mask (x256); + m8 = _mm512_movepi64_mask (x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-2.c new file mode 100644 index 00000000000..24b3c552ac2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmovq2m-2.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +CALC (MASK_TYPE *r, long long *s1) +{ + int i; + MASK_TYPE res = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >> 63) + res = res | (one << i); + + *r = res; +} + +void +TEST (void) +{ + int i, sign; + UNION_TYPE (AVX512F_LEN, i_q) src; + MASK_TYPE res, res_ref = 0; + + sign = -1; + for (i = 0; i < SIZE; i++) + { + src.a[i] = 2 * i * sign; + sign = sign * -1; + } + + res = INTRINSIC (_movepi64_mask) (src.x); + + CALC (&res_ref, src.a); + + if (res_ref != res) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-1.c new file mode 100644 index 00000000000..25124ebc828 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmullq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i _x1, _y1, _z1; +volatile __m256i _x2, _y2, _z2; +volatile __m128i _x3, _y3, _z3; + +void extern +avx512dq_test (void) +{ + _x3 = _mm_mullo_epi64 (_y3, _z3); + _x3 = _mm_mask_mullo_epi64 (_x3, 2, _y3, _z3); + _x3 = _mm_maskz_mullo_epi64 (2, _y3, _z3); + _x2 = _mm256_mullo_epi64 (_y2, _z2); + _x2 = _mm256_mask_mullo_epi64 (_x2, 3, _y2, _z2); + _x2 = _mm256_maskz_mullo_epi64 (3, _y2, _z2); + _x1 = _mm512_mullo_epi64 (_y1, _z1); + _x1 = _mm512_mask_mullo_epi64 (_x1, 3, _y1, _z1); + _x1 = _mm512_maskz_mullo_epi64 (3, _y1, _z1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-2.c new file mode 100644 index 00000000000..2184834d807 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vpmullq-2.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (long long *src1, long long *src2, long long *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + dst[i] = src1[i] * src2[i]; +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, i_q) src1, src2, dst1, dst2, dst3; + long long dst_ref[SIZE]; + int i; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = i + 50; + src2.a[i] = i + 100; + dst2.a[i] = DEFAULT_VALUE; + } + + dst1.x = INTRINSIC (_mullo_epi64) (src1.x, src2.x); + dst2.x = INTRINSIC (_mask_mullo_epi64) (dst2.x, mask, src1.x, src2.x); + dst3.x = INTRINSIC (_maskz_mullo_epi64) (mask, src1.x, src2.x); + CALC (src1.a, src2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN, i_q) (dst1, dst_ref)) + abort (); + + MASK_MERGE (i_q) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (dst2, dst_ref)) + abort (); + + MASK_ZERO (i_q) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_q) (dst3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-1.c new file mode 100644 index 00000000000..45f7b27dcc8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d z; +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + z = _mm512_range_round_pd (z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_range_pd (z, z, 15); + y = _mm256_range_pd (y, y, 15); + x = _mm_range_pd (x, x, 15); + + z = _mm512_mask_range_round_pd (z, m, z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_mask_range_pd (z, m, z, z, 15); + y = _mm256_mask_range_pd (y, m, y, y, 15); + x = _mm_mask_range_pd (x, m, x, x, 15); + + z = _mm512_maskz_range_round_pd (m, z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_maskz_range_pd (m, z, z, 15); + y = _mm256_maskz_range_pd (m, y, y, 15); + x = _mm_maskz_range_pd (m, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-2.c new file mode 100644 index 00000000000..fc032fbc507 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangepd-2.c @@ -0,0 +1,59 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" +#define IMM 0x02 + +void +CALC (double *s1, double *s2, double *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + if (s1[i] < -s2[i]) + r[i] = -s2[i]; + else if (s1[i] > s2[i]) + r[i] = s2[i]; + else + r[i] = s1[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 234.567 * i * sign; + s2.a[i] = 100 * (i + 1); + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_range_pd) (s1.x, s2.x, IMM); + res2.x = INTRINSIC (_mask_range_pd) (res2.x, mask, s1.x, s2.x, IMM); + res3.x = INTRINSIC (_maskz_range_pd) (mask, s1.x, s2.x, IMM); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-1.c new file mode 100644 index 00000000000..71e259ff8c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-1.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 z; +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m8; +volatile __mmask16 m16; + +void extern +avx512dq_test (void) +{ + z = _mm512_range_round_ps (z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_range_ps (z, z, 15); + y = _mm256_range_ps (y, y, 15); + x = _mm_range_ps (x, x, 15); + + z = _mm512_mask_range_round_ps (z, m16, z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_mask_range_ps (z, m16, z, z, 15); + y = _mm256_mask_range_ps (y, m8, y, y, 15); + x = _mm_mask_range_ps (x, m8, x, x, 15); + + z = _mm512_maskz_range_round_ps (m16, z, z, 15, _MM_FROUND_NO_EXC); + z = _mm512_maskz_range_ps (m16, z, z, 15); + y = _mm256_maskz_range_ps (m8, y, y, 15); + x = _mm_maskz_range_ps (m8, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-2.c new file mode 100644 index 00000000000..373260abd79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangeps-2.c @@ -0,0 +1,59 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" +#define IMM 0x02 + +void +CALC (float *s1, float *s2, float *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + if (s1[i] < -s2[i]) + r[i] = -s2[i]; + else if (s1[i] > s2[i]) + r[i] = s2[i]; + else + r[i] = s1[i]; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, ) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s1.a[i] = 234.567 * i * sign; + s2.a[i] = 100 * (i + 1); + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_range_ps) (s1.x, s2.x, IMM); + res2.x = INTRINSIC (_mask_range_ps) (res2.x, mask, s1.x, s2.x, IMM); + res3.x = INTRINSIC (_maskz_range_ps) (mask, s1.x, s2.x, IMM); + + CALC (s1.a, s2.a, res_ref); + + if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref)) + abort (); + + MASK_MERGE () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref)) + abort (); + + MASK_ZERO () (res_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangesd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangesd-1.c new file mode 100644 index 00000000000..21f48113c1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangesd-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m128d x1, x2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm_range_sd (x1, x2, 3); + x1 = _mm_range_round_sd (x1, x2, 3, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vrangess-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vrangess-1.c new file mode 100644 index 00000000000..0f5e750b676 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vrangess-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ + +#include <immintrin.h> + +volatile __m128 x1, x2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm_range_ss (x1, x2, 1); + x1 = _mm_range_round_ss (x1, x2, 1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-1.c new file mode 100644 index 00000000000..ce70cd7152a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-1.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m512d x1; +volatile __m256d x2; +volatile __m128d x3; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_reduce_pd (x1, IMM); + x2 = _mm256_reduce_pd (x2, IMM); + x3 = _mm_reduce_pd (x3, IMM); + + x1 = _mm512_mask_reduce_pd (x1, m, x1, IMM); + x2 = _mm256_mask_reduce_pd (x2, m, x2, IMM); + x3 = _mm_mask_reduce_pd (x3, m, x3, IMM); + + x1 = _mm512_maskz_reduce_pd (m, x1, IMM); + x2 = _mm256_maskz_reduce_pd (m, x2, IMM); + x3 = _mm_maskz_reduce_pd (m, x3, IMM); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-2.c new file mode 100644 index 00000000000..3e231ab9d2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +#define IMM 0x23 + +void +CALC (double *s, double *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + double tmp = (int) (4 * s[i]) / 4.0; + r[i] = s[i] - tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_reduce_pd) (s.x, IMM); + res2.x = INTRINSIC (_mask_reduce_pd) (res2.x, mask, s.x, IMM); + res3.x = INTRINSIC (_maskz_reduce_pd) (mask, s.x, IMM); + + CALC (s.a, res_ref); + + if (UNION_FP_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-1.c new file mode 100644 index 00000000000..cdc3fb963ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m512 x1; +volatile __m256 x2; +volatile __m128 x3; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512dq_test (void) +{ + x1 = _mm512_reduce_ps (x1, IMM); + x2 = _mm256_reduce_ps (x2, IMM); + x3 = _mm_reduce_ps (x3, IMM); + + x1 = _mm512_mask_reduce_ps (x1, m16, x1, IMM); + x2 = _mm256_mask_reduce_ps (x2, m8, x2, IMM); + x3 = _mm_mask_reduce_ps (x3, m8, x3, IMM); + + x1 = _mm512_maskz_reduce_ps (m16, x1, IMM); + x2 = _mm256_maskz_reduce_ps (m8, x2, IMM); + x3 = _mm_maskz_reduce_ps (m8, x3, IMM); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-2.c new file mode 100644 index 00000000000..97afd2ad93e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-2.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +#define IMM 0x23 + +void +CALC (float *s, float *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + float tmp = (int) (4 * s[i]) / 4.0; + r[i] = s[i] - tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_reduce_ps) (s.x, IMM); + res2.x = INTRINSIC (_mask_reduce_ps) (res2.x, mask, s.x, IMM); + res3.x = INTRINSIC (_maskz_reduce_ps) (mask, s.x, IMM); + + CALC (s.a, res_ref); + + if (UNION_FP_CHECK (AVX512F_LEN,) (res1, res_ref)) + abort (); + + MASK_MERGE () (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN,) (res2, res_ref)) + abort (); + + MASK_ZERO () (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c new file mode 100644 index 00000000000..f6a4a283098 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m128d x1, x2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm_reduce_sd (x1, x2, 123); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c new file mode 100644 index 00000000000..0d51b6119df --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m128 x1, x2; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + x1 = _mm_reduce_ss (x1, x2, 123); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-1.c new file mode 100644 index 00000000000..42ea18d592e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512d z; +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + + +void extern +avx512dq_test (void) +{ + z = _mm512_xor_pd (z, z); + z = _mm512_mask_xor_pd (z, m, z, z); + z = _mm512_maskz_xor_pd (m, z, z); + + y = _mm256_mask_xor_pd (y, m, y, y); + y = _mm256_maskz_xor_pd (m, y, y); + + x = _mm_mask_xor_pd (x, m, x, x); + x = _mm_maskz_xor_pd (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-2.c new file mode 100644 index 00000000000..060861a9264 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vxorpd-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +void +CALC (double *src1, double *src2, double *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + long long tmp = (*(long long *) &src1[i]) ^ (*(long long *) &src2[i]); + dst[i] = *(double *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,d) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double dst_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) { + s1.a[i] = 132.45 * i; + s2.a[i] = 43.6 - i * 4.4; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_xor_pd) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_xor_pd) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_xor_pd) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN,d) (res1, dst_ref)) + abort (); + + MASK_MERGE (d) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,d) (res2, dst_ref)) + abort (); + + MASK_ZERO (d) (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,d) (res3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-1.c new file mode 100644 index 00000000000..561785209d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vxorps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512 z; +volatile __m256 y; +volatile __m128 x; +volatile __mmask16 m; +volatile __mmask8 n; + +void extern +avx512dq_test (void) +{ + z = _mm512_xor_ps (z, z); + z = _mm512_mask_xor_ps (z, m, z, z); + z = _mm512_maskz_xor_ps (m, z, z); + + y = _mm256_mask_xor_ps (y, n, y, y); + y = _mm256_maskz_xor_ps (n, y, y); + + x = _mm_mask_xor_ps (x, n, x, x); + x = _mm_maskz_xor_ps (n, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-2.c new file mode 100644 index 00000000000..5360c04f12e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vxorps-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -DAVX512DQ" } */ +/* { dg-require-effective-target avx512dq } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +void +CALC (float *src1, float *src2, float *dst) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + int tmp = (*(int *) &src1[i]) ^ (*(int *) &src2[i]); + dst[i] = *(float *) &tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,) s1, s2, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float dst_ref[SIZE]; + int i; + + for (i = 0; i < SIZE; i++) { + s1.a[i] = 132.45 * i; + s2.a[i] = 43.6 - i * 4.4; + res2.a[i] = DEFAULT_VALUE; + } + + res1.x = INTRINSIC (_xor_ps) (s1.x, s2.x); + res2.x = INTRINSIC (_mask_xor_ps) (res2.x, mask, s1.x, s2.x); + res3.x = INTRINSIC (_maskz_xor_ps) (mask, s1.x, s2.x); + + CALC (s1.a, s2.a, dst_ref); + + if (UNION_CHECK (AVX512F_LEN,) (res1, dst_ref)) + abort (); + + MASK_MERGE () (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res2, dst_ref)) + abort (); + + MASK_ZERO () (dst_ref, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN,) (res3, dst_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-helper.h b/gcc/testsuite/gcc.target/i386/avx512f-helper.h index 9beabdf5e43..04a1a89da51 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-helper.h +++ b/gcc/testsuite/gcc.target/i386/avx512f-helper.h @@ -1,16 +1,25 @@ /* This file is used to reduce a number of runtime tests for AVX512F - instructions. Idea is to create one file per instruction - + and AVX512VL instructions. Idea is to create one file per instruction - avx512f-insn-2.c - using defines from this file instead of intrinsic name, vector length etc. Then dg-options are set with appropriate -Dwhatever options in that .c file producing tests for specific length. */ -#if defined (AVX512F) +#ifndef AVX512F_HELPER_INCLUDED +#define AVX512F_HELPER_INCLUDED + +#if defined (AVX512F) && !defined (AVX512VL) #include "avx512f-check.h" #elif defined (AVX512ER) #include "avx512er-check.h" #elif defined (AVX512CD) #include "avx512cd-check.h" +#elif defined (AVX512DQ) +#include "avx512dq-check.h" +#elif defined (AVX512BW) +#include "avx512bw-check.h" +#elif defined (AVX512VL) +#include "avx512vl-check.h" #endif /* Macros expansion. */ @@ -73,8 +82,7 @@ MAKE_MASK_ZERO(i_uq, unsigned long long) #define MASK_ZERO(TYPE) zero_masking_##TYPE -/* Intrinsic being tested. */ -#define INTRINSIC(NAME) EVAL(_mm, AVX512F_LEN, NAME) + /* Unions used for testing (for example union512d, union256d etc.). */ #define UNION_TYPE(SIZE, NAME) EVAL(union, SIZE, NAME) /* Corresponding union check. */ @@ -89,12 +97,17 @@ MAKE_MASK_ZERO(i_uq, unsigned long long) /* Function which calculates result. */ #define CALC EVAL(calc_, AVX512F_LEN,) +#ifndef AVX512VL #define AVX512F_LEN 512 #define AVX512F_LEN_HALF 256 +void test_512 (); +#endif void test_512 (); +void test_256 (); +void test_128 (); -#if defined (AVX512F) +#if defined (AVX512F) && !defined (AVX512VL) void avx512f_test (void) { test_512 (); } #elif defined (AVX512CD) @@ -103,4 +116,28 @@ avx512cd_test (void) { test_512 (); } #elif defined (AVX512ER) void avx512er_test (void) { test_512 (); } +#elif defined (AVX512DQ) +void +avx512dq_test (void) { test_512 (); } +#elif defined (AVX512BW) +void +avx512bw_test (void) { test_512 (); } +#elif defined (AVX512VL) +void +avx512vl_test (void) { test_256 (); test_128 (); } +#endif + +#endif /* AVX512F_HELPER_INCLUDED */ + +/* Intrinsic being tested. It has different deffinitions, + depending on AVX512F_LEN, so it's outside include guards + and in undefed away to silence warnings. */ +#if defined INTRINSIC +#undef INTRINSIC +#endif + +#if AVX512F_LEN != 128 +#define INTRINSIC(NAME) EVAL(_mm, AVX512F_LEN, NAME) +#else +#define INTRINSIC(NAME) _mm ## NAME #endif diff --git a/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h index 2dacdd67a2a..efece198e51 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h +++ b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h @@ -1,10 +1,30 @@ /* Type of mask. */ #if SIZE <= 8 +#undef MASK_TYPE +#undef MASK_VALUE +#undef MASK_ALL_ONES #define MASK_TYPE __mmask8 #define MASK_VALUE 0xB9 #define MASK_ALL_ONES 0xFF #elif SIZE <= 16 +#undef MASK_TYPE +#undef MASK_VALUE +#undef MASK_ALL_ONES #define MASK_TYPE __mmask16 #define MASK_VALUE 0xA6BA #define MASK_ALL_ONES 0xFFFF +#elif SIZE <= 32 +#undef MASK_TYPE +#undef MASK_VALUE +#undef MASK_ALL_ONES +#define MASK_TYPE __mmask32 +#define MASK_VALUE 0xA6BAAB6A +#define MASK_ALL_ONES 0xFFFFFFFFu +#elif SIZE <= 64 +#undef MASK_TYPE +#undef MASK_VALUE +#undef MASK_ALL_ONES +#define MASK_TYPE __mmask64 +#define MASK_VALUE 0xA6BAA6BAB6AB6ABB +#define MASK_ALL_ONES 0xFFFFFFFFFFFFFFFFull #endif diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c index a81f36256cd..52e226d9f15 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c @@ -26,6 +26,38 @@ if ((dst_ref & mask) != dst2) abort(); #endif +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = (((int) rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_pd(s1); \ + source2.x = _mm256_loadu_pd(s2); \ + dst1 = _mm256_cmp_pd_mask(source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_pd_mask(mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((dst_ref & mask) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 2; i++) \ + { \ + dst_ref = (((int) rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_pd(s1); \ + source2.x = _mm_loadu_pd(s2); \ + dst1 = _mm_cmp_pd_mask(source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_pd_mask(mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((dst_ref & mask) != dst2) abort(); +#endif + void TEST () { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c index 88dc8908596..2ffa2ed16b7 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c @@ -12,6 +12,7 @@ #include "avx512f-mask-type.h" #if AVX512F_LEN == 512 +#undef CMP #define CMP(imm, rel) \ dst_ref = 0; \ for (i = 0; i < 16; i++) \ @@ -26,6 +27,38 @@ if ((dst_ref & mask) != dst2) abort(); #endif +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 8; i++) \ + { \ + dst_ref = (((int) rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_ps(s1); \ + source2.x = _mm256_loadu_ps(s2); \ + dst1 = _mm256_cmp_ps_mask(source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_ps_mask(mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((dst_ref & mask) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = (((int) rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_ps(s1); \ + source2.x = _mm_loadu_ps(s2); \ + dst1 = _mm_cmp_ps_mask(source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_ps_mask(mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((dst_ref & mask) != dst2) abort(); +#endif + void TEST () { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c index e79e014e61d..dde7c12c8ad 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c @@ -15,6 +15,8 @@ CALC (float *e, UNION_TYPE (AVX512F_LEN, d) s1) int i; for (i = 0; i < SIZE; i++) e[i] = (float) s1.a[i]; + for (i = SIZE; i < AVX512F_LEN_HALF / 32; i++) + e[i] = 0.0; } void diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c index ec98f4b3ad5..5cf110f92ac 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c @@ -67,9 +67,9 @@ TEST (void) val.a[15] = 0xc800; #endif - res1.x = _mm512_cvtph_ps (val.x); - res2.x = _mm512_mask_cvtph_ps (res2.x, mask, val.x); - res3.x = _mm512_maskz_cvtph_ps (mask, val.x); + res1.x = INTRINSIC (_cvtph_ps) (val.x); + res2.x = INTRINSIC (_mask_cvtph_ps) (res2.x, mask, val.x); + res3.x = INTRINSIC (_maskz_cvtph_ps) (mask, val.x); if (UNION_CHECK (AVX512F_LEN,) (res1, exp)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c index 540bf29a4f9..e4f21a6e4b1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c @@ -15,7 +15,11 @@ TEST (void) UNION_TYPE (AVX512F_LEN,) val; UNION_TYPE (AVX512F_LEN_HALF, i_w) res1,res2,res3; MASK_TYPE mask = MASK_VALUE; +#if AVX512F_LEN == 128 + short exp[SIZE * 2]; +#else short exp[SIZE]; +#endif int i; for (i = 0; i < SIZE; i++) @@ -55,6 +59,11 @@ TEST (void) exp[5] = 0xc000; exp[6] = 0xc400; exp[7] = 0xc800; +#else + exp[4] = 0; + exp[5] = 0; + exp[6] = 0; + exp[7] = 0; #endif #if AVX512F_LEN > 256 exp[8] = 0x3c00; @@ -67,9 +76,9 @@ TEST (void) exp[15] = 0xc800; #endif - res1.x = _mm512_cvtps_ph (val.x, 0); - res2.x = _mm512_mask_cvtps_ph (res2.x, mask, val.x, 0); - res3.x = _mm512_maskz_cvtps_ph (mask, val.x, 0); + res1.x = INTRINSIC (_cvtps_ph (val.x, 0)); + res2.x = INTRINSIC (_mask_cvtps_ph (res2.x, mask, val.x, 0)); + res3.x = INTRINSIC (_maskz_cvtps_ph (mask, val.x, 0)); if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, exp)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c index b5654d2fe8c..55786bc6289 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c @@ -34,18 +34,22 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_and_si512) (s1.x, s2.x); res2.x = INTRINSIC (_and_epi32) (s1.x, s2.x); +#endif res3.x = INTRINSIC (_mask_and_epi32) (res3.x, mask, s1.x, s2.x); res4.x = INTRINSIC (_maskz_and_epi32) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) abort (); if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) abort (); +#endif MASK_MERGE (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c index 418b96e6edf..b5c071944db 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c @@ -34,18 +34,22 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_andnot_si512) (s1.x, s2.x); res2.x = INTRINSIC (_andnot_epi32) (s1.x, s2.x); +#endif res3.x = INTRINSIC (_mask_andnot_epi32) (res3.x, mask, s1.x, s2.x); res4.x = INTRINSIC (_maskz_andnot_epi32) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) abort (); if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) abort (); +#endif MASK_MERGE (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c index 585d2885991..9b7512bcdf8 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c @@ -34,14 +34,18 @@ TEST (void) res2.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_andnot_epi64) (s1.x, s2.x); +#endif res2.x = INTRINSIC (_mask_andnot_epi64) (res2.x, mask, s1.x, s2.x); res3.x = INTRINSIC (_maskz_andnot_epi64) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) abort (); +#endif MASK_MERGE (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c index b2f39456449..3493830d504 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c @@ -34,14 +34,18 @@ TEST (void) res2.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_and_epi64) (s1.x, s2.x); +#endif res2.x = INTRINSIC (_mask_and_epi64) (res2.x, mask, s1.x, s2.x); res3.x = INTRINSIC (_maskz_and_epi64) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) abort (); +#endif MASK_MERGE (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c index cbd9d7b85d4..9cfa63d98b1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c @@ -54,7 +54,9 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) abort (); +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_set1_epi64) (src.a[0]); +#endif res2.x = INTRINSIC (_mask_set1_epi64) (res2.x, mask, src.a[0]); res3.x = INTRINSIC (_maskz_set1_epi64) (mask, src.a[0]); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c index 3a2dccfd4bd..9479f896af3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c @@ -11,6 +11,7 @@ #include "avx512f-mask-type.h" #if AVX512F_LEN == 512 +#undef CMP #define CMP(imm, rel) \ dst_ref = 0; \ for (i = 0; i < 16; i++) \ @@ -25,6 +26,38 @@ if ((mask & dst_ref) != dst2) abort(); #endif +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 8; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epi32_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epi32_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epi32_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epi32_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + void TEST () { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c index 7c9b888b255..857b04e6999 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c @@ -12,6 +12,8 @@ __mmask8 dst_ref; +#if AVX512F_LEN == 512 +#undef CMP #define CMP(imm, rel) \ dst_ref = 0; \ for (i = 0; i < 8; i++) \ @@ -24,6 +26,39 @@ __mmask8 dst_ref; dst2 = _mm512_mask_cmp_epi64_mask (mask, source1.x, source2.x, imm);\ if (dst_ref != dst1) abort(); \ if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epi64_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epi64_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 2; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epi64_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epi64_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif void TEST () diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c index 7a1ed898271..3f09e7d3ea0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c @@ -11,6 +11,7 @@ #include "avx512f-mask-type.h" #if AVX512F_LEN == 512 +#undef CMP #define CMP(imm, rel) \ dst_ref = 0; \ for (i = 0; i < 16; i++) \ @@ -25,6 +26,38 @@ if ((mask & dst_ref) != dst2) abort(); #endif +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 8; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epu32_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epu32_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epu32_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epu32_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + void TEST () { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c index f8db6c643a9..11eb6ffebcd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c @@ -11,6 +11,7 @@ #include "avx512f-mask-type.h" #if AVX512F_LEN == 512 +#undef CMP #define CMP(imm, rel) \ dst_ref = 0; \ for (i = 0; i < 8; i++) \ @@ -25,6 +26,38 @@ if ((mask & dst_ref) != dst2) abort(); #endif +#if AVX512F_LEN == 256 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 4; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm256_loadu_si256 ((__m256i*)s1); \ + source2.x = _mm256_loadu_si256 ((__m256i*)s2); \ + dst1 = _mm256_cmp_epu64_mask (source1.x, source2.x, imm);\ + dst2 = _mm256_mask_cmp_epu64_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + +#if AVX512F_LEN == 128 +#undef CMP +#define CMP(imm, rel) \ + dst_ref = 0; \ + for (i = 0; i < 2; i++) \ + { \ + dst_ref = ((rel) << i) | dst_ref; \ + } \ + source1.x = _mm_loadu_si128 ((__m128i*)s1); \ + source2.x = _mm_loadu_si128 ((__m128i*)s2); \ + dst1 = _mm_cmp_epu64_mask (source1.x, source2.x, imm);\ + dst2 = _mm_mask_cmp_epu64_mask (mask, source1.x, source2.x, imm);\ + if (dst_ref != dst1) abort(); \ + if ((mask & dst_ref) != dst2) abort(); +#endif + void TEST () { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c index 1b2ce756abb..dbd4544c39e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c @@ -17,7 +17,11 @@ CALC (int *mask, int *src1, int *dst) for (i = 0; i < SIZE; i++) { +#if AVX512F_LEN == 512 dst[i] = src1[mask[i] & 15]; +#else + dst[i] = src1[mask[i] & 7]; +#endif } } @@ -37,14 +41,18 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_permutexvar_epi32) (src1.x, src2.x); +#endif res2.x = INTRINSIC (_maskz_permutexvar_epi32) (mask, src1.x, src2.x); res3.x = INTRINSIC (_mask_permutexvar_epi32) (res3.x, mask, src1.x, src2.x); CALC (src1.a, src2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) abort (); +#endif MASK_ZERO (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c index dd88cd46c0b..770d5623f5f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c @@ -40,14 +40,18 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_permutex_epi64) (src1.x, IMM_MASK); +#endif res2.x = INTRINSIC (_maskz_permutex_epi64) (mask, src1.x, IMM_MASK); res3.x = INTRINSIC (_mask_permutex_epi64) (res3.x, mask, src1.x, IMM_MASK); CALC (src1.a, IMM_MASK, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) abort (); +#endif MASK_ZERO (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c index b7c36a5f141..c596b1d9c40 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c @@ -17,7 +17,11 @@ CALC (long long *mask, long long *src1, long long *dst) for (i = 0; i < SIZE; i++) { +#if AVX512F_LEN == 512 dst[i] = src1[mask[i] & 7]; +#else + dst[i] = src1[mask[i] & 3]; +#endif } } @@ -37,14 +41,18 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_permutexvar_epi64) (src1.x, src2.x); +#endif res2.x = INTRINSIC (_maskz_permutexvar_epi64) (mask, src1.x, src2.x); res3.x = INTRINSIC (_mask_permutexvar_epi64) (res3.x, mask, src1.x, src2.x); CALC (src1.a, src2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) abort (); +#endif MASK_ZERO (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c index 0e418f98ed2..80cb2c3cb2f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c @@ -9,11 +9,12 @@ #define SIZE (AVX512F_LEN / 32) #include "avx512f-mask-type.h" -static void -CALC (char *r, int *s) +void +CALC (char *r, int *s, int mem) { int i; - for (i = 0; i < 16; i++) + int len = mem ? SIZE : 16; + for (i = 0; i < len; i++) { r[i] = (i < SIZE) ? (char) s[i] : 0; } @@ -28,6 +29,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_d) src; MASK_TYPE mask = MASK_VALUE; char res_ref[16]; + char res_ref2[16]; sign = -1; for (i = 0; i < SIZE; i++) @@ -38,12 +40,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 16; i++) + { + res4[i] = DEFAULT_VALUE * 2; + res_ref2[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtepi32_epi8) (src.x); res2.x = INTRINSIC (_mask_cvtepi32_epi8) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtepi32_epi8) (mask, src.x); - INTRINSIC (_mask_cvtepi32_storeu_epi8) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_b) (res1, res_ref)) abort (); @@ -52,10 +59,14 @@ TEST (void) if (UNION_CHECK (128, i_b) (res2, res_ref)) abort (); - if (checkVc (res4, res_ref, 16)) - abort (); - MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_b) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtepi32_storeu_epi8) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_b) (res_ref2, mask, SIZE); + if (checkVc (res4, res_ref2, 16)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c index 376c105c0b2..c0797fcda95 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #define SIZE_HALF (AVX512F_LEN_HALF / 16) -void static -CALC (short *r, int *s) +void +CALC (short *r, int *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { r[i] = (i < SIZE) ? (short) s[i] : 0; } @@ -29,6 +30,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_d) src; MASK_TYPE mask = MASK_VALUE; short res_ref[SIZE_HALF]; + short res_ref2[SIZE_HALF]; sign = -1; for (i = 0; i < SIZE; i++) @@ -39,12 +41,16 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtepi32_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtepi32_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtepi32_epi16) (mask, src.x); - INTRINSIC (_mask_cvtepi32_storeu_epi16) (res4, mask, src.x); - - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, res_ref)) abort (); @@ -53,10 +59,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, res_ref)) abort (); - if (checkVs (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtepi32_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c index 892ad74e0d1..8a9b4adaade 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c @@ -14,7 +14,7 @@ CALC (char *r, long long *s, int mem) { int i; /* Don't zero out upper half if destination is memory. */ - int len = mem ? 8 : 16; + int len = mem ? SIZE : 16; for (i = 0; i < len; i++) { r[i] = (i < SIZE) ? (char) s[i] : 0; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c index 57170faf8f8..f0e4e127483 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #define SIZE_HALF (AVX512F_LEN_HALF / 32) -void static -CALC (int *r, long long *s) +void +CALC (int *r, long long *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { r[i] = (i < SIZE) ? (int) s[i] : 0; } @@ -29,6 +30,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_q) src; MASK_TYPE mask = MASK_VALUE; int res_ref[SIZE_HALF]; + int res_ref2[SIZE_HALF]; sign = -1; for (i = 0; i < SIZE; i++) @@ -39,13 +41,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtepi64_epi32) (src.x); res2.x = INTRINSIC (_mask_cvtepi64_epi32) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtepi64_epi32) (mask, src.x); - INTRINSIC (_mask_cvtepi64_storeu_epi32) (res4, mask, src.x); - - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref)) abort (); @@ -54,10 +60,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref)) abort (); - if (checkVi (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtepi64_storeu_epi32) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_d) (res_ref2, mask, SIZE); + if (checkVi (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c index 27b816511da..c527a977948 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c @@ -9,11 +9,12 @@ #define SIZE (AVX512F_LEN / 64) #include "avx512f-mask-type.h" -static void -CALC (short *r, long long *s) +void +CALC (short *r, long long *s, int mem) { int i; - for (i = 0; i < 8; i++) + int len = mem ? SIZE : 8; + for (i = 0; i < len; i++) { r[i] = (i < SIZE) ? (short) s[i] : 0; } @@ -28,6 +29,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_q) src; MASK_TYPE mask = MASK_VALUE; short res_ref[8]; + short res_ref2[8]; sign = -1; for (i = 0; i < SIZE; i++) @@ -38,12 +40,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 8; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtepi64_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtepi64_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtepi64_epi16) (mask, src.x); - INTRINSIC (_mask_cvtepi64_storeu_epi16) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_w) (res1, res_ref)) abort (); @@ -52,10 +59,14 @@ TEST (void) if (UNION_CHECK (128, i_w) (res2, res_ref)) abort (); - if (checkVs (res4, res_ref, 8)) - abort (); - MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_w) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtepi64_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, 8)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c index 116c8b69e71..b22b8746895 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #include <limits.h> -static void -CALC (char *r, int *s) +void +CALC (char *r, int *s, int mem) { int i; - for (i = 0; i < 16; i++) + int len = mem ? SIZE : 16; + for (i = 0; i < len; i++) { if (s[i] < CHAR_MIN) r[i] = CHAR_MIN; @@ -35,6 +36,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_d) src; MASK_TYPE mask = MASK_VALUE; char res_ref[16]; + char res_ref2[16]; sign = -1; for (i = 0; i < SIZE; i++) @@ -45,12 +47,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 16; i++) + { + res4[i] = DEFAULT_VALUE * 2; + res_ref2[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtsepi32_epi8) (src.x); res2.x = INTRINSIC (_mask_cvtsepi32_epi8) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtsepi32_epi8) (mask, src.x); - INTRINSIC (_mask_cvtsepi32_storeu_epi8) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_b) (res1, res_ref)) abort (); @@ -59,10 +66,14 @@ TEST (void) if (UNION_CHECK (128, i_b) (res2, res_ref)) abort (); - if (checkVc (res4, res_ref, 16)) - abort (); - MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_b) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtsepi32_storeu_epi8) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_b) (res_ref2, mask, SIZE); + if (checkVc (res4, res_ref2, 16)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c index e175cce1c48..217ba6eaa46 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c @@ -11,11 +11,12 @@ #define SIZE_HALF (AVX512F_LEN_HALF / 16) #include <limits.h> -static void -CALC (short *r, int *s) +void +CALC (short *r, int *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { if (s[i] < SHRT_MIN) r[i] = SHRT_MIN; @@ -36,6 +37,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_d) src; MASK_TYPE mask = MASK_VALUE; short res_ref[SIZE_HALF]; + short res_ref2[SIZE_HALF]; sign = -1; for (i = 0; i < SIZE; i++) @@ -46,12 +48,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtsepi32_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtsepi32_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtsepi32_epi16) (mask, src.x); - INTRINSIC (_mask_cvtsepi32_storeu_epi16) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, res_ref)) abort (); @@ -60,10 +67,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, res_ref)) abort (); - if (checkVs (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtsepi32_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c index babe6e22b99..09b509616b2 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c @@ -14,7 +14,7 @@ void static CALC (char *r, long long *s, int mem) { int i; - int len = mem ? 8 : 16; + int len = mem ? SIZE : 16; for (i = 0; i < len; i++) { if (s[i] < CHAR_MIN) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c index 342f9cb76b5..96d6ff7001c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c @@ -11,11 +11,12 @@ #define SIZE_HALF (AVX512F_LEN_HALF / 32) #include <limits.h> -static void -CALC (int *r, long long *s) +void +CALC (int *r, long long *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { if (s[i] < INT_MIN) r[i] = INT_MIN; @@ -36,6 +37,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_q) src; MASK_TYPE mask = MASK_VALUE; int res_ref[SIZE_HALF]; + int res_ref2[SIZE_HALF]; sign = -1; for (i = 0; i < SIZE; i++) @@ -46,12 +48,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res4[i] = DEFAULT_VALUE * 2; + res_ref2[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtsepi64_epi32) (src.x); res2.x = INTRINSIC (_mask_cvtsepi64_epi32) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtsepi64_epi32) (mask, src.x); - INTRINSIC (_mask_cvtsepi64_storeu_epi32) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref)) abort (); @@ -60,10 +67,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref)) abort (); - if (checkVi (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtsepi64_storeu_epi32) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_d) (res_ref2, mask, SIZE); + if (checkVi (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c index bc1619a8308..a7b6b367439 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #include <limits.h> -void static -CALC (short *r, long long *s) +void +CALC (short *r, long long *s, int mem) { int i; - for (i = 0; i < 8; i++) + int len = mem ? SIZE : 8; + for (i = 0; i < len; i++) { if (s[i] < SHRT_MIN) r[i] = SHRT_MIN; @@ -35,6 +36,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_q) src; MASK_TYPE mask = MASK_VALUE; short res_ref[8]; + short res_ref2[8]; sign = -1; for (i = 0; i < SIZE; i++) @@ -45,12 +47,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 8; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtsepi64_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtsepi64_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtsepi64_epi16) (mask, src.x); - INTRINSIC (_mask_cvtsepi64_storeu_epi16) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_w) (res1, res_ref)) abort (); @@ -59,10 +66,14 @@ TEST (void) if (UNION_CHECK (128, i_w) (res2, res_ref)) abort (); - if (checkVs (res4, res_ref, 8)) - abort (); - MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_w) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtsepi64_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, 8)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c index 8907a72f3ea..91eb4663872 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #include <limits.h> -static void -CALC (unsigned char *r, unsigned int *s) +void +CALC (unsigned char *r, unsigned int *s, int mem) { int i; - for (i = 0; i < 16; i++) + int len = mem ? SIZE : 16; + for (i = 0; i < len; i++) { r[i] = (s[i] > UCHAR_MAX) ? UCHAR_MAX : s[i]; r[i] = (i < SIZE) ? r[i] : 0; @@ -30,6 +31,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_ud) src; MASK_TYPE mask = MASK_VALUE; unsigned char res_ref[16]; + unsigned char res_ref2[16]; for (i = 0; i < SIZE; i++) { @@ -38,12 +40,16 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 16; i++) + { + res4[i] = DEFAULT_VALUE * 2; + res_ref2[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtusepi32_epi8) (src.x); res2.x = INTRINSIC (_mask_cvtusepi32_epi8) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtusepi32_epi8) (mask, src.x); - INTRINSIC (_mask_cvtusepi32_storeu_epi8) (res4, mask, src.x); - - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_ub) (res1, res_ref)) abort (); @@ -52,10 +58,14 @@ TEST (void) if (UNION_CHECK (128, i_ub) (res2, res_ref)) abort (); - if (checkVuc (res4, res_ref, 16)) - abort (); - MASK_ZERO (i_ub) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_ub) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtusepi32_storeu_epi8) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_b) (res_ref2, mask, SIZE); + if (checkVc (res4, res_ref2, 16)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c index c2c2624b498..64f6b0ac3f4 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c @@ -11,11 +11,12 @@ #define SIZE_HALF (AVX512F_LEN_HALF / 16) #include <limits.h> -static void -CALC (unsigned short *r, unsigned int *s) +void +CALC (unsigned short *r, unsigned int *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { r[i] = (s[i] > USHRT_MAX) ? USHRT_MAX : s[i]; r[i] = (i < SIZE) ? r[i] : 0; @@ -31,6 +32,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_ud) src; MASK_TYPE mask = MASK_VALUE; unsigned short res_ref[SIZE_HALF]; + unsigned short res_ref2[SIZE_HALF]; for (i = 0; i < SIZE; i++) { @@ -39,12 +41,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtusepi32_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtusepi32_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtusepi32_epi16) (mask, src.x); - INTRINSIC (_mask_cvtusepi32_storeu_epi16) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_uw) (res1, res_ref)) abort (); @@ -53,10 +60,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_uw) (res2, res_ref)) abort (); - if (checkVus (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_uw) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_uw) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtusepi32_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c index 8c20544524b..74ba3d4e26a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c @@ -14,7 +14,7 @@ static void CALC (unsigned char *r, unsigned long long *s, int mem) { int i; - int len = mem ? 8 : 16; + int len = mem ? SIZE : 16; for (i = 0; i < len; i++) { r[i] = (s[i] > UCHAR_MAX) ? UCHAR_MAX : s[i]; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c index f500ea3c285..f66e858c636 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c @@ -11,11 +11,12 @@ #define SIZE_HALF (AVX512F_LEN_HALF / 32) #include <limits.h> -static void -CALC (unsigned int *r, unsigned long long *s) +void +CALC (unsigned int *r, unsigned long long *s, int mem) { int i; - for (i = 0; i < SIZE_HALF; i++) + int len = mem ? SIZE : SIZE_HALF; + for (i = 0; i < len; i++) { r[i] = (s[i] > UINT_MAX) ? UINT_MAX : s[i]; r[i] = (i < SIZE) ? r[i] : 0; @@ -31,6 +32,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_uq) src; MASK_TYPE mask = MASK_VALUE; unsigned int res_ref[SIZE_HALF]; + unsigned int res_ref2[SIZE_HALF]; for (i = 0; i < SIZE; i++) { @@ -39,12 +41,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < SIZE_HALF; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtusepi64_epi32) (src.x); res2.x = INTRINSIC (_mask_cvtusepi64_epi32) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtusepi64_epi32) (mask, src.x); - INTRINSIC (_mask_cvtusepi64_storeu_epi32) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (AVX512F_LEN_HALF, i_ud) (res1, res_ref)) abort (); @@ -53,10 +60,14 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_ud) (res2, res_ref)) abort (); - if (checkVui (res4, res_ref, SIZE_HALF)) - abort (); - MASK_ZERO (i_ud) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_ud) (res3, res_ref)) abort (); + + CALC (res_ref2, src.a, 1); + INTRINSIC (_mask_cvtusepi64_storeu_epi32) (res4, mask, src.x); + + MASK_MERGE (i_d) (res_ref2, mask, SIZE); + if (checkVi (res4, res_ref2, SIZE_HALF)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c index c1ce9ed65bc..7aeda113ac6 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c @@ -10,11 +10,12 @@ #include "avx512f-mask-type.h" #include <limits.h> -static void -CALC (unsigned short *r, unsigned long long *s) +void +CALC (unsigned short *r, unsigned long long *s, int mem) { int i; - for (i = 0; i < 8; i++) + int len = mem ? SIZE : 8; + for (i = 0; i < len; i++) { r[i] = (s[i] > USHRT_MAX) ? USHRT_MAX : s[i]; r[i] = (i < SIZE) ? r[i] : 0; @@ -30,6 +31,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, i_uq) src; MASK_TYPE mask = MASK_VALUE; unsigned short res_ref[8]; + unsigned short res_ref2[8]; for (i = 0; i < SIZE; i++) { @@ -38,12 +40,17 @@ TEST (void) res4[i] = DEFAULT_VALUE; } + for (i = SIZE; i < 8; i++) + { + res_ref2[i] = DEFAULT_VALUE * 2; + res4[i] = DEFAULT_VALUE * 2; + } + res1.x = INTRINSIC (_cvtusepi64_epi16) (src.x); res2.x = INTRINSIC (_mask_cvtusepi64_epi16) (res2.x, mask, src.x); res3.x = INTRINSIC (_maskz_cvtusepi64_epi16) (mask, src.x); - INTRINSIC (_mask_cvtusepi64_storeu_epi16) (res4, mask, src.x); - CALC (res_ref, src.a); + CALC (res_ref, src.a, 0); if (UNION_CHECK (128, i_uw) (res1, res_ref)) abort (); @@ -52,10 +59,14 @@ TEST (void) if (UNION_CHECK (128, i_uw) (res2, res_ref)) abort (); - if (checkVus (res4, res_ref, 8)) - abort (); - MASK_ZERO (i_uw) (res_ref, mask, SIZE); if (UNION_CHECK (128, i_uw) (res3, res_ref)) abort (); + + INTRINSIC (_mask_cvtusepi64_storeu_epi16) (res4, mask, src.x); + CALC (res_ref2, src.a, 1); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (checkVs (res4, res_ref2, 8)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c index 5656a81e3fb..86dbfa7fef2 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c @@ -34,18 +34,22 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_or_si512) (s1.x, s2.x); res2.x = INTRINSIC (_or_epi32) (s1.x, s2.x); +#endif res3.x = INTRINSIC (_mask_or_epi32) (res3.x, mask, s1.x, s2.x); res4.x = INTRINSIC (_maskz_or_epi32) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) abort (); if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) abort (); +#endif MASK_MERGE (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c index 9af7172e31c..86dc1abd18b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c @@ -33,15 +33,18 @@ TEST (void) sign = -sign; res2.a[i] = DEFAULT_VALUE; } - +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_or_epi64) (s1.x, s2.x); +#endif res2.x = INTRINSIC (_mask_or_epi64) (res2.x, mask, s1.x, s2.x); res3.x = INTRINSIC (_maskz_or_epi64) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) abort (); +#endif MASK_MERGE (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c index fa431aed140..44ca56c6328 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c @@ -34,18 +34,22 @@ TEST (void) res3.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_xor_si512) (s1.x, s2.x); res2.x = INTRINSIC (_xor_epi32) (s1.x, s2.x); +#endif res3.x = INTRINSIC (_mask_xor_epi32) (res3.x, mask, s1.x, s2.x); res4.x = INTRINSIC (_maskz_xor_epi32) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) abort (); if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref)) abort (); +#endif MASK_MERGE (i_d) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c index ef605476bbc..c35d019089e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c @@ -34,14 +34,18 @@ TEST (void) res2.a[i] = DEFAULT_VALUE; } +#if AVX512F_LEN == 512 res1.x = INTRINSIC (_xor_epi64) (s1.x, s2.x); +#endif res2.x = INTRINSIC (_mask_xor_epi64) (res2.x, mask, s1.x, s2.x); res3.x = INTRINSIC (_maskz_xor_epi64) (mask, s1.x, s2.x); CALC (s1.a, s2.a, res_ref); +#if AVX512F_LEN == 512 if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref)) - abort (); + abort (); +#endif MASK_MERGE (i_q) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref)) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c index ca8edad8f40..25f385c31df 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c @@ -38,7 +38,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN,) res1, res2, res3, s; float res_ref[SIZE]; - MASK_TYPE mask = 6 ^ (0xffff >> SIZE); + MASK_TYPE mask = MASK_VALUE; imm = _MM_FROUND_FLOOR | (7 << 4); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c index fa976260af4..d9b44b369e2 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c @@ -38,7 +38,11 @@ TEST (void) MASK_TYPE mask = MASK_VALUE; float e[SIZE]; int i; +#if AVX512F_LEN == 512 int imm = 203; +#else + int imm = 1; +#endif for (i = 0; i < SIZE; i++) { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c index 9f5e093b39b..a4427fd4865 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c @@ -38,7 +38,11 @@ TEST (void) MASK_TYPE mask = MASK_VALUE; double e[SIZE]; int i; +#if AVX512F_LEN == 512 int imm = 203; +#else + int imm = 1; +#endif for (i = 0; i < SIZE; i++) { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c index b51eec7d97f..00641707b1c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c @@ -38,7 +38,11 @@ TEST (void) MASK_TYPE mask = MASK_VALUE; int e[SIZE]; int i; +#if AVX512F_LEN == 512 int imm = 203; +#else + int imm = 1; +#endif for (i = 0; i < SIZE; i++) { diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c index 5428eaeeb60..f35a0418f5b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c @@ -38,7 +38,11 @@ TEST (void) MASK_TYPE mask = MASK_VALUE; long long e[SIZE]; int i; +#if AVX512F_LEN == 512 int imm = 203; +#else + int imm = 1; +#endif for (i = 0; i < SIZE; i++) { diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-check.h b/gcc/testsuite/gcc.target/i386/avx512vl-check.h new file mode 100644 index 00000000000..c017ee28e47 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-check.h @@ -0,0 +1,49 @@ +#include <stdlib.h> +#include "cpuid.h" +#include "m512-check.h" +#include "avx512f-os-support.h" + +static void avx512vl_test (void); + +static void __attribute__ ((noinline)) do_test (void) +{ + avx512vl_test (); +} + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run avx512vl test only if host has avx512vl support. */ + if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE)) + { + if (__get_cpuid_max (0, NULL) < 7) + return 0; + + __cpuid_count (7, 0, eax, ebx, ecx, edx); + + if ((avx512f_os_support ()) + && ((ebx & bit_AVX512F) == bit_AVX512F) + && ((ebx & bit_AVX512VL) == bit_AVX512VL)) + { + do_test (); +#ifdef DEBUG + printf ("PASSED\n"); +#endif + return 0; + } +#ifdef DEBUG + printf ("SKIPPED\n"); +#endif + } +#ifdef DEBUG + else + printf ("SKIPPED\n"); +#endif + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-gather-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-gather-1.c new file mode 100644 index 00000000000..cb700575912 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-gather-1.c @@ -0,0 +1,217 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx512vl } */ +/* { dg-options "-O3 -mavx512vl" } */ + +#include "avx512vl-check.h" + +#define N 12 +float vf1[N+4], vf2[N]; +double vd1[N+4], vd2[N]; +int vi1[N+4], vi2[N], k[N]; +long long vl1[N+4], vl2[N]; +long l[N]; + +__attribute__((noinline, noclone)) void +f1 (void) +{ + int i; + for (i = 0; i < N; i++) + vf2[i] = vf1[k[i]]; +} + +__attribute__((noinline, noclone)) void +f2 (void) +{ + int i; + for (i = 0; i < N; i++) + vi2[i] = vi1[k[i]]; +} + +__attribute__((noinline, noclone)) void +f3 (int x) +{ + int i; + for (i = 0; i < N; i++) + vf2[i] = vf1[k[i] + x]; +} + +__attribute__((noinline, noclone)) void +f4 (int x) +{ + int i; + for (i = 0; i < N; i++) + vi2[i] = vi1[k[i] + x]; +} + +__attribute__((noinline, noclone)) void +f5 (void) +{ + int i; + for (i = 0; i < N; i++) + vd2[i] = vd1[k[i]]; +} + +__attribute__((noinline, noclone)) void +f6 (void) +{ + int i; + for (i = 0; i < N; i++) + vl2[i] = vl1[k[i]]; +} + +__attribute__((noinline, noclone)) void +f7 (int x) +{ + int i; + for (i = 0; i < N; i++) + vd2[i] = vd1[k[i] + x]; +} + +__attribute__((noinline, noclone)) void +f8 (int x) +{ + int i; + for (i = 0; i < N; i++) + vl2[i] = vl1[k[i] + x]; +} + +__attribute__((noinline, noclone)) void +f9 (void) +{ + int i; + for (i = 0; i < N; i++) + vf2[i] = vf1[l[i]]; +} + +__attribute__((noinline, noclone)) void +f10 (void) +{ + int i; + for (i = 0; i < N; i++) + vi2[i] = vi1[l[i]]; +} + +__attribute__((noinline, noclone)) void +f11 (int x) +{ + int i; + for (i = 0; i < N; i++) + vf2[i] = vf1[l[i] + x]; +} + +__attribute__((noinline, noclone)) void +f12 (int x) +{ + int i; + for (i = 0; i < N; i++) + vi2[i] = vi1[l[i] + x]; +} + +__attribute__((noinline, noclone)) void +f13 (void) +{ + int i; + for (i = 0; i < N; i++) + vd2[i] = vd1[l[i]]; +} + +__attribute__((noinline, noclone)) void +f14 (void) +{ + int i; + for (i = 0; i < N; i++) + vl2[i] = vl1[l[i]]; +} + +__attribute__((noinline, noclone)) void +f15 (int x) +{ + int i; + for (i = 0; i < N; i++) + vd2[i] = vd1[l[i] + x]; +} + +__attribute__((noinline, noclone)) void +f16 (int x) +{ + int i; + for (i = 0; i < N; i++) + vl2[i] = vl1[l[i] + x]; +} + +static void +avx512vl_test (void) +{ + int i; + + for (i = 0; i < N + 4; i++) + { + asm (""); + vf1[i] = 17.0f + i; + vd1[i] = 19.0 + i; + vi1[i] = 21 + i; + vl1[i] = 23L + i; + } + for (i = 0; i < N; i++) + { + asm (""); + k[i] = (i * 731) & (N - 1); + l[i] = (i * 657) & (N - 1); + } + + f1 (); + f2 (); + for (i = 0; i < N; i++) + if (vf2[i] != ((i * 731) & (N - 1)) + 17 + || vi2[i] != ((i * 731) & (N - 1)) + 21) + abort (); + + f3 (1); + f4 (2); + for (i = 0; i < N; i++) + if (vf2[i] != ((i * 731) & (N - 1)) + 17 + 1 + || vi2[i] != ((i * 731) & (N - 1)) + 21 + 2) + abort (); + + f5 (); + f6 (); + for (i = 0; i < N; i++) + if (vd2[i] != ((i * 731) & (N - 1)) + 19 + || vl2[i] != ((i * 731) & (N - 1)) + 23) + abort (); + + f7 (3); + f8 (2); + for (i = 0; i < N; i++) + if (vd2[i] != ((i * 731) & (N - 1)) + 19 + 3 + || vl2[i] != ((i * 731) & (N - 1)) + 23 + 2) + abort (); + + f9 (); + f10 (); + for (i = 0; i < N; i++) + if (vf2[i] != ((i * 657) & (N - 1)) + 17 + || vi2[i] != ((i * 657) & (N - 1)) + 21) + abort (); + + f11 (4); + f12 (1); + for (i = 0; i < N; i++) + if (vf2[i] != ((i * 657) & (N - 1)) + 17 + 4 + || vi2[i] != ((i * 657) & (N - 1)) + 21 + 1) + abort (); + + f13 (); + f14 (); + for (i = 0; i < N; i++) + if (vd2[i] != ((i * 657) & (N - 1)) + 19 + || vl2[i] != ((i * 657) & (N - 1)) + 23) + abort (); + + f15 (2); + f16 (4); + for (i = 0; i < N; i++) + if (vd2[i] != ((i * 657) & (N - 1)) + 19 + 2 + || vl2[i] != ((i * 657) & (N - 1)) + 23 + 4) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherd-1.c new file mode 100644 index 00000000000..880f5eff35b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherd-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpgatherdd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpgatherdd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i x1, idx1; +volatile __m128i x2, idx2; +volatile __mmask8 m8; +int *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i32gather_epi32 (x1, 0xFF, idx1, base, 8); + x1 = _mm256_mmask_i32gather_epi32 (x1, m8, idx1, base, 8); + x2 = _mm_mmask_i32gather_epi32 (x2, 0xFF, idx2, base, 8); + x2 = _mm_mmask_i32gather_epi32 (x2, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherpd-1.c new file mode 100644 index 00000000000..48e7f217119 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherpd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgatherdpd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vgatherdpd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __m128i idx; +volatile __mmask8 m8; +double *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i32gather_pd (x1, 0xFF, idx, base, 8); + x1 = _mm256_mmask_i32gather_pd (x1, m8, idx, base, 8); + x2 = _mm_mmask_i32gather_pd (x2, 0xFF, idx, base, 8); + x2 = _mm_mmask_i32gather_pd (x2, m8, idx, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherps-1.c new file mode 100644 index 00000000000..fcd0a583287 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgatherdps\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vgatherdps\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +float *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i32gather_ps (x1, 0xFF, idx1, base, 8); + x1 = _mm256_mmask_i32gather_ps (x1, m8, idx1, base, 8); + x2 = _mm_mmask_i32gather_ps (x2, 0xFF, idx2, base, 8); + x2 = _mm_mmask_i32gather_ps (x2, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherq-1.c new file mode 100644 index 00000000000..771909cc7e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32gatherq-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpgatherdq\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpgatherdq\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i x1; +volatile __m128i x2, idx; +volatile __mmask8 m8; +long long *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i32gather_epi64 (x1, 0xFF, idx, base, 8); + x1 = _mm256_mmask_i32gather_epi64 (x1, m8, idx, base, 8); + x2 = _mm_mmask_i32gather_epi64 (x2, 0xFF, idx, base, 8); + x2 = _mm_mmask_i32gather_epi64 (x2, m8, idx, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterd-1.c new file mode 100644 index 00000000000..761c7698751 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpscatterdd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpscatterdd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i src1, idx1; +volatile __m128i src2, idx2; +volatile __mmask8 m8; +int *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i32scatter_epi32 (addr, idx1, src1, 8); + _mm256_mask_i32scatter_epi32 (addr, m8, idx1, src1, 8); + + _mm_i32scatter_epi32 (addr, idx2, src2, 8); + _mm_mask_i32scatter_epi32 (addr, m8, idx2, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterpd-1.c new file mode 100644 index 00000000000..914ad8d591b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vscatterdpd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vscatterdpd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256d src1; +volatile __m128d src2; +volatile __m128i idx; +volatile __mmask8 m8; +double *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i32scatter_pd (addr, idx, src1, 8); + _mm256_mask_i32scatter_pd (addr, m8, idx, src1, 8); + + _mm_i32scatter_pd (addr, idx, src2, 8); + _mm_mask_i32scatter_pd (addr, m8, idx, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterps-1.c new file mode 100644 index 00000000000..72de9dd7f32 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterps-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vscatterdps\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vscatterdps\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256 src1; +volatile __m128 src2; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +float *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i32scatter_ps (addr, idx1, src1, 8); + _mm256_mask_i32scatter_ps (addr, m8, idx1, src1, 8); + + _mm_i32scatter_ps (addr, idx2, src2, 8); + _mm_mask_i32scatter_ps (addr, m8, idx2, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterq-1.c new file mode 100644 index 00000000000..b1eb8eae90e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i32scatterq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpscatterdq\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpscatterdq\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i src1; +volatile __m128i src2, idx; +volatile __mmask8 m8; +long long *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i32scatter_epi64 (addr, idx, src1, 8); + _mm256_mask_i32scatter_epi64 (addr, m8, idx, src1, 8); + + _mm_i32scatter_epi64 (addr, idx, src2, 8); + _mm_mask_i32scatter_epi64 (addr, m8, idx, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherd-1.c new file mode 100644 index 00000000000..a11520c2948 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherd-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpgatherqd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpgatherqd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i idx1; +volatile __m128i idx2, x; +volatile __mmask8 m8; +int *base; + +void extern +avx512vl_test (void) +{ + x = _mm256_mmask_i64gather_epi32 (x, 0xFF, idx1, base, 8); + x = _mm256_mmask_i64gather_epi32 (x, m8, idx1, base, 8); + x = _mm_mmask_i64gather_epi32 (x, 0xFF, idx2, base, 8); + x = _mm_mmask_i64gather_epi32 (x, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherpd-1.c new file mode 100644 index 00000000000..1b1b2cf6843 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgatherqpd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vgatherqpd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +double *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i64gather_pd (x1, 0xFF, idx1, base, 8); + x1 = _mm256_mmask_i64gather_pd (x1, m8, idx1, base, 8); + x2 = _mm_mmask_i64gather_pd (x2, 0xFF, idx2, base, 8); + x2 = _mm_mmask_i64gather_pd (x2, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherps-1.c new file mode 100644 index 00000000000..0b8f6fec181 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherps-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgatherqps\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vgatherqps\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m128 x; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +float *base; + +void extern +avx512vl_test (void) +{ + x = _mm256_mmask_i64gather_ps (x, 0xFF, idx1, base, 8); + x = _mm256_mmask_i64gather_ps (x, m8, idx1, base, 8); + x = _mm_mmask_i64gather_ps (x, 0xFF, idx2, base, 8); + x = _mm_mmask_i64gather_ps (x, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherq-1.c new file mode 100644 index 00000000000..ccdb416ffed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64gatherq-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpgatherqq\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2} } */ +/* { dg-final { scan-assembler-times "vpgatherqq\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i x1, idx1; +volatile __m128i x2, idx2; +volatile __mmask8 m8; +long long *base; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mmask_i64gather_epi64 (x1, 0xFF, idx1, base, 8); + x1 = _mm256_mmask_i64gather_epi64 (x1, m8, idx1, base, 8); + x2 = _mm_mmask_i64gather_epi64 (x2, 0xFF, idx2, base, 8); + x2 = _mm_mmask_i64gather_epi64 (x2, m8, idx2, base, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterd-1.c new file mode 100644 index 00000000000..8a124eced24 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpscatterqd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpscatterqd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i idx1; +volatile __m128i idx2, src; +volatile __mmask8 m8; +int *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i64scatter_epi32 (addr, idx1, src, 8); + _mm256_mask_i64scatter_epi32 (addr, m8, idx1, src, 8); + + _mm_i64scatter_epi32 (addr, idx2, src, 8); + _mm_mask_i64scatter_epi32 (addr, m8, idx2, src, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterpd-1.c new file mode 100644 index 00000000000..20e9babb8bd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterpd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vscatterqpd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vscatterqpd\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256d src1; +volatile __m128d src2; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +double *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i64scatter_pd (addr, idx1, src1, 8); + _mm256_mask_i64scatter_pd (addr, m8, idx1, src1, 8); + + _mm_i64scatter_pd (addr, idx2, src2, 8); + _mm_mask_i64scatter_pd (addr, m8, idx2, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterps-1.c new file mode 100644 index 00000000000..53bac89e709 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vscatterqps\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vscatterqps\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m128 src; +volatile __m256i idx1; +volatile __m128i idx2; +volatile __mmask8 m8; +float *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i64scatter_ps (addr, idx1, src, 8); + _mm256_mask_i64scatter_ps (addr, m8, idx1, src, 8); + + _mm_i64scatter_ps (addr, idx2, src, 8); + _mm_mask_i64scatter_ps (addr, m8, idx2, src, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterq-1.c new file mode 100644 index 00000000000..4235835857a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-i64scatterq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpscatterqq\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ +/* { dg-final { scan-assembler-times "vpscatterqq\[ \\t\]+\[^\n\]*xmm\[0-9\]\[^\n\]*xmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */ + +#include <immintrin.h> + +volatile __m256i src1, idx1; +volatile __m128i src2, idx2; +volatile __mmask8 m8; +long long *addr; + +void extern +avx512vl_test (void) +{ + _mm256_i64scatter_epi64 (addr, idx1, src1, 8); + _mm256_mask_i64scatter_epi64 (addr, m8, idx1, src1, 8); + + _mm_i64scatter_epi64 (addr, idx2, src2, 8); + _mm_mask_i64scatter_epi64 (addr, m8, idx2, src2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-1.c new file mode 100644 index 00000000000..f28ff356061 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128d x128; +volatile __m256d x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x128 = _mm_mask_add_pd (x128, m, x128, x128); + x128 = _mm_maskz_add_pd (m, x128, x128); + + x256 = _mm256_mask_add_pd (x256, m, x256, x256); + x256 = _mm256_maskz_add_pd (m, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-2.c new file mode 100644 index 00000000000..e9fd14be84a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vaddpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vaddpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vaddpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-1.c new file mode 100644 index 00000000000..8c9f23e1e85 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128 x128; +volatile __m256 x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x128 = _mm_mask_add_ps (x128, m, x128, x128); + x128 = _mm_maskz_add_ps (m, x128, x128); + + x256 = _mm256_mask_add_ps (x256, m, x256, x256); + x256 = _mm256_maskz_add_ps (m, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-2.c new file mode 100644 index 00000000000..0c2b7f18d6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vaddps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vaddps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vaddps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-valignd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-valignd-1.c new file mode 100644 index 00000000000..0b48abe180c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-valignd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_alignr_epi32 (y, y, 3); + y = _mm256_mask_alignr_epi32 (y, m, y, y, 3); + y = _mm256_maskz_alignr_epi32 (m, y, y, 3); + + x = _mm_alignr_epi32 (x, x, 3); + x = _mm_mask_alignr_epi32 (x, m, x, x, 3); + x = _mm_maskz_alignr_epi32 (m, x, x, 3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-valignd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-valignd-2.c new file mode 100644 index 00000000000..ef7c67830f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-valignd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-valignd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-valignd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-valignq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-valignq-1.c new file mode 100644 index 00000000000..cd0b0787b0e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-valignq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_alignr_epi64 (y, y, 3); + y = _mm256_mask_alignr_epi64 (y, m, y, y, 3); + y = _mm256_maskz_alignr_epi64 (m, y, y, 3); + + x = _mm_alignr_epi64 (x, x, 3); + x = _mm_mask_alignr_epi64 (x, m, x, x, 3); + x = _mm_maskz_alignr_epi64 (m, x, x, 3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-valignq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-valignq-2.c new file mode 100644 index 00000000000..b59cbf0bc5e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-valignq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-valignq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-valignq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vandnpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vandnpd-2.c new file mode 100644 index 00000000000..72a4ccae28c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vandnpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandnpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandnpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vandnps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vandnps-2.c new file mode 100644 index 00000000000..77950d0e251 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vandnps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandnps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandnps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vandpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vandpd-2.c new file mode 100644 index 00000000000..44716b328f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vandpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vandps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vandps-2.c new file mode 100644 index 00000000000..ec8ee9e719b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vandps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vandps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-1.c new file mode 100644 index 00000000000..ed8b670a20d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vblendmpd|vmovapd)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vblendmpd|vmovapd)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_blend_pd (m, x, x); + xx = _mm_mask_blend_pd (m, xx, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-2.c new file mode 100644 index 00000000000..56b80b11487 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vblendmpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vblendmpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-1.c new file mode 100644 index 00000000000..a43d4773651 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vblendmps|vmovaps)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vblendmps|vmovaps)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_blend_ps (m, x, x); + xx = _mm_mask_blend_ps (m, xx, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-2.c new file mode 100644 index 00000000000..16a40f8d68c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vblendmps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vblendmps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vblendmps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x2-2.c new file mode 100644 index 00000000000..7afe2015040 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vbroadcastf32x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-1.c new file mode 100644 index 00000000000..135975f77ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_broadcast_f32x4 (y); + x = _mm256_mask_broadcast_f32x4 (x, m, y); + x = _mm256_maskz_broadcast_f32x4 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-2.c new file mode 100644 index 00000000000..b5bc7e2c739 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mavx512dq -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vbroadcastf32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf64x2-2.c new file mode 100644 index 00000000000..df9893779d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastf64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vbroadcastf64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x2-2.c new file mode 100644 index 00000000000..90469664a2c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x2-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vbroadcasti32x2-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vbroadcasti32x2-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-1.c new file mode 100644 index 00000000000..ae6945d1975 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_broadcast_i32x4 (y); + x = _mm256_mask_broadcast_i32x4 (x, m, y); + x = _mm256_maskz_broadcast_i32x4 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-2.c new file mode 100644 index 00000000000..feca66049c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mavx512dq -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vbroadcasti32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti64x2-2.c new file mode 100644 index 00000000000..eded7cb8046 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcasti64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vbroadcasti64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-1.c new file mode 100644 index 00000000000..08cd026e8d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_broadcastsd_pd (y); + x = _mm256_mask_broadcastsd_pd (x, m, y); + x = _mm256_maskz_broadcastsd_pd (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-2.c new file mode 100644 index 00000000000..1655482c13d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastsd-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vbroadcastsd-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-1.c new file mode 100644 index 00000000000..0cbb7bf51ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_broadcastss_ps (y); + x = _mm256_mask_broadcastss_ps (x, m, y); + x = _mm256_maskz_broadcastss_ps (m, y); + y = _mm_broadcastss_ps (y); + y = _mm_mask_broadcastss_ps (y, m, y); + y = _mm_maskz_broadcastss_ps (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-2.c new file mode 100644 index 00000000000..e6dae6ff9ce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vbroadcastss-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vbroadcastss-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vbroadcastss-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-1.c new file mode 100644 index 00000000000..3195e930432 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm256_cmp_pd_mask (x, x, _CMP_FALSE_OQ); + m = _mm256_mask_cmp_pd_mask (m, x, x, _CMP_FALSE_OQ); + m = _mm_cmp_pd_mask (xx, xx, _CMP_FALSE_OQ); + m = _mm_mask_cmp_pd_mask (m, xx, xx, _CMP_FALSE_OQ); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-2.c new file mode 100644 index 00000000000..2c4937ffeb7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcmppd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcmppd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcmppd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-1.c new file mode 100644 index 00000000000..7bb6d42b450 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm256_cmp_ps_mask (x, x, _CMP_FALSE_OQ); + m = _mm256_mask_cmp_ps_mask (m, x, x, _CMP_FALSE_OQ); + m = _mm_cmp_ps_mask (xx, xx, _CMP_FALSE_OQ); + m = _mm_mask_cmp_ps_mask (m, xx, xx, _CMP_FALSE_OQ); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-2.c new file mode 100644 index 00000000000..6a726dfd814 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcmpps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcmpps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcmpps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-1.c new file mode 100644 index 00000000000..ad837a13511 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +double *p; +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_compress_pd (x1, m, x1); + x2 = _mm_mask_compress_pd (x2, m, x2); + + x1 = _mm256_maskz_compress_pd (m, x1); + x2 = _mm_maskz_compress_pd (m, x2); + + _mm256_mask_compressstoreu_pd (p, m, x1); + _mm_mask_compressstoreu_pd (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-2.c new file mode 100644 index 00000000000..eee9bfb447b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcompresspd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcompresspd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcompresspd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-1.c new file mode 100644 index 00000000000..785f5160b4e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +float *p; +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_compress_ps (x1, m, x1); + x2 = _mm_mask_compress_ps (x2, m, x2); + + x1 = _mm256_maskz_compress_ps (m, x1); + x2 = _mm_maskz_compress_ps (m, x2); + + _mm256_mask_compressstoreu_ps (p, m, x1); + _mm_mask_compressstoreu_ps (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-2.c new file mode 100644 index 00000000000..67c7790436b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcompressps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcompressps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcompressps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-1.c new file mode 100644 index 00000000000..1c8cfd33fac --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s; +volatile __m256d res1; +volatile __m128d res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi32_pd (res1, m, s); + res2 = _mm_mask_cvtepi32_pd (res2, m, s); + + res1 = _mm256_maskz_cvtepi32_pd (m, s); + res2 = _mm_maskz_cvtepi32_pd (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-2.c new file mode 100644 index 00000000000..8d45492799b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtdq2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtdq2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-1.c new file mode 100644 index 00000000000..82aa1cc58bb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s1; +volatile __m128i s2; +volatile __m256 res1; +volatile __m128 res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi32_ps (res1, m, s1); + res2 = _mm_mask_cvtepi32_ps (res2, m, s2); + + res1 = _mm256_maskz_cvtepi32_ps (m, s1); + res2 = _mm_maskz_cvtepi32_ps (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-2.c new file mode 100644 index 00000000000..d6751544ace --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtdq2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtdq2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtdq2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-1.c new file mode 100644 index 00000000000..168c6e37eb4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2dqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2dqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2dqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2dqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d s1; +volatile __m128d s2; +volatile __m128i res; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res = _mm256_mask_cvtpd_epi32 (res, m, s1); + res = _mm_mask_cvtpd_epi32 (res, m, s2); + + res = _mm256_maskz_cvtpd_epi32 (m, s1); + res = _mm_maskz_cvtpd_epi32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-2.c new file mode 100644 index 00000000000..c16d528b44d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2dq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2dq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2dq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-1.c new file mode 100644 index 00000000000..b18582b0a6f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vcvtpd2psy\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2psy\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2psx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d xx; +volatile __m128 y; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_cvtpd_ps (y, 4, x); + y = _mm256_maskz_cvtpd_ps (6, x); + y = _mm_mask_cvtpd_ps (y, 4, xx); + y = _mm_maskz_cvtpd_ps (6, xx); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-2.c new file mode 100644 index 00000000000..854a3340316 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2qq-2.c new file mode 100644 index 00000000000..1109d898c4a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2qq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtpd2qq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtpd2qq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-1.c new file mode 100644 index 00000000000..7544b6bc9ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d s1; +volatile __m128d s2; +volatile __m128i res; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res = _mm256_cvtpd_epu32 (s1); + res = _mm_cvtpd_epu32 (s2); + + res = _mm256_mask_cvtpd_epu32 (res, m, s1); + res = _mm_mask_cvtpd_epu32 (res, m, s2); + + res = _mm256_maskz_cvtpd_epu32 (m, s1); + res = _mm_maskz_cvtpd_epu32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-2.c new file mode 100644 index 00000000000..d949d430b1d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2udq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2udq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtpd2udq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2uqq-2.c new file mode 100644 index 00000000000..01648cd92d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtpd2uqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtpd2uqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtpd2uqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-1.c new file mode 100644 index 00000000000..de22503c0df --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x; +volatile __m256 y; +volatile __m128i xx; +volatile __m128 yy; + +void extern +avx512bw_test (void) +{ + y = _mm256_mask_cvtph_ps (y, 4, x); + y = _mm256_maskz_cvtph_ps (6, x); + yy = _mm_mask_cvtph_ps (yy, 4, xx); + yy = _mm_maskz_cvtph_ps (6, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-2.c new file mode 100644 index 00000000000..5d2c1104eee --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtph2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mf16c -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtph2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtph2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-1.c new file mode 100644 index 00000000000..a38521402b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __m256i z1; +volatile __m128i z2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z1 = _mm256_mask_cvtps_epi32 (z1, m, x1); + z1 = _mm256_maskz_cvtps_epi32 (m, x1); + z2 = _mm_mask_cvtps_epi32 (z2, m, x2); + z2 = _mm_maskz_cvtps_epi32 (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-2.c new file mode 100644 index 00000000000..ba660ba9546 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2dq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2dq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2dq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-1.c new file mode 100644 index 00000000000..e7dfc2c7f73 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128 s; +volatile __m256d res1; +volatile __m128d res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtps_pd (res1, m, s); + res2 = _mm_mask_cvtps_pd (res2, m, s); + + res1 = _mm256_maskz_cvtps_pd (m, s); + res2 = _mm_maskz_cvtps_pd (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-2.c new file mode 100644 index 00000000000..641d86198e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-1.c new file mode 100644 index 00000000000..28314ee9af5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128i y; +volatile __m128 xx; +volatile __m128i yy; + +void extern +avx512bw_test (void) +{ + y = _mm256_maskz_cvtps_ph (4, x, 0); + y = _mm256_mask_cvtps_ph (y, 2, x, 0); + yy = _mm_maskz_cvtps_ph (4, xx, 0); + yy = _mm_mask_cvtps_ph (yy, 2, xx, 0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-2.c new file mode 100644 index 00000000000..3d9e4fbeb71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mf16c -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2ph-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2ph-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2qq-2.c new file mode 100644 index 00000000000..876f9bec165 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2qq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtps2qq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtps2qq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-1.c new file mode 100644 index 00000000000..30d0337db2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __m256i z1; +volatile __m128i z2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z1 = _mm256_cvtps_epu32 (x1); + z1 = _mm256_mask_cvtps_epu32 (z1, m, x1); + z1 = _mm256_maskz_cvtps_epu32 (m, x1); + z2 = _mm_cvtps_epu32 (x2); + z2 = _mm_mask_cvtps_epu32 (z2, m, x2); + z2 = _mm_maskz_cvtps_epu32 (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-2.c new file mode 100644 index 00000000000..6bb32728e85 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2udq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2udq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtps2udq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2uqq-2.c new file mode 100644 index 00000000000..512022dd067 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2uqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtps2uqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtps2uqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2pd-2.c new file mode 100644 index 00000000000..9a85b269fc3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtqq2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtqq2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2ps-2.c new file mode 100644 index 00000000000..1ed75fd40ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtqq2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtqq2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtqq2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-1.c new file mode 100644 index 00000000000..729f49d91fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttpd2dqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2dqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2dqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2dqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d s1; +volatile __m128d s2; +volatile __m128i res; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res = _mm256_mask_cvttpd_epi32 (res, m, s1); + res = _mm_mask_cvttpd_epi32 (res, m, s2); + + res = _mm256_maskz_cvttpd_epi32 (m, s1); + res = _mm_maskz_cvttpd_epi32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-2.c new file mode 100644 index 00000000000..24fd9ad642f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2dq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttpd2dq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttpd2dq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2qq-2.c new file mode 100644 index 00000000000..b09268037ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2qq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttpd2qq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttpd2qq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-1.c new file mode 100644 index 00000000000..1b0cd9dd52c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqy\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2udqx\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d s1; +volatile __m128d s2; +volatile __m128i res; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res = _mm256_cvttpd_epu32 (s1); + res = _mm_cvttpd_epu32 (s2); + + res = _mm256_mask_cvttpd_epu32 (res, m, s1); + res = _mm_mask_cvttpd_epu32 (res, m, s2); + + res = _mm256_maskz_cvttpd_epu32 (m, s1); + res = _mm_maskz_cvttpd_epu32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-2.c new file mode 100644 index 00000000000..53f04207be0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2udq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttpd2udq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttpd2udq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2uqq-2.c new file mode 100644 index 00000000000..caf512ad950 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttpd2uqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttpd2uqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttpd2uqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-1.c new file mode 100644 index 00000000000..1aa638b5f31 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 s1; +volatile __m128 s2; +volatile __m256i res1; +volatile __m128i res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvttps_epi32 (res1, m, s1); + res1 = _mm256_maskz_cvttps_epi32 (m, s1); + res2 = _mm_mask_cvttps_epi32 (res2, m, s2); + res2 = _mm_maskz_cvttps_epi32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-2.c new file mode 100644 index 00000000000..173db3c002b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2dq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttps2dq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttps2dq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2qq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2qq-2.c new file mode 100644 index 00000000000..f45db8f5c22 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2qq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttps2qq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttps2qq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-1.c new file mode 100644 index 00000000000..f40b18a9ade --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 s1; +volatile __m128 s2; +volatile __m256i res1; +volatile __m128i res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_cvttps_epu32 (s1); + res1 = _mm256_mask_cvttps_epu32 (res1, m, s1); + res1 = _mm256_maskz_cvttps_epu32 (m, s1); + res2 = _mm_cvttps_epu32 (s2); + res2 = _mm_mask_cvttps_epu32 (res2, m, s2); + res2 = _mm_maskz_cvttps_epu32 (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-2.c new file mode 100644 index 00000000000..e8779ea8b9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2udq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttps2udq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvttps2udq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2uqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2uqq-2.c new file mode 100644 index 00000000000..bb15ecd05db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvttps2uqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttps2uqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvttps2uqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-1.c new file mode 100644 index 00000000000..3355617b7bc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s; +volatile __m256d res1; +volatile __m128d res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_cvtepu32_pd (s); + res2 = _mm_cvtepu32_pd (s); + + res1 = _mm256_mask_cvtepu32_pd (res1, m, s); + res2 = _mm_mask_cvtepu32_pd (res2, m, s); + + res1 = _mm256_maskz_cvtepu32_pd (m, s); + res2 = _mm_maskz_cvtepu32_pd (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-2.c new file mode 100644 index 00000000000..698448500a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtudq2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtudq2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-1.c new file mode 100644 index 00000000000..ef468346372 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s1; +volatile __m128i s2; +volatile __m256 res1; +volatile __m128 res2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_cvtepu32_ps (s1); + res2 = _mm_cvtepu32_ps (s2); + + res1 = _mm256_mask_cvtepu32_ps (res1, m, s1); + res2 = _mm_mask_cvtepu32_ps (res2, m, s2); + + res1 = _mm256_maskz_cvtepu32_ps (m, s1); + res2 = _mm_maskz_cvtepu32_ps (m, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-2.c new file mode 100644 index 00000000000..98731c68449 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtudq2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtudq2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vcvtudq2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2pd-2.c new file mode 100644 index 00000000000..d803b32ab59 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtuqq2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtuqq2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2ps-2.c new file mode 100644 index 00000000000..c99919e09f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtuqq2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtuqq2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vcvtuqq2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vdbpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vdbpsadbw-2.c new file mode 100644 index 00000000000..62c52ea8757 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vdbpsadbw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vdbpsadbw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vdbpsadbw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-1.c new file mode 100644 index 00000000000..e840cdbecca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_div_pd (x256, m, x256, x256); + x256 = _mm256_maskz_div_pd (m, x256, x256); + x128 = _mm_mask_div_pd (x128, m, x128, x128); + x128 = _mm_maskz_div_pd (m, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-2.c new file mode 100644 index 00000000000..bf9c41524a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vdivpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vdivpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vdivpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-1.c new file mode 100644 index 00000000000..37b9aa5feac --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_div_ps (x256, m, x256, x256); + x256 = _mm256_maskz_div_ps (m, x256, x256); + x128 = _mm_mask_div_ps (x128, m, x128, x128); + x128 = _mm_maskz_div_ps (m, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-2.c new file mode 100644 index 00000000000..629bd1dcad3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vdivps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vdivps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vdivps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-1.c new file mode 100644 index 00000000000..03044c5c6ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +double *p; +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_expand_pd (x1, m, x1); + x2 = _mm_mask_expand_pd (x2, m, x2); + + x1 = _mm256_maskz_expand_pd (m, x1); + x2 = _mm_maskz_expand_pd (m, x2); + + x1 = _mm256_mask_expandloadu_pd (x1, m, p); + x2 = _mm_mask_expandloadu_pd (x2, m, p); + + x1 = _mm256_maskz_expandloadu_pd (m, p); + x2 = _mm_maskz_expandloadu_pd (m, p); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-2.c new file mode 100644 index 00000000000..4cb6a228c7d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vexpandpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vexpandpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-1.c new file mode 100644 index 00000000000..d6a05e916b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +float *p; +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_expand_ps (x1, m, x1); + x2 = _mm_mask_expand_ps (x2, m, x2); + + x1 = _mm256_maskz_expand_ps (m, x1); + x2 = _mm_maskz_expand_ps (m, x2); + + x1 = _mm256_mask_expandloadu_ps (x1, m, p); + x2 = _mm_mask_expandloadu_ps (x2, m, p); + + x1 = _mm256_maskz_expandloadu_ps (m, p); + x2 = _mm_maskz_expandloadu_ps (m, p); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-2.c new file mode 100644 index 00000000000..d9ccd4e9bba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vexpandps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vexpandps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vexpandps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-1.c new file mode 100644 index 00000000000..58148e01824 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 y; + +void extern +avx512vl_test (void) +{ + y = _mm256_extractf32x4_ps (x, 1); + y = _mm256_mask_extractf32x4_ps (y, 2, x, 1); + y = _mm256_maskz_extractf32x4_ps (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-2.c new file mode 100644 index 00000000000..c93d518eb07 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vextractf32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextractf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf64x2-2.c new file mode 100644 index 00000000000..6123426fe3e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextractf64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vextractf64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-1.c new file mode 100644 index 00000000000..fb26d6a6c8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; + +void extern +avx512vl_test (void) +{ + y = _mm256_extracti32x4_epi32 (x, 1); + y = _mm256_mask_extracti32x4_epi32 (y, 2, x, 1); + y = _mm256_maskz_extracti32x4_epi32 (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-2.c new file mode 100644 index 00000000000..d9c40906e08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vextracti32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vextracti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti64x2-2.c new file mode 100644 index 00000000000..9b8554c7e72 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vextracti64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vextracti64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-1.c new file mode 100644 index 00000000000..a95d83fefa7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vfixupimmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" } } */ +/* { dg-final { scan-assembler "vfixupimmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" } } */ +/* { dg-final { scan-assembler "vfixupimmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" } } */ +/* { dg-final { scan-assembler "vfixupimmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" } } */ + +#include <immintrin.h> + +volatile __m256d xx; +volatile __m256i yy; +volatile __m128d x2; +volatile __m128i y2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + xx = _mm256_fixupimm_pd (xx, xx, yy, 3); + xx = _mm256_mask_fixupimm_pd (xx, m, xx, yy, 3); + xx = _mm256_maskz_fixupimm_pd (m, xx, xx, yy, 3); + x2 = _mm_fixupimm_pd (x2, x2, y2, 3); + x2 = _mm_mask_fixupimm_pd (x2, m, x2, y2, 3); + x2 = _mm_maskz_fixupimm_pd (m, x2, x2, y2, 3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-2.c new file mode 100644 index 00000000000..36750096ee7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfixupimmpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfixupimmpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-1.c new file mode 100644 index 00000000000..e6b6c5740c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vfixupimmps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" } } */ +/* { dg-final { scan-assembler "vfixupimmps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" } } */ +/* { dg-final { scan-assembler "vfixupimmps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" } } */ +/* { dg-final { scan-assembler "vfixupimmps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" } } */ + +#include <immintrin.h> + +volatile __m256 xx; +volatile __m256i yy; +volatile __m128 x2; +volatile __m128i y2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + xx = _mm256_fixupimm_ps (xx, xx, yy, 3); + xx = _mm256_mask_fixupimm_ps (xx, m, xx, yy, 3); + xx = _mm256_maskz_fixupimm_ps (m, xx, xx, yy, 3); + x2 = _mm_fixupimm_ps (x2, x2, y2, 3); + x2 = _mm_mask_fixupimm_ps (x2, m, x2, y2, 3); + x2 = _mm_maskz_fixupimm_ps (m, x2, x2, y2, 3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-2.c new file mode 100644 index 00000000000..a37ad595430 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfixupimmps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfixupimmps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfixupimmps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-1.c new file mode 100644 index 00000000000..da6ea659800 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmadd_pd (yy, m, y2, y3); + xx = _mm_mask_fmadd_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fmadd_pd (yy, y2, y3, m); + x3 = _mm_mask3_fmadd_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fmadd_pd (m, yy, y2, y3); + xx = _mm_maskz_fmadd_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-2.c new file mode 100644 index 00000000000..3fdb818411b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-1.c new file mode 100644 index 00000000000..185a8296f24 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmadd_ps (yy, m, y2, y3); + xx = _mm_mask_fmadd_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fmadd_ps (yy, y2, y3, m); + x3 = _mm_mask3_fmadd_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fmadd_ps (m, yy, y2, y3); + xx = _mm_maskz_fmadd_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-2.c new file mode 100644 index 00000000000..8d5dd7629cd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-1.c new file mode 100644 index 00000000000..b0c015cba5d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmaddsub_pd (yy, m, y2, y3); + xx = _mm_mask_fmaddsub_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fmaddsub_pd (yy, y2, y3, m); + x3 = _mm_mask3_fmaddsub_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fmaddsub_pd (m, yy, y2, y3); + xx = _mm_maskz_fmaddsub_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-2.c new file mode 100644 index 00000000000..178d43c0f99 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddsubXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddsubXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-1.c new file mode 100644 index 00000000000..25efa30d0fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmaddsub_ps (yy, m, y2, y3); + xx = _mm_mask_fmaddsub_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fmaddsub_ps (yy, y2, y3, m); + x3 = _mm_mask3_fmaddsub_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fmaddsub_ps (m, yy, y2, y3); + xx = _mm_maskz_fmaddsub_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-2.c new file mode 100644 index 00000000000..b148aef5ed8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmaddsubXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddsubXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmaddsubXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-1.c new file mode 100644 index 00000000000..e0d52a5401a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmsub_pd (yy, m, y2, y3); + xx = _mm_mask_fmsub_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fmsub_pd (yy, y2, y3, m); + x3 = _mm_mask3_fmsub_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fmsub_pd (m, yy, y2, y3); + xx = _mm_maskz_fmsub_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-2.c new file mode 100644 index 00000000000..6a973dc3383 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-1.c new file mode 100644 index 00000000000..8e5ab4e380f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmsub_ps (yy, m, y2, y3); + xx = _mm_mask_fmsub_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fmsub_ps (yy, y2, y3, m); + x3 = _mm_mask3_fmsub_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fmsub_ps (m, yy, y2, y3); + xx = _mm_maskz_fmsub_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-2.c new file mode 100644 index 00000000000..e9059e2e97b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-1.c new file mode 100644 index 00000000000..7bf5324d9f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmsubadd_pd (yy, m, y2, y3); + xx = _mm_mask_fmsubadd_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fmsubadd_pd (yy, y2, y3, m); + x3 = _mm_mask3_fmsubadd_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fmsubadd_pd (m, yy, y2, y3); + xx = _mm_maskz_fmsubadd_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-2.c new file mode 100644 index 00000000000..733416c6d67 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubaddXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubaddXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-1.c new file mode 100644 index 00000000000..c1af7cf84e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fmsubadd_ps (yy, m, y2, y3); + xx = _mm_mask_fmsubadd_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fmsubadd_ps (yy, y2, y3, m); + x3 = _mm_mask3_fmsubadd_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fmsubadd_ps (m, yy, y2, y3); + xx = _mm_maskz_fmsubadd_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-2.c new file mode 100644 index 00000000000..eade1ca593a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfmsubaddXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubaddXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfmsubaddXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-1.c new file mode 100644 index 00000000000..3335e64b69a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fnmadd_pd (yy, m, y2, y3); + xx = _mm_mask_fnmadd_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fnmadd_pd (yy, y2, y3, m); + x3 = _mm_mask3_fnmadd_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fnmadd_pd (m, yy, y2, y3); + xx = _mm_maskz_fnmadd_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-2.c new file mode 100644 index 00000000000..4f37d83eede --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmaddXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmaddXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-1.c new file mode 100644 index 00000000000..8d30de40ac4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fnmadd_ps (yy, m, y2, y3); + xx = _mm_mask_fnmadd_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fnmadd_ps (yy, y2, y3, m); + x3 = _mm_mask3_fnmadd_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fnmadd_ps (m, yy, y2, y3); + xx = _mm_maskz_fnmadd_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-2.c new file mode 100644 index 00000000000..72b722d1959 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmaddXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmaddXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmaddXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-1.c new file mode 100644 index 00000000000..50ba7be10e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fnmsub_pd (yy, m, y2, y3); + xx = _mm_mask_fnmsub_pd (xx, m, x2, x3); + + y3 = _mm256_mask3_fnmsub_pd (yy, y2, y3, m); + x3 = _mm_mask3_fnmsub_pd (xx, x2, x3, m); + + yy = _mm256_maskz_fnmsub_pd (m, yy, y2, y3); + xx = _mm_maskz_fnmsub_pd (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-2.c new file mode 100644 index 00000000000..f2369677cdc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmsubXXXpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmsubXXXpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-1.c new file mode 100644 index 00000000000..396fe24db7a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_fnmsub_ps (yy, m, y2, y3); + xx = _mm_mask_fnmsub_ps (xx, m, x2, x3); + + y3 = _mm256_mask3_fnmsub_ps (yy, y2, y3, m); + x3 = _mm_mask3_fnmsub_ps (xx, x2, x3, m); + + yy = _mm256_maskz_fnmsub_ps (m, yy, y2, y3); + xx = _mm_maskz_fnmsub_ps (m, xx, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-2.c new file mode 100644 index 00000000000..1913e446646 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfnmsubXXXps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmsubXXXps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vfnmsubXXXps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfpclasspd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfpclasspd-2.c new file mode 100644 index 00000000000..d9346c311b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfpclasspd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vfpclasspd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vfpclasspd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vfpclassps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vfpclassps-2.c new file mode 100644 index 00000000000..9bf59b32ada --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vfpclassps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vfpclassps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vfpclassps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-1.c new file mode 100644 index 00000000000..b0b7dcca0e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */ +/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ + +#include <immintrin.h> + +volatile __m256d xx; +volatile __m128d x2; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + xx = _mm256_getexp_pd (xx); + xx = _mm256_mask_getexp_pd (xx, m8, xx); + xx = _mm256_maskz_getexp_pd (m8, xx); + x2 = _mm_getexp_pd (x2); + x2 = _mm_mask_getexp_pd (x2, m8, x2); + x2 = _mm_maskz_getexp_pd (m8, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-2.c new file mode 100644 index 00000000000..b8ebaf521b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexppd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetexppd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetexppd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-1.c new file mode 100644 index 00000000000..4aa5bccd763 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */ +/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ + +#include <immintrin.h> + +volatile __m256 xx; +volatile __m128 x2; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + xx = _mm256_getexp_ps (xx); + xx = _mm256_mask_getexp_ps (xx, m8, xx); + xx = _mm256_maskz_getexp_ps (m8, xx); + x2 = _mm_getexp_ps (x2); + x2 = _mm_mask_getexp_ps (x2, m8, x2); + x2 = _mm_maskz_getexp_ps (m8, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-2.c new file mode 100644 index 00000000000..643ccae84ab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetexpps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetexpps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetexpps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-1.c new file mode 100644 index 00000000000..ad5ae3b0735 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x, y; +volatile __m128d a, b; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_getmant_pd (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src); + x = _mm256_mask_getmant_pd (x, m, y, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + x = _mm256_maskz_getmant_pd (m, y, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + a = _mm_getmant_pd (b, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src); + a = _mm_mask_getmant_pd (a, m, b, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + a = _mm_maskz_getmant_pd (m, b, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-2.c new file mode 100644 index 00000000000..7007074ca86 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetmantpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetmantpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-1.c new file mode 100644 index 00000000000..089293546e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x, y; +volatile __m128 a, b; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_getmant_ps (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src); + x = _mm256_mask_getmant_ps (x, m, y, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + x = _mm256_maskz_getmant_ps (m, y, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + a = _mm_getmant_ps (b, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src); + a = _mm_mask_getmant_ps (a, m, b, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); + a = _mm_maskz_getmant_ps (m, b, _MM_MANT_NORM_p75_1p5, + _MM_MANT_SIGN_src); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-2.c new file mode 100644 index 00000000000..b76ca953379 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vgetmantps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetmantps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vgetmantps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-1.c new file mode 100644 index 00000000000..c0addd817d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*ymm" 3 } } */ +/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 y; + +void extern +avx512vl_test (void) +{ + x = _mm256_insertf32x4 (x, y, 1); + x = _mm256_mask_insertf32x4 (x, 2, x, y, 1); + x = _mm256_maskz_insertf32x4 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-2.c new file mode 100644 index 00000000000..f6f98024996 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vinsertf32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf64x2-2.c new file mode 100644 index 00000000000..6793449fdf0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinsertf64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vinsertf64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-1.c new file mode 100644 index 00000000000..08e0897ab68 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*ymm" 3 } } */ +/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; + +void extern +avx512vl_test (void) +{ + x = _mm256_inserti32x4 (x, y, 1); + x = _mm256_mask_inserti32x4 (x, 2, x, y, 1); + x = _mm256_maskz_inserti32x4 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-2.c new file mode 100644 index 00000000000..03c29ae6e9e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vinserti32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vinserti64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti64x2-2.c new file mode 100644 index 00000000000..faefdec8259 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vinserti64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vinserti64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-1.c new file mode 100644 index 00000000000..c90b022ecd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_max_pd (x256, m8, x256, x256); + x256 = _mm256_maskz_max_pd (m8, x256, x256); + x128 = _mm_mask_max_pd (x128, m8, x128, x128); + x128 = _mm_maskz_max_pd (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-2.c new file mode 100644 index 00000000000..40c878d7f28 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmaxpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmaxpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-1.c new file mode 100644 index 00000000000..666975677d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_max_ps (x256, m8, x256, x256); + x256 = _mm256_maskz_max_ps (m8, x256, x256); + x128 = _mm_mask_max_ps (x128, m8, x128, x128); + x128 = _mm_maskz_max_ps (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-2.c new file mode 100644 index 00000000000..d86addd9e68 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmaxps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmaxps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmaxps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-1.c new file mode 100644 index 00000000000..bda66f16e63 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_min_pd (x256, m8, x256, x256); + x256 = _mm256_maskz_min_pd (m8, x256, x256); + x128 = _mm_mask_min_pd (x128, m8, x128, x128); + x128 = _mm_maskz_min_pd (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-2.c new file mode 100644 index 00000000000..deea0532727 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vminpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vminpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vminpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vminps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vminps-1.c new file mode 100644 index 00000000000..7a27b15f31c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vminps-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_min_ps (x256, m8, x256, x256); + x256 = _mm256_maskz_min_ps (m8, x256, x256); + x128 = _mm_mask_min_ps (x128, m8, x128, x128); + x128 = _mm_maskz_min_ps (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vminps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vminps-2.c new file mode 100644 index 00000000000..b896a34ab5a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vminps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vminps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vminps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-1.c new file mode 100644 index 00000000000..8a24a366119 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +double *p; +volatile __m256d yy, y2; +volatile __m128d xx, x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_mov_pd (yy, m, y2); + xx = _mm_mask_mov_pd (xx, m, x2); + + yy = _mm256_maskz_mov_pd (m, y2); + xx = _mm_maskz_mov_pd (m, x2); + + yy = _mm256_mask_load_pd (yy, m, p); + xx = _mm_mask_load_pd (xx, m, p); + + yy = _mm256_maskz_load_pd (m, p); + xx = _mm_maskz_load_pd (m, p); + + _mm256_mask_store_pd (p, m, yy); + _mm_mask_store_pd (p, m, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-2.c new file mode 100644 index 00000000000..11d7af1ac2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovapd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovapd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovapd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-1.c new file mode 100644 index 00000000000..5104292f099 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +float __attribute__ ((aligned (32))) *p; +volatile __m256 yy, y2; +volatile __m128 xx, x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_mov_ps (yy, m, y2); + xx = _mm_mask_mov_ps (xx, m, x2); + + yy = _mm256_maskz_mov_ps (m, y2); + xx = _mm_maskz_mov_ps (m, x2); + + yy = _mm256_mask_load_ps (yy, m, p); + xx = _mm_mask_load_ps (xx, m, p); + + yy = _mm256_maskz_load_ps (m, p); + xx = _mm_maskz_load_ps (m, p); + + _mm256_mask_store_ps (p, m, yy); + _mm_mask_store_ps (p, m, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-2.c new file mode 100644 index 00000000000..6d876e91f7d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovaps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovaps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovaps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-1.c new file mode 100644 index 00000000000..9dd98de51d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vunpcklpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vunpcklpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}|vunpcklpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}|vunpcklpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2; +volatile __m128d xx, x2; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_movedup_pd (yy, m8, y2); + yy = _mm256_maskz_movedup_pd (m8, y2); + + xx = _mm_mask_movedup_pd (xx, m8, x2); + xx = _mm_maskz_movedup_pd (m8, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-2.c new file mode 100644 index 00000000000..a5eaaafd00a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovddup-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovddup-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovddup-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c new file mode 100644 index 00000000000..498232723e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +int *p; +volatile __m256i yy, y2; +volatile __m128i xx, x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_mov_epi32 (yy, m, y2); + xx = _mm_mask_mov_epi32 (xx, m, x2); + + yy = _mm256_maskz_mov_epi32 (m, y2); + xx = _mm_maskz_mov_epi32 (m, x2); + + yy = _mm256_mask_load_epi32 (yy, m, p); + xx = _mm_mask_load_epi32 (xx, m, p); + + yy = _mm256_maskz_load_epi32 (m, p); + xx = _mm_maskz_load_epi32 (m, p); + + _mm256_mask_store_epi32 (p, m, yy); + _mm_mask_store_epi32 (p, m, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-2.c new file mode 100644 index 00000000000..0a0c90501ee --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqa32-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqa32-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c new file mode 100644 index 00000000000..fb80b245b50 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\\(\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\\(\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^x^y\]*\\(" 2 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^x^y\]*\\(" 2 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +long long *p; +volatile __m256i yy, y2; +volatile __m128i xx, x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_mov_epi64 (yy, m, y2); + xx = _mm_mask_mov_epi64 (xx, m, x2); + + yy = _mm256_maskz_mov_epi64 (m, y2); + xx = _mm_maskz_mov_epi64 (m, x2); + + yy = _mm256_load_epi64 (p); + xx = _mm_load_epi64 (p); + + yy = _mm256_mask_load_epi64 (yy, m, p); + xx = _mm_mask_load_epi64 (xx, m, p); + + yy = _mm256_maskz_load_epi64 (m, p); + xx = _mm_maskz_load_epi64 (m, p); + + _mm256_store_epi64 (p, yy); + _mm_store_epi64 (p, xx); + + _mm256_mask_store_epi64 (p, m, yy); + _mm_mask_store_epi64 (p, m, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-2.c new file mode 100644 index 00000000000..c404ea7e0e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqa64-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqa64-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu16-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu16-2.c new file mode 100644 index 00000000000..35651e5ddd9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu16-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vmovdqu16-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vmovdqu16-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-1.c new file mode 100644 index 00000000000..ecffbc7f4e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +int *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_loadu_epi32 (x1, m, p); + x2 = _mm_mask_loadu_epi32 (x2, m, p); + + x1 = _mm256_maskz_loadu_epi32 (m, p); + x2 = _mm_maskz_loadu_epi32 (m, p); + + _mm256_mask_storeu_epi32 (p, m, x1); + _mm_mask_storeu_epi32 (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-2.c new file mode 100644 index 00000000000..ffff00dd57e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu32-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqu32-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqu32-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-1.c new file mode 100644 index 00000000000..9e3fb5884c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +long long *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_loadu_epi64 (x1, m, p); + x2 = _mm_mask_loadu_epi64 (x2, m, p); + + x1 = _mm256_maskz_loadu_epi64 (m, p); + x2 = _mm_maskz_loadu_epi64 (m, p); + + _mm256_mask_storeu_epi64 (p, m, x1); + _mm_mask_storeu_epi64 (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-2.c new file mode 100644 index 00000000000..451edccaf55 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu64-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqu64-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovdqu64-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu8-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu8-2.c new file mode 100644 index 00000000000..6d14df55dbd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqu8-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vmovdqu8-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vmovdqu8-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovntdqa-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovntdqa-1.c new file mode 100644 index 00000000000..9ac860f3c2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovntdqa-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vmovntdqa\[ \\t\]+\[^\n\]*%zmm\[0-9\]"} } */ + +#include <immintrin.h> + +volatile __m512i x; +__m512i *y; + +void extern +avx512vl_test (void) +{ + x = _mm512_stream_load_si512 (y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-1.c new file mode 100644 index 00000000000..80d88e0779f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_movehdup_ps (y, m, y); + x = _mm_mask_movehdup_ps (x, m, x); + + y = _mm256_maskz_movehdup_ps (m, y); + x = _mm_maskz_movehdup_ps (m, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-2.c new file mode 100644 index 00000000000..d7b883de824 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovshdup-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovshdup-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovshdup-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-1.c new file mode 100644 index 00000000000..147c9de1750 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_moveldup_ps (y, m, y); + x = _mm_mask_moveldup_ps (x, m, x); + + y = _mm256_maskz_moveldup_ps (m, y); + x = _mm_maskz_moveldup_ps (m, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-2.c new file mode 100644 index 00000000000..877f1907acb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovsldup-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovsldup-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovsldup-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-1.c new file mode 100644 index 00000000000..3bd734d2497 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +double *p; +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_loadu_pd (x1, m, p); + x2 = _mm_mask_loadu_pd (x2, m, p); + + x1 = _mm256_maskz_loadu_pd (m, p); + x2 = _mm_maskz_loadu_pd (m, p); + + _mm256_mask_storeu_pd (p, m, x1); + _mm_mask_storeu_pd (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-2.c new file mode 100644 index 00000000000..f9ccc6a8f57 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovupd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovupd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovupd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-1.c new file mode 100644 index 00000000000..0f48eaed0bd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +float *p; +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_loadu_ps (x1, m, p); + x2 = _mm_mask_loadu_ps (x2, m, p); + + x1 = _mm256_maskz_loadu_ps (m, p); + x2 = _mm_maskz_loadu_ps (m, p); + + _mm256_mask_storeu_ps (p, m, x1); + _mm_mask_storeu_ps (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-2.c new file mode 100644 index 00000000000..fe49a6c8b42 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovups-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovups-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmovups-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-1.c new file mode 100644 index 00000000000..7346ee88273 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_mul_pd (x256, m, x256, x256); + x256 = _mm256_maskz_mul_pd (m, x256, x256); + x128 = _mm_mask_mul_pd (x128, m, x128, x128); + x128 = _mm_maskz_mul_pd (m, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-2.c new file mode 100644 index 00000000000..ffd0862347e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmulpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmulpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmulpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-1.c new file mode 100644 index 00000000000..8e06e874db7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_mul_ps (x256, m, x256, x256); + x256 = _mm256_maskz_mul_ps (m, x256, x256); + x128 = _mm_mask_mul_ps (x128, m, x128, x128); + x128 = _mm_maskz_mul_ps (m, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-2.c new file mode 100644 index 00000000000..b0cf529ab6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmulps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmulps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vmulps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vorpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vorpd-2.c new file mode 100644 index 00000000000..8cb5a2fdedc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vorpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vorpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vorpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vorps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vorps-2.c new file mode 100644 index 00000000000..d628291cae1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vorps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vorps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vorps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsb-2.c new file mode 100644 index 00000000000..a1535d7f9b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpabsb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpabsb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-1.c new file mode 100644 index 00000000000..c8a7a0d50a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i xx; +volatile __m128i x2; + +void extern +avx512vl_test (void) +{ + xx = _mm256_mask_abs_epi32 (xx, 2,xx); + xx = _mm256_maskz_abs_epi32 (2, xx); + x2 = _mm_mask_abs_epi32 (x2, 2, x2); + x2 = _mm_maskz_abs_epi32 (2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-2.c new file mode 100644 index 00000000000..4106fe340bd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpabsd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpabsd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-1.c new file mode 100644 index 00000000000..590d8ecda46 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i xx; +volatile __m128i x2; + +void extern +avx512vl_test (void) +{ + xx = _mm256_abs_epi64 (xx); + xx = _mm256_mask_abs_epi64 (xx, 2, xx); + xx = _mm256_maskz_abs_epi64 (2, xx); + x2 = _mm_abs_epi64 (x2); + x2 = _mm_mask_abs_epi64 (x2, 2, x2); + x2 = _mm_maskz_abs_epi64 (2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-2.c new file mode 100644 index 00000000000..4e9a54a402a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpabsq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpabsq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpabsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsw-2.c new file mode 100644 index 00000000000..a7bd947f285 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpabsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpabsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpabsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpackssdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpackssdw-2.c new file mode 100644 index 00000000000..6bad76290e5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpackssdw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackssdw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackssdw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpacksswb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpacksswb-2.c new file mode 100644 index 00000000000..7c369e0b861 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpacksswb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpacksswb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpacksswb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpackusdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpackusdw-2.c new file mode 100644 index 00000000000..253adae9b72 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpackusdw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackusdw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackusdw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpackuswb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpackuswb-2.c new file mode 100644 index 00000000000..a052e60e0b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpackuswb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackuswb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpackuswb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddb-2.c new file mode 100644 index 00000000000..07c9fd0ddb2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-1.c new file mode 100644 index 00000000000..d468c06c191 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_add_epi32 (x256, m8, x256, x256); + x256 = _mm256_maskz_add_epi32 (m8, x256, x256); + x128 = _mm_mask_add_epi32 (x128, m8, x128, x128); + x128 = _mm_maskz_add_epi32 (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-2.c new file mode 100644 index 00000000000..3dc72ef3faf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpaddd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpaddd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-1.c new file mode 100644 index 00000000000..3b94fdd0b57 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_add_epi64 (x256, m8, x256, x256); + x256 = _mm256_maskz_add_epi64 (m8, x256, x256); + x128 = _mm_mask_add_epi64 (x128, m8, x128, x128); + x128 = _mm_maskz_add_epi64 (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-2.c new file mode 100644 index 00000000000..7fb63b757e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpaddq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpaddq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsb-2.c new file mode 100644 index 00000000000..f17892871cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddsb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddsb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsw-2.c new file mode 100644 index 00000000000..51b24a38dba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusb-2.c new file mode 100644 index 00000000000..122edcd9c4f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddusb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddusb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusw-2.c new file mode 100644 index 00000000000..75726328621 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddusw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddusw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddusw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpaddw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddw-2.c new file mode 100644 index 00000000000..a3a5db355b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpaddw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpaddw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpalignr-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpalignr-2.c new file mode 100644 index 00000000000..0d30c652622 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpalignr-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpalignr-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpalignr-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-1.c new file mode 100644 index 00000000000..23cffba81c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_and_epi32 (y, m, y, y); + y = _mm256_maskz_and_epi32 (m, y, y); + + x = _mm_mask_and_epi32 (x, m, x, x); + x = _mm_maskz_and_epi32 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-2.c new file mode 100644 index 00000000000..85a806b1e06 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-1.c new file mode 100644 index 00000000000..e244cd899c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_andnot_epi32 (y, m, y, y); + y = _mm256_maskz_andnot_epi32 (m, y, y); + + x = _mm_mask_andnot_epi32 (x, m, x, x); + x = _mm_maskz_andnot_epi32 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-2.c new file mode 100644 index 00000000000..8805d30d2f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandnd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandnd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-1.c new file mode 100644 index 00000000000..cc171d1c298 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_andnot_epi64 (y, m, y, y); + y = _mm256_maskz_andnot_epi64 (m, y, y); + + x = _mm_mask_andnot_epi64 (x, m, x, x); + x = _mm_maskz_andnot_epi64 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-2.c new file mode 100644 index 00000000000..da4169b40f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandnq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandnq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandnq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-1.c new file mode 100644 index 00000000000..3922c9faa7e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_and_epi64 (y, m, y, y); + y = _mm256_maskz_and_epi64 (m, y, y); + + x = _mm_mask_and_epi64 (x, m, x, x); + x = _mm_maskz_and_epi64 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-2.c new file mode 100644 index 00000000000..3579cf45e5b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpandq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpandq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpavgb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpavgb-2.c new file mode 100644 index 00000000000..ffcff26e12c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpavgb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpavgb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpavgb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpavgw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpavgw-2.c new file mode 100644 index 00000000000..8ce32abcb0b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpavgw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpavgw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpavgw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmb-2.c new file mode 100644 index 00000000000..ff339726c03 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpblendmb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpblendmb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-1.c new file mode 100644 index 00000000000..4a62debab6c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vpblendmd|vmovdqa32)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmd|vmovdqa32)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_blend_epi32 (m, x, x); + xx = _mm_mask_blend_epi32 (m, xx, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-2.c new file mode 100644 index 00000000000..b05227cbb8b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpblendmd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpblendmd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-1.c new file mode 100644 index 00000000000..dc23d17aa55 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "(vpblendmq|vmovdqa64)\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "(vpblendmq|vmovdqa64)\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_blend_epi64 (m, x, x); + xx = _mm_mask_blend_epi64 (m, xx, xx); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-2.c new file mode 100644 index 00000000000..2b15de68a41 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpblendmq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpblendmq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmw-2.c new file mode 100644 index 00000000000..74c59aab49a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpblendmw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpblendmw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpblendmw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastb-2.c new file mode 100644 index 00000000000..5f5575ac266 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpbroadcastb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpbroadcastb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-1.c new file mode 100644 index 00000000000..c665163d005 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { target { ! { ia32 } } } } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile int z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_broadcastd_epi32 (x, m, y); + x = _mm256_maskz_broadcastd_epi32 (m, y); + y = _mm_mask_broadcastd_epi32 (y, m, y); + y = _mm_maskz_broadcastd_epi32 (m, y); + + x = _mm256_mask_set1_epi32 (x, m, z); + x = _mm256_maskz_set1_epi32 (m, z); + y = _mm_mask_set1_epi32 (y, m, z); + y = _mm_maskz_set1_epi32 (m, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-2.c new file mode 100644 index 00000000000..bfa207f9153 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpbroadcastd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpbroadcastd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmb2q-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmb2q-1.c new file mode 100644 index 00000000000..24172166131 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmb2q-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler "vpbroadcastmb2q\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%xmm\[0-7\]" } } */ +/* { dg-final { scan-assembler "vpbroadcastmb2q\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%ymm\[0-7\]" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x128 = _mm_broadcastmb_epi64 (m8); + x256 = _mm256_broadcastmb_epi64 (m8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmw2d-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmw2d-1.c new file mode 100644 index 00000000000..a6891b2fc8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastmw2d-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler "vpbroadcastmw2d\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%xmm\[0-7\]" } } */ +/* { dg-final { scan-assembler "vpbroadcastmw2d\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%ymm\[0-7\]" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask16 m16; + +void extern +avx512vl_test (void) +{ + x128 = _mm_broadcastmw_epi32 (m16); + x256 = _mm256_broadcastmw_epi32 (m16); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-1.c new file mode 100644 index 00000000000..a957334a1c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { target { ! { ia32 } } } } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile long long z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_broadcastq_epi64 (x, m, y); + x = _mm256_maskz_broadcastq_epi64 (m, y); + y = _mm_mask_broadcastq_epi64 (y, m, y); + y = _mm_maskz_broadcastq_epi64 (m, y); + + x = _mm256_mask_set1_epi64 (x, m, z); + x = _mm256_maskz_set1_epi64 (m, z); + y = _mm_mask_set1_epi64 (y, m, z); + y = _mm_maskz_set1_epi64 (m, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-2.c new file mode 100644 index 00000000000..f4880280ea0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpbroadcastq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpbroadcastq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastw-2.c new file mode 100644 index 00000000000..981abef006b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpbroadcastw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpbroadcastw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpbroadcastw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpb-2.c new file mode 100644 index 00000000000..7b8e413c164 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-1.c new file mode 100644 index 00000000000..ce99466f1ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm256_cmp_epi32_mask (x, x, _MM_CMPINT_EQ); + m = _mm256_mask_cmp_epi32_mask (m, x, x, _MM_CMPINT_EQ); + m = _mm_cmp_epi32_mask (xx, xx, _MM_CMPINT_EQ); + m = _mm_mask_cmp_epi32_mask (m, xx, xx, _MM_CMPINT_EQ); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-2.c new file mode 100644 index 00000000000..957cb039128 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqb-2.c new file mode 100644 index 00000000000..c5b068b071f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpeqb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpeqb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-1.c new file mode 100644 index 00000000000..c4a3a55930a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpeq_epi32_mask (x128, x128); + m = _mm256_cmpeq_epi32_mask (x256, x256); + m = _mm_mask_cmpeq_epi32_mask (3, x128, x128); + m = _mm256_mask_cmpeq_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-2.c new file mode 100644 index 00000000000..fd6982ebe91 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpeqd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpeqd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c new file mode 100644 index 00000000000..65ef59206bc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpeqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpeqq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpeqq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpeq_epi64_mask (x128, x128); + m = _mm256_cmpeq_epi64_mask (x256, x256); + m = _mm_mask_cmpeq_epi64_mask (3, x128, x128); + m = _mm256_mask_cmpeq_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-2.c new file mode 100644 index 00000000000..b99ac1b050f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpeqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpeqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqw-2.c new file mode 100644 index 00000000000..82cd9cbfc12 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpeqw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpeqw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-2.c new file mode 100644 index 00000000000..4af12f25036 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpged-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpged-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-2.c new file mode 100644 index 00000000000..ca5a3cbeb1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-2.c new file mode 100644 index 00000000000..f9ad3d4ad1f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-2.c new file mode 100644 index 00000000000..2ed2506c592 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgeuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtb-2.c new file mode 100644 index 00000000000..143368a7166 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-1.c new file mode 100644 index 00000000000..ba621ea694c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpgtd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpgt_epi32_mask (x128, x128); + m = _mm256_cmpgt_epi32_mask (x256, x256); + m = _mm_mask_cmpgt_epi32_mask (3, x128, x128); + m = _mm256_mask_cmpgt_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-2.c new file mode 100644 index 00000000000..99daeb413c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c new file mode 100644 index 00000000000..ce8cc4dc037 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpgtq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpgtq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpgtq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpgt_epi64_mask (x128, x128); + m = _mm256_cmpgt_epi64_mask (x256, x256); + m = _mm_mask_cmpgt_epi64_mask (3, x128, x128); + m = _mm256_mask_cmpgt_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-2.c new file mode 100644 index 00000000000..85f47be3d96 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtw-2.c new file mode 100644 index 00000000000..1d5fcae7dce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-2.c new file mode 100644 index 00000000000..756b836c39a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpled-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpled-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-2.c new file mode 100644 index 00000000000..5a342713873 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-2.c new file mode 100644 index 00000000000..dc26cd24272 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-2.c new file mode 100644 index 00000000000..41ebcb9bfea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpleuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-2.c new file mode 100644 index 00000000000..2e0e5d59b8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-2.c new file mode 100644 index 00000000000..5e3d16c23a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-2.c new file mode 100644 index 00000000000..59d45ce944d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-2.c new file mode 100644 index 00000000000..4380c6948a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpltuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-2.c new file mode 100644 index 00000000000..2fe87e9ed26 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpneqd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpneqd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-2.c new file mode 100644 index 00000000000..c0fb0291fa1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpneqq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpneqq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-2.c new file mode 100644 index 00000000000..ac9326784e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpnequd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpnequd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-2.c new file mode 100644 index 00000000000..649179f6e46 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpnequq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpnequq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-1.c new file mode 100644 index 00000000000..6be6171dacd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + m = _mm256_cmp_epi64_mask (x, x, _MM_CMPINT_UNUSED); + m = _mm256_mask_cmp_epi64_mask (m, x, x, _MM_CMPINT_NE); + m = _mm_cmp_epi64_mask (xx, xx, _MM_CMPINT_NLT); + m = _mm_mask_cmp_epi64_mask (m, xx, xx, _MM_CMPINT_GE); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-2.c new file mode 100644 index 00000000000..7de841472af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpub-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpub-2.c new file mode 100644 index 00000000000..4be301aab4a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpub-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpub-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpub-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-1.c new file mode 100644 index 00000000000..6de5a88be79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm256_cmp_epu32_mask (x, x, _MM_CMPINT_LE); + m = _mm256_mask_cmp_epu32_mask (m, x, x, _MM_CMPINT_UNUSED); + m = _mm_cmp_epu32_mask (xx, xx, _MM_CMPINT_NE); + m = _mm_mask_cmp_epu32_mask (m, xx, xx, _MM_CMPINT_NLT); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-2.c new file mode 100644 index 00000000000..0df8f868e68 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-1.c new file mode 100644 index 00000000000..24b2da47ed2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i xx; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm256_cmp_epu64_mask (x, x, _MM_CMPINT_NLE); + m = _mm256_mask_cmp_epu64_mask (m, x, x, _MM_CMPINT_GT); + m = _mm_cmp_epu64_mask (xx, xx, _MM_CMPINT_EQ); + m = _mm_mask_cmp_epu64_mask (m, xx, xx, _MM_CMPINT_LT); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-2.c new file mode 100644 index 00000000000..18896276787 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuw-2.c new file mode 100644 index 00000000000..2b0ec73bbf7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpuw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpuw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpuw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpw-2.c new file mode 100644 index 00000000000..fcd32b57d0e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-1.c new file mode 100644 index 00000000000..af00ab0ac46 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +int *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_compress_epi32 (x1, m, x1); + x2 = _mm_mask_compress_epi32 (x2, m, x2); + + x1 = _mm256_maskz_compress_epi32 (m, x1); + x2 = _mm_maskz_compress_epi32 (m, x2); + + _mm256_mask_compressstoreu_epi32 (p, m, x1); + _mm_mask_compressstoreu_epi32 (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-2.c new file mode 100644 index 00000000000..f6f1b08bb0a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcompressd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcompressd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-1.c new file mode 100644 index 00000000000..0fb73ca64b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +long long *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_compress_epi64 (x1, m, x1); + x2 = _mm_mask_compress_epi64 (x2, m, x2); + + x1 = _mm256_maskz_compress_epi64 (m, x1); + x2 = _mm_maskz_compress_epi64 (m, x2); + + _mm256_mask_compressstoreu_epi64 (p, m, x1); + _mm_mask_compressstoreu_epi64 (p, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-2.c new file mode 100644 index 00000000000..f9544eb1de7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcompressq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcompressq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictd-1.c new file mode 100644 index 00000000000..db7a2e0c22c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s; +volatile __m256i res; +volatile __m128i s2; +volatile __m128i res2; + +void extern +avx512vl_test (void) +{ + res = _mm256_conflict_epi32 (s); + res = _mm256_mask_conflict_epi32 (res, 2, s); + res = _mm256_maskz_conflict_epi32 (2, s); + res2 = _mm_conflict_epi32 (s2); + res2 = _mm_mask_conflict_epi32 (res2, 2, s2); + res2 = _mm_maskz_conflict_epi32 (2, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictq-1.c new file mode 100644 index 00000000000..b81684c8450 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpconflictq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s; +volatile __m256i res; +volatile __m128i s2; +volatile __m128i res2; + +void extern +avx512vl_test (void) +{ + res = _mm256_conflict_epi64 (s); + res = _mm256_mask_conflict_epi64 (res, 2, s); + res = _mm256_maskz_conflict_epi64 (2, s); + res2 = _mm_conflict_epi64 (s2); + res2 = _mm_mask_conflict_epi64 (res2, 2, s2); + res2 = _mm_maskz_conflict_epi64 (2, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-1.c new file mode 100644 index 00000000000..06135081af0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_maskz_permutexvar_epi32 (m, x, x); + x = _mm256_mask_permutexvar_epi32 (x, m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-2.c new file mode 100644 index 00000000000..1d10e6ed215 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermd-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermd-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-1.c new file mode 100644 index 00000000000..7211427a78e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermi2d\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2d\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x1; +volatile __m128i x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask2_permutex2var_epi32 (x1, y, m, x1); + x2 = _mm_mask2_permutex2var_epi32 (x2, z, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-2.c new file mode 100644 index 00000000000..090cb40000f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2d-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2d-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2d-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-1.c new file mode 100644 index 00000000000..7e1e971d174 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermi2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask2_permutex2var_pd (x1, y, m, x1); + x2 = _mm_mask2_permutex2var_pd (x2, z, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-2.c new file mode 100644 index 00000000000..a4ce1323e8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-1.c new file mode 100644 index 00000000000..ff3a2529e59 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermi2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask2_permutex2var_ps (x1, y, m, x1); + x2 = _mm_mask2_permutex2var_ps (x2, z, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-2.c new file mode 100644 index 00000000000..377ee1b74fe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-1.c new file mode 100644 index 00000000000..9edffe8bea5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermi2q\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermi2q\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x1; +volatile __m128i x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask2_permutex2var_epi64 (x1, y, m, x1); + x2 = _mm_mask2_permutex2var_epi64 (x2, z, m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-2.c new file mode 100644 index 00000000000..22418b31ac2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2q-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2q-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermi2q-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2w-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2w-2.c new file mode 100644 index 00000000000..edac8cdf649 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermi2w-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermi2w-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermi2w-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-1.c new file mode 100644 index 00000000000..8986e09bd25 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d y; +volatile __m256i c; +volatile __m128d x; +volatile __m128i k; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_permutevar_pd (y, m, y, c); + y = _mm256_maskz_permutevar_pd (m, y, c); + x = _mm_mask_permutevar_pd (x, m, x, k); + x = _mm_maskz_permutevar_pd (m, x, k); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-2.c new file mode 100644 index 00000000000..bf2383094ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-1.c new file mode 100644 index 00000000000..0f84f40a3db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*3\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*3\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*3\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_permute_pd (y, m, y, 13); + y = _mm256_maskz_permute_pd (m, y, 13); + x = _mm_mask_permute_pd (x, m, x, 3); + x = _mm_maskz_permute_pd (m, x, 3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-2.c new file mode 100644 index 00000000000..5a2b4046288 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpdi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpdi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpdi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-1.c new file mode 100644 index 00000000000..3bf91d62564 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 y; +volatile __m128 x; +volatile __m256i c; +volatile __m128i k; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_permutevar_ps (y, m, y, c); + y = _mm256_maskz_permutevar_ps (m, y, c); + x = _mm_mask_permutevar_ps (x, m, x, k); + x = _mm_maskz_permutevar_ps (m, x, k); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-2.c new file mode 100644 index 00000000000..df724c7db0d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-1.c new file mode 100644 index 00000000000..503a65178e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_permute_ps (y, m, y, 13); + y = _mm256_maskz_permute_ps (m, y, 13); + x = _mm_mask_permute_ps (x, m, x, 13); + x = _mm_maskz_permute_ps (m, x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-2.c new file mode 100644 index 00000000000..c5e7cbff635 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermilpsi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpsi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermilpsi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-1.c new file mode 100644 index 00000000000..d2fde4bb256 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m256d y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_permutexvar_pd (x, y); + y = _mm256_mask_permutexvar_pd (y, m, x, y); + y = _mm256_maskz_permutexvar_pd (m, x, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-2.c new file mode 100644 index 00000000000..84ae96626a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpd-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermpd-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-1.c new file mode 100644 index 00000000000..aeedc5f2692 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_permutex_pd (x, 13); + x = _mm256_mask_permutex_pd (x, m, x, 13); + x = _mm256_maskz_permutex_pd (m, x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-2.c new file mode 100644 index 00000000000..c48043b8608 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermpdi-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermpdi-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-1.c new file mode 100644 index 00000000000..9ed8c80359c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m256 y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_permutexvar_ps (x, y); + y = _mm256_mask_permutexvar_ps (y, m, x, y); + y = _mm256_maskz_permutexvar_ps (m, x, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-2.c new file mode 100644 index 00000000000..e53b1777de7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermps-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermps-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-1.c new file mode 100644 index 00000000000..f949a760206 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_permutex_epi64 (x, m, x, 13); + x = _mm256_maskz_permutex_epi64 (m, x, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-2.c new file mode 100644 index 00000000000..ac7c671ba96 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-imm-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermq-imm-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-1.c new file mode 100644 index 00000000000..b333e90073a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_maskz_permutexvar_epi64 (m, x, x); + x = _mm256_mask_permutexvar_epi64 (x, m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-2.c new file mode 100644 index 00000000000..af096f52e49 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermq-var-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermq-var-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-1.c new file mode 100644 index 00000000000..91930846cb0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x1; +volatile __m128i x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_permutex2var_epi32 (x1, y, x1); + x1 = _mm256_mask_permutex2var_epi32 (x1, m, y, x1); + x1 = _mm256_maskz_permutex2var_epi32 (m, x1, y, x1); + x2 = _mm_permutex2var_epi32 (x2, z, x2); + x2 = _mm_mask_permutex2var_epi32 (x2, m, z, x2); + x2 = _mm_maskz_permutex2var_epi32 (m, x2, z, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-2.c new file mode 100644 index 00000000000..82e045c572a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2d-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2d-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2d-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-1.c new file mode 100644 index 00000000000..8a61fcfc26e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_permutex2var_pd (x1, y, x1); + x1 = _mm256_mask_permutex2var_pd (x1, m, y, x1); + x1 = _mm256_maskz_permutex2var_pd (m, x1, y, x1); + x2 = _mm_permutex2var_pd (x2, z, x2); + x2 = _mm_mask_permutex2var_pd (x2, m, z, x2); + x2 = _mm_maskz_permutex2var_pd (m, x2, z, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-2.c new file mode 100644 index 00000000000..66681eb4da7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-1.c new file mode 100644 index 00000000000..57125e4a4c7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_permutex2var_ps (x1, y, x1); + x1 = _mm256_mask_permutex2var_ps (x1, m, y, x1); + x1 = _mm256_maskz_permutex2var_ps (m, x1, y, x1); + x2 = _mm_permutex2var_ps (x2, z, x2); + x2 = _mm_mask_permutex2var_ps (x2, m, z, x2); + x2 = _mm_maskz_permutex2var_ps (m, x2, z, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-2.c new file mode 100644 index 00000000000..cf6e0a8ee1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-1.c new file mode 100644 index 00000000000..ba76a81324d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x1; +volatile __m128i x2; +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_permutex2var_epi64 (x1, y, x1); + x1 = _mm256_mask_permutex2var_epi64 (x1, m, y, x1); + x1 = _mm256_maskz_permutex2var_epi64 (m, x1, y, x1); + x2 = _mm_permutex2var_epi64 (x2, z, x2); + x2 = _mm_mask_permutex2var_epi64 (x2, m, z, x2); + x2 = _mm_maskz_permutex2var_epi64 (m, x2, z, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-2.c new file mode 100644 index 00000000000..998b1752d04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2q-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2q-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpermt2q-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2w-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2w-2.c new file mode 100644 index 00000000000..bf33b6ab572 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermt2w-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermt2w-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermt2w-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpermw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpermw-2.c new file mode 100644 index 00000000000..2f01064ecfc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpermw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpermw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-1.c new file mode 100644 index 00000000000..aa68a5c400f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +int *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_expand_epi32 (x1, m, x1); + x2 = _mm_mask_expand_epi32 (x2, m, x2); + + x1 = _mm256_maskz_expand_epi32 (m, x1); + x2 = _mm_maskz_expand_epi32 (m, x2); + + x1 = _mm256_mask_expandloadu_epi32 (x1, m, p); + x2 = _mm_mask_expandloadu_epi32 (x2, m, p); + + x1 = _mm256_maskz_expandloadu_epi32 (m, p); + x2 = _mm_maskz_expandloadu_epi32 (m, p); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-2.c new file mode 100644 index 00000000000..c353d5a1311 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpexpandd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpexpandd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-1.c new file mode 100644 index 00000000000..418e1b41e64 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */ + +#include <immintrin.h> + +long long *p; +volatile __m256i x1; +volatile __m128i x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_expand_epi64 (x1, m, x1); + x2 = _mm_mask_expand_epi64 (x2, m, x2); + + x1 = _mm256_maskz_expand_epi64 (m, x1); + x2 = _mm_maskz_expand_epi64 (m, x2); + + x1 = _mm256_mask_expandloadu_epi64 (x1, m, p); + x2 = _mm_mask_expandloadu_epi64 (x2, m, p); + + x1 = _mm256_maskz_expandloadu_epi64 (m, p); + x2 = _mm_maskz_expandloadu_epi64 (m, p); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-2.c new file mode 100644 index 00000000000..2b571b7faa2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpexpandq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpexpandq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntd-1.c new file mode 100644 index 00000000000..e93805d459b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */ +/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s; +volatile __m256i res; +volatile __m128i s2; +volatile __m128i res2; + +void extern +avx512vl_test (void) +{ + res = _mm256_lzcnt_epi32 (s); + res = _mm256_mask_lzcnt_epi32 (res, 2, s); + res = _mm256_maskz_lzcnt_epi32 (2, s); + res2 = _mm_lzcnt_epi32 (s2); + res2 = _mm_mask_lzcnt_epi32 (res2, 2, s2); + res2 = _mm_maskz_lzcnt_epi32 (2, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntq-1.c new file mode 100644 index 00000000000..ef8042ef3f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vplzcntq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512cd -O2" } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i s; +volatile __m256i res; +volatile __m128i s2; +volatile __m128i res2; + +void extern +avx512vl_test (void) +{ + res = _mm256_lzcnt_epi64 (s); + res = _mm256_maskz_lzcnt_epi64 (2, s); + res = _mm256_mask_lzcnt_epi64 (res, 2, s); + res2 = _mm_lzcnt_epi64 (s2); + res2 = _mm_maskz_lzcnt_epi64 (2, s2); + res2 = _mm_mask_lzcnt_epi64 (res2, 2, s2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddubsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddubsw-2.c new file mode 100644 index 00000000000..5eb756b1ebf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddubsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaddubsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaddubsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddwd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddwd-2.c new file mode 100644 index 00000000000..2e1b6c95518 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaddwd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaddwd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaddwd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsb-2.c new file mode 100644 index 00000000000..06c22a21616 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxsb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxsb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-1.c new file mode 100644 index 00000000000..a2db4f0db85 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_max_epi32 (x, m, x, x); + x = _mm256_maskz_max_epi32 (m, x, x); + y = _mm_mask_max_epi32 (y, m, y, y); + y = _mm_maskz_max_epi32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-2.c new file mode 100644 index 00000000000..ff1017afbd5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxsd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxsd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-1.c new file mode 100644 index 00000000000..7c1d669d8cc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_max_epi64 (x, x); + x = _mm256_mask_max_epi64 (x, m, x, x); + x = _mm256_maskz_max_epi64 (m, x, x); + y = _mm_max_epi64 (y, y); + y = _mm_mask_max_epi64 (y, m, y, y); + y = _mm_maskz_max_epi64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-2.c new file mode 100644 index 00000000000..958e8d3190a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxsq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxsq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsw-2.c new file mode 100644 index 00000000000..bc769aa7add --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxub-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxub-2.c new file mode 100644 index 00000000000..90797d900e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxub-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxub-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxub-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-1.c new file mode 100644 index 00000000000..d2e6d1210a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_max_epu32 (x, m, x, x); + x = _mm256_maskz_max_epu32 (m, x, x); + y = _mm_mask_max_epu32 (y, m, y, y); + y = _mm_maskz_max_epu32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-2.c new file mode 100644 index 00000000000..f61e911fe60 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-1.c new file mode 100644 index 00000000000..7ff7768a1af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_max_epu64 (x, x); + x = _mm256_mask_max_epu64 (x, m, x, x); + x = _mm256_maskz_max_epu64 (m, x, x); + y = _mm_max_epu64 (y, y); + y = _mm_mask_max_epu64 (y, m, y, y); + y = _mm_maskz_max_epu64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-2.c new file mode 100644 index 00000000000..bb985567224 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmaxuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuw-2.c new file mode 100644 index 00000000000..65c78fd62c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmaxuw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxuw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmaxuw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsb-2.c new file mode 100644 index 00000000000..16282201365 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminsb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminsb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-1.c new file mode 100644 index 00000000000..8a87dbae59b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_min_epi32 (x, m, x, x); + x = _mm256_maskz_min_epi32 (m, x, x); + y = _mm_mask_min_epi32 (y, m, y, y); + y = _mm_maskz_min_epi32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-2.c new file mode 100644 index 00000000000..cc465e8492f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminsd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminsd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-1.c new file mode 100644 index 00000000000..7a76c9de1de --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_min_epi64 (x, x); + x = _mm256_mask_min_epi64 (x, m, x, x); + x = _mm256_maskz_min_epi64 (m, x, x); + y = _mm_min_epi64 (y, y); + y = _mm_mask_min_epi64 (y, m, y, y); + y = _mm_maskz_min_epi64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-2.c new file mode 100644 index 00000000000..b0f68a0fe28 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminsq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminsq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsw-2.c new file mode 100644 index 00000000000..940a87f9eb3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminub-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminub-2.c new file mode 100644 index 00000000000..d6f21456b6d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminub-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminub-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminub-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-1.c new file mode 100644 index 00000000000..7c55d8713e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_min_epu32 (x, m, x, x); + x = _mm256_maskz_min_epu32 (m, x, x); + y = _mm_mask_min_epu32 (y, m, y, y); + y = _mm_maskz_min_epu32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-2.c new file mode 100644 index 00000000000..34a17f8e08a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-1.c new file mode 100644 index 00000000000..d2c997a04b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512bw -O2" } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_min_epu64 (x, x); + x = _mm256_mask_min_epu64 (x, m, x, x); + x = _mm256_maskz_min_epu64 (m, x, x); + y = _mm_min_epu64 (y, y); + y = _mm_mask_min_epu64 (y, m, y, y); + y = _mm_maskz_min_epu64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-2.c new file mode 100644 index 00000000000..67f1e4afa8d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpminuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpminuw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuw-2.c new file mode 100644 index 00000000000..71f0accb84c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpminuw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminuw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpminuw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovb2m-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovb2m-2.c new file mode 100644 index 00000000000..d178049552f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovb2m-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovb2m-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovb2m-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovd2m-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovd2m-2.c new file mode 100644 index 00000000000..bd76c212336 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovd2m-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovd2m-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovd2m-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-1.c new file mode 100644 index 00000000000..5ea9418ab7b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtepi32_epi8 (x); + z = _mm_mask_cvtepi32_epi8 (z, m, x); + z = _mm_maskz_cvtepi32_epi8 (m, x); + z = _mm256_cvtepi32_epi8 (y); + z = _mm256_mask_cvtepi32_epi8 (z, m, y); + z = _mm256_maskz_cvtepi32_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-2.c new file mode 100644 index 00000000000..1d2f3adc2a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovdb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovdb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-1.c new file mode 100644 index 00000000000..cba590ddcce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtepi32_epi16 (x); + z = _mm_mask_cvtepi32_epi16 (z, m, x); + z = _mm_maskz_cvtepi32_epi16 (m, x); + z = _mm256_cvtepi32_epi16 (y); + z = _mm256_mask_cvtepi32_epi16 (z, m, y); + z = _mm256_maskz_cvtepi32_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-2.c new file mode 100644 index 00000000000..7ec76377f54 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovdw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovdw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovdw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2b-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2b-2.c new file mode 100644 index 00000000000..8783abd0feb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2b-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovm2b-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovm2b-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2d-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2d-2.c new file mode 100644 index 00000000000..639d0cc4d01 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2d-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovm2d-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovm2d-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2q-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2q-2.c new file mode 100644 index 00000000000..cc316a8d0ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2q-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovm2q-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovm2q-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2w-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2w-2.c new file mode 100644 index 00000000000..3b8eaa7b975 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovm2w-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovm2w-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovm2w-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovq2m-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovq2m-2.c new file mode 100644 index 00000000000..dfcd7996385 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovq2m-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovq2m-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmovq2m-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-1.c new file mode 100644 index 00000000000..8cdca2dfa41 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtepi64_epi8 (x); + z = _mm_mask_cvtepi64_epi8 (z, m, x); + z = _mm_maskz_cvtepi64_epi8 (m, x); + z = _mm256_cvtepi64_epi8 (y); + z = _mm256_mask_cvtepi64_epi8 (z, m, y); + z = _mm256_maskz_cvtepi64_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-2.c new file mode 100644 index 00000000000..893d30bbae1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-1.c new file mode 100644 index 00000000000..063d937c415 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtepi64_epi32 (x); + z = _mm_mask_cvtepi64_epi32 (z, m, x); + z = _mm_maskz_cvtepi64_epi32 (m, x); + z = _mm256_cvtepi64_epi32 (y); + z = _mm256_mask_cvtepi64_epi32 (z, m, y); + z = _mm256_maskz_cvtepi64_epi32 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-2.c new file mode 100644 index 00000000000..2570919bef8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-1.c new file mode 100644 index 00000000000..e3d6ddfe646 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtepi64_epi16 (x); + z = _mm_mask_cvtepi64_epi16 (z, m, x); + z = _mm_maskz_cvtepi64_epi16 (m, x); + z = _mm256_cvtepi64_epi16 (y); + z = _mm256_mask_cvtepi64_epi16 (z, m, y); + z = _mm256_maskz_cvtepi64_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-2.c new file mode 100644 index 00000000000..0983ac57d57 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovqw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovqw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-1.c new file mode 100644 index 00000000000..876f0cfea94 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtsepi32_epi8 (x); + z = _mm_mask_cvtsepi32_epi8 (z, m, x); + z = _mm_maskz_cvtsepi32_epi8 (m, x); + z = _mm256_cvtsepi32_epi8 (y); + z = _mm256_mask_cvtsepi32_epi8 (z, m, y); + z = _mm256_maskz_cvtsepi32_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-2.c new file mode 100644 index 00000000000..2a73d23af61 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsdb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsdb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-1.c new file mode 100644 index 00000000000..ae2a45b8fdd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtsepi32_epi16 (x); + z = _mm_mask_cvtsepi32_epi16 (z, m, x); + z = _mm_maskz_cvtsepi32_epi16 (m, x); + z = _mm256_cvtsepi32_epi16 (y); + z = _mm256_mask_cvtsepi32_epi16 (z, m, y); + z = _mm256_maskz_cvtsepi32_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-2.c new file mode 100644 index 00000000000..e1bd82abd04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsdw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsdw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsdw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-1.c new file mode 100644 index 00000000000..68f70fdd3dc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtsepi64_epi8 (x); + z = _mm_mask_cvtsepi64_epi8 (z, m, x); + z = _mm_maskz_cvtsepi64_epi8 (m, x); + z = _mm256_cvtsepi64_epi8 (y); + z = _mm256_mask_cvtsepi64_epi8 (z, m, y); + z = _mm256_maskz_cvtsepi64_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-2.c new file mode 100644 index 00000000000..0ffc86c8256 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-1.c new file mode 100644 index 00000000000..6ca1fe284c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtsepi64_epi32 (x); + z = _mm_mask_cvtsepi64_epi32 (z, m, x); + z = _mm_maskz_cvtsepi64_epi32 (m, x); + z = _mm256_cvtsepi64_epi32 (y); + z = _mm256_mask_cvtsepi64_epi32 (z, m, y); + z = _mm256_maskz_cvtsepi64_epi32 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-2.c new file mode 100644 index 00000000000..7e9ed106c86 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-1.c new file mode 100644 index 00000000000..cca0d09a983 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtsepi64_epi16 (x); + z = _mm_mask_cvtsepi64_epi16 (z, m, x); + z = _mm_maskz_cvtsepi64_epi16 (m, x); + z = _mm256_cvtsepi64_epi16 (y); + z = _mm256_mask_cvtsepi64_epi16 (z, m, y); + z = _mm256_maskz_cvtsepi64_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-2.c new file mode 100644 index 00000000000..d0dacb477c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsqw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsqw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovswb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovswb-2.c new file mode 100644 index 00000000000..d2384d917c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovswb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovswb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovswb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-1.c new file mode 100644 index 00000000000..e54b3f81da7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi8_epi32 (res1, m, s); + res2 = _mm_mask_cvtepi8_epi32 (res2, m, s); + + res1 = _mm256_maskz_cvtepi8_epi32 (m, s); + res2 = _mm_maskz_cvtepi8_epi32 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-2.c new file mode 100644 index 00000000000..1b36fd4c05b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxbd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxbd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-1.c new file mode 100644 index 00000000000..095f532493f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi8_epi64 (res1, m, s); + res2 = _mm_mask_cvtepi8_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepi8_epi64 (m, s); + res2 = _mm_maskz_cvtepi8_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-2.c new file mode 100644 index 00000000000..289ebd4cc0e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxbq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxbq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbw-2.c new file mode 100644 index 00000000000..71dca4eca76 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxbw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovsxbw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovsxbw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-1.c new file mode 100644 index 00000000000..c6ba11be5c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi32_epi64 (res1, m, s); + res2 = _mm_mask_cvtepi32_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepi32_epi64 (m, s); + res2 = _mm_maskz_cvtepi32_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-2.c new file mode 100644 index 00000000000..8c564c1210d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxdq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxdq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxdq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-1.c new file mode 100644 index 00000000000..69a019d05df --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi16_epi32 (res1, m, s); + res2 = _mm_mask_cvtepi16_epi32 (res2, m, s); + + res1 = _mm256_maskz_cvtepi16_epi32 (m, s); + res2 = _mm_maskz_cvtepi16_epi32 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-2.c new file mode 100644 index 00000000000..e8d466ca4ce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxwd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxwd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-1.c new file mode 100644 index 00000000000..72ad8618354 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepi16_epi64 (res1, m, s); + res2 = _mm_mask_cvtepi16_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepi16_epi64 (m, s); + res2 = _mm_maskz_cvtepi16_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-2.c new file mode 100644 index 00000000000..cb4cf243334 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovsxwq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxwq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovsxwq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-1.c new file mode 100644 index 00000000000..81a308ff297 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtusepi32_epi8 (x); + z = _mm_mask_cvtusepi32_epi8 (z, m, x); + z = _mm_maskz_cvtusepi32_epi8 (m, x); + z = _mm256_cvtusepi32_epi8 (y); + z = _mm256_mask_cvtusepi32_epi8 (z, m, y); + z = _mm256_maskz_cvtusepi32_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-2.c new file mode 100644 index 00000000000..4230463c1bd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusdb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusdb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-1.c new file mode 100644 index 00000000000..9fe534dfcee --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtusepi32_epi16 (x); + z = _mm_mask_cvtusepi32_epi16 (z, m, x); + z = _mm_maskz_cvtusepi32_epi16 (m, x); + z = _mm256_cvtusepi32_epi16 (y); + z = _mm256_mask_cvtusepi32_epi16 (z, m, y); + z = _mm256_maskz_cvtusepi32_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-2.c new file mode 100644 index 00000000000..db4fff646da --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusdw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusdw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusdw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-1.c new file mode 100644 index 00000000000..d64e81c2eda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtusepi64_epi8 (x); + z = _mm_mask_cvtusepi64_epi8 (z, m, x); + z = _mm_maskz_cvtusepi64_epi8 (m, x); + z = _mm256_cvtusepi64_epi8 (y); + z = _mm256_mask_cvtusepi64_epi8 (z, m, y); + z = _mm256_maskz_cvtusepi64_epi8 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-2.c new file mode 100644 index 00000000000..644f1785714 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-1.c new file mode 100644 index 00000000000..05d0bb5e2a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtusepi64_epi32 (x); + z = _mm_mask_cvtusepi64_epi32 (z, m, x); + z = _mm_maskz_cvtusepi64_epi32 (m, x); + z = _mm256_cvtusepi64_epi32 (y); + z = _mm256_mask_cvtusepi64_epi32 (z, m, y); + z = _mm256_maskz_cvtusepi64_epi32 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-2.c new file mode 100644 index 00000000000..6ea1dacc285 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-1.c new file mode 100644 index 00000000000..d98b6d56d9b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i x, z; +volatile __m256i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + z = _mm_cvtusepi64_epi16 (x); + z = _mm_mask_cvtusepi64_epi16 (z, m, x); + z = _mm_maskz_cvtusepi64_epi16 (m, x); + z = _mm256_cvtusepi64_epi16 (y); + z = _mm256_mask_cvtusepi64_epi16 (z, m, y); + z = _mm256_maskz_cvtusepi64_epi16 (m, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-2.c new file mode 100644 index 00000000000..a7a34af4076 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovusqw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovusqw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovuswb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovuswb-2.c new file mode 100644 index 00000000000..bd8b215c0d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovuswb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovuswb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovuswb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovw2m-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovw2m-2.c new file mode 100644 index 00000000000..dd2da1d84d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovw2m-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovw2m-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovw2m-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovwb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovwb-2.c new file mode 100644 index 00000000000..ed7c246d7f1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovwb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovwb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovwb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-1.c new file mode 100644 index 00000000000..23d6ed138b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepu8_epi32 (res1, m, s); + res2 = _mm_mask_cvtepu8_epi32 (res2, m, s); + + res1 = _mm256_maskz_cvtepu8_epi32 (m, s); + res2 = _mm_maskz_cvtepu8_epi32 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-2.c new file mode 100644 index 00000000000..db10b72ca1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxbd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxbd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-1.c new file mode 100644 index 00000000000..af642114afb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepu8_epi64 (res1, m, s); + res2 = _mm_mask_cvtepu8_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepu8_epi64 (m, s); + res2 = _mm_maskz_cvtepu8_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-2.c new file mode 100644 index 00000000000..bd193327563 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxbq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxbq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbw-2.c new file mode 100644 index 00000000000..c24ebf7fb69 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxbw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovzxbw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmovzxbw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-1.c new file mode 100644 index 00000000000..4695b5545cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepu32_epi64 (res1, m, s); + res2 = _mm_mask_cvtepu32_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepu32_epi64 (m, s); + res2 = _mm_maskz_cvtepu32_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-2.c new file mode 100644 index 00000000000..c351c22aaa7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxdq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxdq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxdq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-1.c new file mode 100644 index 00000000000..b18d2fa668a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepu16_epi32 (res1, m, s); + res2 = _mm_mask_cvtepu16_epi32 (res2, m, s); + + res1 = _mm256_maskz_cvtepu16_epi32 (m, s); + res2 = _mm_maskz_cvtepu16_epi32 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-2.c new file mode 100644 index 00000000000..a8eef3e88b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxwd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxwd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-1.c new file mode 100644 index 00000000000..4e624109f95 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128i s, res2; +volatile __m256i res1; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + res1 = _mm256_mask_cvtepu16_epi64 (res1, m, s); + res2 = _mm_mask_cvtepu16_epi64 (res2, m, s); + + res1 = _mm256_maskz_cvtepu16_epi64 (m, s); + res2 = _mm_maskz_cvtepu16_epi64 (m, s); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-2.c new file mode 100644 index 00000000000..1be6cb5b9b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmovzxwq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxwq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmovzxwq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-1.c new file mode 100644 index 00000000000..9a57dd0614c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_mul_epi32 (x, m, x, x); + x = _mm256_maskz_mul_epi32 (m, x, x); + y = _mm_mask_mul_epi32 (y, m, y, y); + y = _mm_maskz_mul_epi32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-2.c new file mode 100644 index 00000000000..7d2eea55d2c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuldq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmuldq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmuldq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhrsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhrsw-2.c new file mode 100644 index 00000000000..39841f5d774 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhrsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhrsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhrsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhuw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhuw-2.c new file mode 100644 index 00000000000..5f2dcb9eecd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhuw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhuw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhuw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhw-2.c new file mode 100644 index 00000000000..669ee7c98fe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulhw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmulhw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-1.c new file mode 100644 index 00000000000..6cc59e5964b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i z; +volatile __mmask8 myz; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_mullo_epi32 (y, myz, y, y); + y = _mm256_maskz_mullo_epi32 (myz, y, y); + z = _mm_mask_mullo_epi32 (z, myz, z, z); + z = _mm_maskz_mullo_epi32 (myz, z, z); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-2.c new file mode 100644 index 00000000000..1ea4456a9f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmulld-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmulld-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmulld-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmullq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmullq-2.c new file mode 100644 index 00000000000..36a77b133cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmullq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmullq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vpmullq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmullw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmullw-2.c new file mode 100644 index 00000000000..f01b3c97986 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmullw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmullw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpmullw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-1.c new file mode 100644 index 00000000000..dfe0e2a12af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-1.c @@ -0,0 +1,20 @@ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_mul_epu32 (x, m, x, x); + x = _mm256_maskz_mul_epu32 (m, x, x); + y = _mm_mask_mul_epu32 (y, m, y, y); + y = _mm_maskz_mul_epu32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-2.c new file mode 100644 index 00000000000..cd2b3e6da55 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpmuludq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmuludq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpmuludq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpord-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpord-1.c new file mode 100644 index 00000000000..01a0aa67dae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpord-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_or_epi32 (y, m, y, y); + y = _mm256_maskz_or_epi32 (m, y, y); + + x = _mm_mask_or_epi32 (x, m, x, x); + x = _mm_maskz_or_epi32 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpord-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpord-2.c new file mode 100644 index 00000000000..c81e1f763ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpord-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpord-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpord-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vporq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vporq-1.c new file mode 100644 index 00000000000..b9a89a32be1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vporq-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_or_epi64 (y, m, y, y); + y = _mm256_maskz_or_epi64 (m, y, y); + + x = _mm_mask_or_epi64 (x, m, x, x); + x = _mm_maskz_or_epi64 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vporq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vporq-2.c new file mode 100644 index 00000000000..776181fdba2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vporq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vporq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vporq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprold-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprold-1.c new file mode 100644 index 00000000000..22cb7c13c4d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprold-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rol_epi32 (x, 11); + x = _mm256_mask_rol_epi32 (x, m, x, 11); + x = _mm256_maskz_rol_epi32 (m, x, 11); + + y = _mm_rol_epi32 (y, 12); + y = _mm_mask_rol_epi32 (y, m, y, 12); + y = _mm_maskz_rol_epi32 (m, y, 12); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprold-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprold-2.c new file mode 100644 index 00000000000..4c7b4ab629f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprold-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprold-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprold-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-1.c new file mode 100644 index 00000000000..24ef525eee5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rol_epi64 (x, 11); + x = _mm256_mask_rol_epi64 (x, m, x, 11); + x = _mm256_maskz_rol_epi64 (m, x, 11); + + y = _mm_rol_epi64 (y, 12); + y = _mm_mask_rol_epi64 (y, m, y, 12); + y = _mm_maskz_rol_epi64 (m, y, 12); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-2.c new file mode 100644 index 00000000000..cf1f98f2647 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-1.c new file mode 100644 index 00000000000..2f6b60451f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rolv_epi32 (x, x); + x = _mm256_mask_rolv_epi32 (x, m, x, x); + x = _mm256_maskz_rolv_epi32 (m, x, x); + + y = _mm_rolv_epi32 (y, y); + y = _mm_mask_rolv_epi32 (y, m, y, y); + y = _mm_maskz_rolv_epi32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-2.c new file mode 100644 index 00000000000..0f31644b0fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolvd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolvd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-1.c new file mode 100644 index 00000000000..9a4e68084bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rolv_epi64 (x, x); + x = _mm256_mask_rolv_epi64 (x, m, x, x); + x = _mm256_maskz_rolv_epi64 (m, x, x); + + y = _mm_rolv_epi64 (y, y); + y = _mm_mask_rolv_epi64 (y, m, y, y); + y = _mm_maskz_rolv_epi64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-2.c new file mode 100644 index 00000000000..b203c9fdd5a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprolvq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolvq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprolvq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprord-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprord-1.c new file mode 100644 index 00000000000..e9fad895877 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprord-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_ror_epi32 (x, 11); + x = _mm256_mask_ror_epi32 (x, m, x, 11); + x = _mm256_maskz_ror_epi32 (m, x, 11); + + y = _mm_ror_epi32 (y, 12); + y = _mm_mask_ror_epi32 (y, m, y, 12); + y = _mm_maskz_ror_epi32 (m, y, 12); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprord-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprord-2.c new file mode 100644 index 00000000000..6ae0e3ba6bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprord-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprord-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprord-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-1.c new file mode 100644 index 00000000000..1511ad60e64 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_ror_epi64 (x, 11); + x = _mm256_mask_ror_epi64 (x, m, x, 11); + x = _mm256_maskz_ror_epi64 (m, x, 11); + + y = _mm_ror_epi64 (y, 12); + y = _mm_mask_ror_epi64 (y, m, y, 12); + y = _mm_maskz_ror_epi64 (m, y, 12); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-2.c new file mode 100644 index 00000000000..83aacd134e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-1.c new file mode 100644 index 00000000000..1c383adf790 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rorv_epi32 (x, x); + x = _mm256_mask_rorv_epi32 (x, m, x, x); + x = _mm256_maskz_rorv_epi32 (m, x, x); + + y = _mm_rorv_epi32 (y, y); + y = _mm_mask_rorv_epi32 (y, m, y, y); + y = _mm_maskz_rorv_epi32 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-2.c new file mode 100644 index 00000000000..373beebb2ab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorvd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorvd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-1.c new file mode 100644 index 00000000000..58435058035 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_rorv_epi64 (x, x); + x = _mm256_mask_rorv_epi64 (x, m, x, x); + x = _mm256_maskz_rorv_epi64 (m, x, x); + + y = _mm_rorv_epi64 (y, y); + y = _mm_mask_rorv_epi64 (y, m, y, y); + y = _mm_maskz_rorv_epi64 (m, y, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-2.c new file mode 100644 index 00000000000..781b62b8e12 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vprorvq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorvq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vprorvq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsadbw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsadbw-1.c new file mode 100644 index 00000000000..5ee60602ab4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsadbw-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -mavx512bw -O2" } */ +/* { dg-final { scan-assembler "vpsadbw\[ \\t\]+\[^\n\]*%zmm\[0-9\]"} } */ + +#include <immintrin.h> + +volatile __m512i x; + +void extern +avx512vl_test (void) +{ + x = _mm512_sad_epu8 (x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshufb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufb-2.c new file mode 100644 index 00000000000..85133e3a6c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshufb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshufb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-1.c new file mode 100644 index 00000000000..d7f6380be5e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_shuffle_epi32 (x, m, x, _MM_PERM_AADB); + x = _mm256_maskz_shuffle_epi32 (m, x, _MM_PERM_AADB); + y = _mm_mask_shuffle_epi32 (y, m, y, _MM_PERM_AADB); + y = _mm_maskz_shuffle_epi32 (m, y, _MM_PERM_AADB); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-2.c new file mode 100644 index 00000000000..54223fd4dd4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpshufd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpshufd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshufhw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufhw-2.c new file mode 100644 index 00000000000..a65ec081c1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshufhw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshufhw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshufhw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshuflw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshuflw-2.c new file mode 100644 index 00000000000..6d534f154be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshuflw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshuflw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpshuflw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-1.c new file mode 100644 index 00000000000..f6e9e24423b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 4 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m256; +volatile __mmask8 m128; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sll_epi32 (x256, m256, x256, x128); + x256 = _mm256_maskz_sll_epi32 (m256, x256, x128); + x128 = _mm_mask_sll_epi32 (x128, m128, x128, x128); + x128 = _mm_maskz_sll_epi32 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-2.c new file mode 100644 index 00000000000..681feb04ccb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpslld-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpslld-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpslld-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-1.c new file mode 100644 index 00000000000..ad049c012c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m256; +volatile __mmask8 m128; +#define y 7 + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_slli_epi32 (x256, m256, x256, y); + x256 = _mm256_maskz_slli_epi32 (m256, x256, y); + x128 = _mm_mask_slli_epi32 (x128, m128, x128, y); + x128 = _mm_maskz_slli_epi32 (m128, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-2.c new file mode 100644 index 00000000000..31baa684d52 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpslldi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpslldi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpslldi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-1.c new file mode 100644 index 00000000000..7a703cf2ad5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 4 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m256; +volatile __mmask8 m128; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sll_epi64 (x256, m256, x256, x128); + x256 = _mm256_maskz_sll_epi64 (m256, x256, x128); + x128 = _mm_mask_sll_epi64 (x128, m128, x128, x128); + x128 = _mm_maskz_sll_epi64 (m128, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-2.c new file mode 100644 index 00000000000..135292f3576 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-1.c new file mode 100644 index 00000000000..6a38a410e73 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m256; +volatile __mmask8 m128; +#define y 7 + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_slli_epi64 (x256, m256, x256, y); + x256 = _mm256_maskz_slli_epi64 (m256, x256, y); + x128 = _mm_mask_slli_epi64 (x128, m128, x128, y); + x128 = _mm_maskz_slli_epi64 (m128, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-2.c new file mode 100644 index 00000000000..764df718a02 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllqi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllqi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllqi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-1.c new file mode 100644 index 00000000000..dc5947f08d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sllv_epi32 (x256, m, x256, y256); + x256 = _mm256_maskz_sllv_epi32 (m, x256, y256); + x128 = _mm_mask_sllv_epi32 (x128, m, x128, y128); + x128 = _mm_maskz_sllv_epi32 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-2.c new file mode 100644 index 00000000000..f1281d33926 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllvd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllvd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-1.c new file mode 100644 index 00000000000..f9d28c7facb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sllv_epi64 (x256, m, x256, y256); + x256 = _mm256_maskz_sllv_epi64 (m, x256, y256); + x128 = _mm_mask_sllv_epi64 (x128, m, x128, y128); + x128 = _mm_maskz_sllv_epi64 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-2.c new file mode 100644 index 00000000000..19b087b0446 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllvq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsllvq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvw-2.c new file mode 100644 index 00000000000..1b49e2b0407 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllvw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllvw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllvw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllw-2.c new file mode 100644 index 00000000000..dc5a099ab7a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsllwi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllwi-2.c new file mode 100644 index 00000000000..a4b03ee02e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsllwi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllwi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsllwi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-1.c new file mode 100644 index 00000000000..bd71aa5054a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sra_epi32 (x256, m, x256, y); + x256 = _mm256_maskz_sra_epi32 (m, x256, y); + x128 = _mm_mask_sra_epi32 (x128, m, x128, y); + x128 = _mm_maskz_sra_epi32 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-2.c new file mode 100644 index 00000000000..86abe6c2148 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrad-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrad-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrad-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-1.c new file mode 100644 index 00000000000..a732be5bedb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +#define y 7 +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srai_epi32 (x256, m, x256, y); + x256 = _mm256_maskz_srai_epi32 (m, x256, y); + x128 = _mm_mask_srai_epi32 (x128, m, x128, y); + x128 = _mm_maskz_srai_epi32 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-2.c new file mode 100644 index 00000000000..b77874583c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsradi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsradi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsradi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-1.c new file mode 100644 index 00000000000..e1d754358e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_sra_epi64 (x256, y); + x256 = _mm256_mask_sra_epi64 (x256, m, x256, y); + x256 = _mm256_maskz_sra_epi64 (m, x256, y); + x128 = _mm_sra_epi64 (x128, y); + x128 = _mm_mask_sra_epi64 (x128, m, x128, y); + x128 = _mm_maskz_sra_epi64 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-2.c new file mode 100644 index 00000000000..3331f6b2e3b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsraq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsraq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-1.c new file mode 100644 index 00000000000..27a9e39d2c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +#define y 7 +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_srai_epi64 (x256, y); + x256 = _mm256_mask_srai_epi64 (x256, m, x256, y); + x256 = _mm256_maskz_srai_epi64 (m, x256, y); + x128 = _mm_srai_epi64 (x128, y); + x128 = _mm_mask_srai_epi64 (x128, m, x128, y); + x128 = _mm_maskz_srai_epi64 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-2.c new file mode 100644 index 00000000000..25b6c44e8b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraqi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsraqi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsraqi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-1.c new file mode 100644 index 00000000000..46d99a35621 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srav_epi32 (x256, m, x256, y256); + x256 = _mm256_maskz_srav_epi32 (m, x256, y256); + x128 = _mm_mask_srav_epi32 (x128, m, x128, y128); + x128 = _mm_maskz_srav_epi32 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-2.c new file mode 100644 index 00000000000..da8c2afdaa7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsravd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsravd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-1.c new file mode 100644 index 00000000000..07e51b255f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_srav_epi64 (x256, y256); + x256 = _mm256_mask_srav_epi64 (x256, m, x256, y256); + x256 = _mm256_maskz_srav_epi64 (m, x256, y256); + x128 = _mm_srav_epi64 (x128, y128); + x128 = _mm_mask_srav_epi64 (x128, m, x128, y128); + x128 = _mm_maskz_srav_epi64 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-2.c new file mode 100644 index 00000000000..ae95fa3eb8b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsravq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsravq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsravw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravw-2.c new file mode 100644 index 00000000000..74ce9e04d8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsravw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsravw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsravw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsraw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraw-2.c new file mode 100644 index 00000000000..e6fdc9000c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsraw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsraw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsraw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrawi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrawi-2.c new file mode 100644 index 00000000000..6ce2c923eff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrawi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrawi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrawi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-1.c new file mode 100644 index 00000000000..812580302b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srl_epi32 (x256, m, x256, y); + x256 = _mm256_maskz_srl_epi32 (m, x256, y); + x128 = _mm_mask_srl_epi32 (x128, m, x128, y); + x128 = _mm_maskz_srl_epi32 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-2.c new file mode 100644 index 00000000000..1c420f170f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrld-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrld-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrld-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-1.c new file mode 100644 index 00000000000..cd33ddd50c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +#define y 7 +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srli_epi32 (x256, m, x256, y); + x256 = _mm256_maskz_srli_epi32 (m, x256, y); + x128 = _mm_mask_srli_epi32 (x128, m, x128, y); + x128 = _mm_maskz_srli_epi32 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-2.c new file mode 100644 index 00000000000..86ff3ab787a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrldi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrldi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrldi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-1.c new file mode 100644 index 00000000000..995e14f9888 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __m128i y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_srl_epi64 (x256, y); + x256 = _mm256_mask_srl_epi64 (x256, m, x256, y); + x256 = _mm256_maskz_srl_epi64 (m, x256, y); + x128 = _mm_srl_epi64 (x128, y); + x128 = _mm_mask_srl_epi64 (x128, m, x128, y); + x128 = _mm_maskz_srl_epi64 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-2.c new file mode 100644 index 00000000000..db6a3d18012 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-1.c new file mode 100644 index 00000000000..5479e4be49e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*, %xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +#define y 7 +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_srli_epi64 (x256, y); + x256 = _mm256_mask_srli_epi64 (x256, m, x256, y); + x256 = _mm256_maskz_srli_epi64 (m, x256, y); + x128 = _mm_srli_epi64 (x128, y); + x128 = _mm_mask_srli_epi64 (x128, m, x128, y); + x128 = _mm_maskz_srli_epi64 (m, x128, y); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-2.c new file mode 100644 index 00000000000..25a1f243f53 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlqi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlqi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlqi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-1.c new file mode 100644 index 00000000000..828f911b2ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask16 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srlv_epi32 (x256, m, x256, y256); + x256 = _mm256_maskz_srlv_epi32 (m, x256, y256); + x128 = _mm_mask_srlv_epi32 (x128, m, x128, y128); + x128 = _mm_maskz_srlv_epi32 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-2.c new file mode 100644 index 00000000000..dfbf3647548 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlvd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlvd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-1.c new file mode 100644 index 00000000000..e68f0db33c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256, y256; +volatile __m128i x128, y128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_srlv_epi64 (x256, m, x256, y256); + x256 = _mm256_maskz_srlv_epi64 (m, x256, y256); + x128 = _mm_mask_srlv_epi64 (x128, m, x128, y128); + x128 = _mm_maskz_srlv_epi64 (m, x128, y128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-2.c new file mode 100644 index 00000000000..e9640a7346b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlvq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsrlvq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvw-2.c new file mode 100644 index 00000000000..8209fdde685 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlvw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlvw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlvw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlw-2.c new file mode 100644 index 00000000000..d8a4894ee07 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlwi-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlwi-2.c new file mode 100644 index 00000000000..4d973e83716 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsrlwi-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlwi-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsrlwi-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubb-2.c new file mode 100644 index 00000000000..8c1e8dca13b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-1.c new file mode 100644 index 00000000000..14cbf7e69d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sub_epi32 (x256, m8, x256, x256); + x256 = _mm256_maskz_sub_epi32 (m8, x256, x256); + x128 = _mm_mask_sub_epi32 (x128, m8, x128, x128); + x128 = _mm_maskz_sub_epi32 (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-2.c new file mode 100644 index 00000000000..f16988f1ae6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsubd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsubd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-1.c new file mode 100644 index 00000000000..b11ce0a4168 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_mask_sub_epi64 (x256, m8, x256, x256); + x256 = _mm256_maskz_sub_epi64 (m8, x256, x256); + x128 = _mm_mask_sub_epi64 (x128, m8, x128, x128); + x128 = _mm_maskz_sub_epi64 (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-2.c new file mode 100644 index 00000000000..37e4d82a217 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsubq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpsubq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsb-2.c new file mode 100644 index 00000000000..e426dbff940 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubsb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubsb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsw-2.c new file mode 100644 index 00000000000..6f573124ce5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubsw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubsw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubsw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusb-2.c new file mode 100644 index 00000000000..f92d757b368 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubusb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubusb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusw-2.c new file mode 100644 index 00000000000..4553ea92a35 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubusw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubusw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubusw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpsubw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubw-2.c new file mode 100644 index 00000000000..b229c087afa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpsubw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpsubw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-1.c new file mode 100644 index 00000000000..c280c359db7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y, y2, y3; +volatile __m128i x, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_ternarylogic_epi32 (y, y2, y3, 0xF0); + y = _mm256_mask_ternarylogic_epi32 (y, m, y2, y3, 0xF0); + y = _mm256_maskz_ternarylogic_epi32 (m, y, y2, y3, 0xF0); + + x = _mm_ternarylogic_epi32 (x, x2, x3, 0xF0); + x = _mm_mask_ternarylogic_epi32 (x, m, x2, x3, 0xF0); + x = _mm_maskz_ternarylogic_epi32 (m, x, x2, x3, 0xF0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-2.c new file mode 100644 index 00000000000..0336a153e2c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpternlogd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpternlogd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-1.c new file mode 100644 index 00000000000..ae06ee9df65 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y, y2, y3; +volatile __m128i x, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_ternarylogic_epi64 (y, y2, y3, 0xF0); + y = _mm256_mask_ternarylogic_epi64 (y, m, y2, y3, 0xF0); + y = _mm256_maskz_ternarylogic_epi64 (m, y, y2, y3, 0xF0); + + x = _mm_ternarylogic_epi64 (x, x2, x3, 0xF0); + x = _mm_mask_ternarylogic_epi64 (x, m, x2, x3, 0xF0); + x = _mm_maskz_ternarylogic_epi64 (m, x, x2, x3, 0xF0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-2.c new file mode 100644 index 00000000000..9187e0adea3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpternlogq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpternlogq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpternlogq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmb-2.c new file mode 100644 index 00000000000..595b9c91594 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestmb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestmb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-1.c new file mode 100644 index 00000000000..f9ea72b1ccd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestmd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%*k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%*k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_test_epi32_mask (x128, x128); + m = _mm256_test_epi32_mask (x256, x256); + m = _mm_mask_test_epi32_mask (3, x128, x128); + m = _mm256_mask_test_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-2.c new file mode 100644 index 00000000000..d0fed9722b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestmd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestmd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-1.c new file mode 100644 index 00000000000..d463e84ccba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestmq\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmq\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestmq\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestmq\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_test_epi64_mask (x128, x128); + m = _mm256_test_epi64_mask (x256, x256); + m = _mm_mask_test_epi64_mask (3, x128, x128); + m = _mm256_mask_test_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-2.c new file mode 100644 index 00000000000..0cc41241566 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestmq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestmq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestmw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmw-2.c new file mode 100644 index 00000000000..d1598c0b699 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestmw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestmw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestmw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmb-2.c new file mode 100644 index 00000000000..2df27f29908 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestnmb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestnmb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-1.c new file mode 100644 index 00000000000..37086c44058 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestnmd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmd\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmd\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_testn_epi32_mask (x128, x128); + m = _mm256_testn_epi32_mask (x256, x256); + m = _mm_mask_testn_epi32_mask (3, x128, x128); + m = _mm256_mask_testn_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-2.c new file mode 100644 index 00000000000..307e618036a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestnmd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestnmd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-1.c new file mode 100644 index 00000000000..91fb87b68eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vptestnmq\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmq\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vptestnmq\[ \\t\]+\[^\n\]*%xmm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vptestnmq\[ \\t\]+\[^\n\]*%ymm\[0-7\]\[^\n\]*k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include <immintrin.h> + +volatile __m128i x128; +volatile __m256i x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_testn_epi64_mask (x128, x128); + m = _mm256_testn_epi64_mask (x256, x256); + m = _mm_mask_testn_epi64_mask (3, x128, x128); + m = _mm256_mask_testn_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-2.c new file mode 100644 index 00000000000..89aa0ff4a15 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestnmq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vptestnmq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmw-2.c new file mode 100644 index 00000000000..bbc8c75e6e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vptestnmw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestnmw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vptestnmw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhbw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhbw-2.c new file mode 100644 index 00000000000..fadf7ba761a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhbw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpckhbw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpckhbw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-1.c new file mode 100644 index 00000000000..06f7db7f23c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_unpackhi_epi32 (x, m, y, z); + x = _mm256_maskz_unpackhi_epi32 (m, y, z); + a = _mm_mask_unpackhi_epi32 (a, m, b, c); + a = _mm_maskz_unpackhi_epi32 (m, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-2.c new file mode 100644 index 00000000000..6d4743caef4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhdq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckhdq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckhdq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-1.c new file mode 100644 index 00000000000..0948430d6ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_unpackhi_epi64 (x, m, y, z); + x = _mm256_maskz_unpackhi_epi64 (m, y, z); + a = _mm_mask_unpackhi_epi64 (a, m, b, c); + a = _mm_maskz_unpackhi_epi64 (m, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-2.c new file mode 100644 index 00000000000..f61e456dd27 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhqdq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckhqdq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckhqdq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhwd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhwd-2.c new file mode 100644 index 00000000000..41ad9b7df17 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckhwd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpckhwd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpckhwd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklbw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklbw-2.c new file mode 100644 index 00000000000..d275f18feae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklbw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpcklbw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpcklbw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-1.c new file mode 100644 index 00000000000..19e10c1e898 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_unpacklo_epi32 (x, m, y, z); + x = _mm256_maskz_unpacklo_epi32 (m, y, z); + a = _mm_mask_unpacklo_epi32 (a, m, b, c); + a = _mm_maskz_unpacklo_epi32 (m, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-2.c new file mode 100644 index 00000000000..6d3099ec862 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpckldq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckldq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpckldq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-1.c new file mode 100644 index 00000000000..b3add1e8026 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x, y, z; +volatile __m128i a, b, c; +volatile __mmask8 m; + +void extern +avx512bw_test (void) +{ + x = _mm256_mask_unpacklo_epi64 (x, m, y, z); + x = _mm256_maskz_unpacklo_epi64 (m, y, z); + a = _mm_mask_unpacklo_epi64 (a, m, b, c); + a = _mm_maskz_unpacklo_epi64 (m, b, c); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-2.c new file mode 100644 index 00000000000..37ec820b557 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklqdq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpcklqdq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpunpcklqdq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklwd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklwd-2.c new file mode 100644 index 00000000000..4047202ad90 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpunpcklwd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpcklwd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpunpcklwd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-1.c new file mode 100644 index 00000000000..aa65a8b7b05 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_xor_epi32 (y, m, y, y); + y = _mm256_maskz_xor_epi32 (m, y, y); + + x = _mm_mask_xor_epi32 (x, m, x, x); + x = _mm_maskz_xor_epi32 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-2.c new file mode 100644 index 00000000000..f67fdf9377d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpxord-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpxord-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpxord-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-1.c new file mode 100644 index 00000000000..a7df4fde482 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256i y; +volatile __m128i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + y = _mm256_mask_xor_epi64 (y, m, y, y); + y = _mm256_maskz_xor_epi64 (m, y, y); + + x = _mm_mask_xor_epi64 (x, m, x, x); + x = _mm_maskz_xor_epi64 (m, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-2.c new file mode 100644 index 00000000000..f28e67122cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpxorq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpxorq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpxorq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrangepd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrangepd-2.c new file mode 100644 index 00000000000..2353bbde069 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrangepd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vrangepd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vrangepd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrangeps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrangeps-2.c new file mode 100644 index 00000000000..b3ee2343ec6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrangeps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vrangeps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vrangeps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-1.c new file mode 100644 index 00000000000..dff3b0255ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_rcp14_pd (x1); + x2 = _mm_rcp14_pd (x2); + + x1 = _mm256_mask_rcp14_pd (x1, m, x1); + x2 = _mm_mask_rcp14_pd (x2, m, x2); + + x1 = _mm256_maskz_rcp14_pd (m, x1); + x2 = _mm_maskz_rcp14_pd (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-2.c new file mode 100644 index 00000000000..737c81db026 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrcp14pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrcp14pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-1.c new file mode 100644 index 00000000000..3ca71f4e3ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_rcp14_ps (x1); + x2 = _mm_rcp14_ps (x2); + + x1 = _mm256_mask_rcp14_ps (x1, m, x1); + x2 = _mm_mask_rcp14_ps (x2, m, x2); + + x1 = _mm256_maskz_rcp14_ps (m, x1); + x2 = _mm_maskz_rcp14_ps (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-2.c new file mode 100644 index 00000000000..8241aa2649e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrcp14ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrcp14ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrcp14ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vreducepd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vreducepd-2.c new file mode 100644 index 00000000000..9083ccc96f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vreducepd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vreducepd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vreducepd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vreduceps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vreduceps-2.c new file mode 100644 index 00000000000..6c571fb5df7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vreduceps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vreduceps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vreduceps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-1.c new file mode 100644 index 00000000000..7971ce99797 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-1.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 9} } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 9} } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */ +/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 3} } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_roundscale_pd (x1, 0x42); + x1 = _mm256_ceil_pd (x1); + x1 = _mm256_floor_pd (x1); + x1 = _mm256_mask_roundscale_pd (x1, 2, x1, 0x42); + x1 = _mm256_mask_ceil_pd (x1, 2, x1); + x1 = _mm256_mask_floor_pd (x1, 2, x1); + x1 = _mm256_maskz_roundscale_pd (2, x1, 0x42); + x1 = _mm256_maskz_ceil_pd (2, x1); + x1 = _mm256_maskz_floor_pd (2, x1); + x2 = _mm_roundscale_pd (x2, 0x42); + x2 = _mm_ceil_pd (x2); + x2 = _mm_floor_pd (x2); + x2 = _mm_mask_roundscale_pd (x2, 2, x2, 0x42); + x2 = _mm_mask_ceil_pd (x2, 2, x2); + x2 = _mm_mask_floor_pd (x2, 2, x2); + x2 = _mm_maskz_roundscale_pd (2, x2, 0x42); + x2 = _mm_maskz_ceil_pd (2, x2); + x2 = _mm_maskz_floor_pd (2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-2.c new file mode 100644 index 00000000000..77d56318743 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscalepd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrndscalepd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrndscalepd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-1.c new file mode 100644 index 00000000000..ee054724dc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-1.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 9} } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 9} } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 3} } */ +/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_roundscale_ps (x1, 0x42); + x1 = _mm256_ceil_ps (x1); + x1 = _mm256_floor_ps (x1); + x1 = _mm256_mask_roundscale_ps (x1, 2, x1, 0x42); + x1 = _mm256_mask_ceil_ps (x1, 2, x1); + x1 = _mm256_mask_floor_ps (x1, 2, x1); + x1 = _mm256_maskz_roundscale_ps (2, x1, 0x42); + x1 = _mm256_maskz_ceil_ps (2, x1); + x1 = _mm256_maskz_floor_ps (2, x1); + x2 = _mm_roundscale_ps (x2, 0x42); + x2 = _mm_ceil_ps (x2); + x2 = _mm_floor_ps (x2); + x2 = _mm_mask_roundscale_ps (x2, 2, x2, 0x42); + x2 = _mm_mask_ceil_ps (x2, 2, x2); + x2 = _mm_mask_floor_ps (x2, 2, x2); + x2 = _mm_maskz_roundscale_ps (2, x2, 0x42); + x2 = _mm_maskz_ceil_ps (2, x2); + x2 = _mm_maskz_floor_ps (2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-2.c new file mode 100644 index 00000000000..7f7566bebd4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrndscaleps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrndscaleps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrndscaleps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-1.c new file mode 100644 index 00000000000..3400276379a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_rsqrt14_pd (x1); + x1 = _mm256_mask_rsqrt14_pd (x1, m, x1); + x1 = _mm256_maskz_rsqrt14_pd (m, x1); + + x2 = _mm_rsqrt14_pd (x2); + x2 = _mm_mask_rsqrt14_pd (x2, m, x2); + x2 = _mm_maskz_rsqrt14_pd (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-2.c new file mode 100644 index 00000000000..750e5916d9d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14pd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrsqrt14pd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrsqrt14pd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-1.c new file mode 100644 index 00000000000..840e60b5b2d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_rsqrt14_ps (x1); + x1 = _mm256_mask_rsqrt14_ps (x1, m, x1); + x1 = _mm256_maskz_rsqrt14_ps (m, x1); + + x2 = _mm_rsqrt14_ps (x2); + x2 = _mm_mask_rsqrt14_ps (x2, m, x2); + x2 = _mm_maskz_rsqrt14_ps (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-2.c new file mode 100644 index 00000000000..6eed5988b13 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vrsqrt14ps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrsqrt14ps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vrsqrt14ps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-1.c new file mode 100644 index 00000000000..63e571d23ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_scalef_pd (x256, x256); + x256 = _mm256_mask_scalef_pd (x256, m8, x256, x256); + x256 = _mm256_maskz_scalef_pd (m8, x256, x256); + x128 = _mm_scalef_pd (x128, x128); + x128 = _mm_mask_scalef_pd (x128, m8, x128, x128); + x128 = _mm_maskz_scalef_pd (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-2.c new file mode 100644 index 00000000000..0d8e4c4255e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vscalefpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vscalefpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-1.c new file mode 100644 index 00000000000..b12359c33e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m8; + +void extern +avx512vl_test (void) +{ + x256 = _mm256_scalef_ps (x256, x256); + x256 = _mm256_mask_scalef_ps (x256, m8, x256, x256); + x256 = _mm256_maskz_scalef_ps (m8, x256, x256); + x128 = _mm_scalef_ps (x128, x128); + x128 = _mm_mask_scalef_ps (x128, m8, x128, x128); + x128 = _mm_maskz_scalef_ps (m8, x128, x128); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-2.c new file mode 100644 index 00000000000..d655a1b6dcd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vscalefps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vscalefps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vscalefps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-1.c new file mode 100644 index 00000000000..d8a9f56e415 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_shuffle_f32x4 (x, x, 2); + x = _mm256_mask_shuffle_f32x4 (x, m, x, x, 2); + x = _mm256_maskz_shuffle_f32x4 (m, x, x, 2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-2.c new file mode 100644 index 00000000000..7fbbff3c9c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshuff32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-1.c new file mode 100644 index 00000000000..83b1d148b1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_shuffle_f64x2 (x, x, 2); + x = _mm256_mask_shuffle_f64x2 (x, m, x, x, 2); + x = _mm256_maskz_shuffle_f64x2 (m, x, x, 2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-2.c new file mode 100644 index 00000000000..e751077b74b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshuff64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshuff64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-1.c new file mode 100644 index 00000000000..0d52a339275 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_shuffle_i32x4 (x, x, 2); + x = _mm256_mask_shuffle_i32x4 (x, m, x, x, 2); + x = _mm256_maskz_shuffle_i32x4 (m, x, x, 2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-2.c new file mode 100644 index 00000000000..8debef41427 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi32x4-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufi32x4-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-1.c new file mode 100644 index 00000000000..bde1bf08e8b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_shuffle_i64x2 (x, x, 2); + x = _mm256_mask_shuffle_i64x2 (x, m, x, x, 2); + x = _mm256_maskz_shuffle_i64x2 (m, x, x, 2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-2.c new file mode 100644 index 00000000000..726234c3d1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufi64x2-2.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufi64x2-2.c" + +void +test_128 () {} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-1.c new file mode 100644 index 00000000000..addb7cd9837 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_shuffle_pd (x, m, x, x, 13); + x = _mm256_maskz_shuffle_pd (m, x, x, 13); + y = _mm_mask_shuffle_pd (y, m, y, y, 1); + y = _mm_maskz_shuffle_pd (m, y, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-2.c new file mode 100644 index 00000000000..8b4ef9882a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-1.c new file mode 100644 index 00000000000..560195cbea0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x; +volatile __m128 y; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x = _mm256_mask_shuffle_ps (x, m, x, x, 64); + x = _mm256_maskz_shuffle_ps (m, x, x, 64); + y = _mm_mask_shuffle_ps (y, m, y, y, 64); + y = _mm_maskz_shuffle_ps (m, y, y, 64); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-2.c new file mode 100644 index 00000000000..260922f27fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vshufps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vshufps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-1.c new file mode 100644 index 00000000000..63dbb83d63b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_sqrt_pd (x1, m, x1); + x1 = _mm256_maskz_sqrt_pd (m, x1); + + x2 = _mm_mask_sqrt_pd (x2, m, x2); + x2 = _mm_maskz_sqrt_pd (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-2.c new file mode 100644 index 00000000000..15698e2a344 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsqrtpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsqrtpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-1.c new file mode 100644 index 00000000000..9bfd599232b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_mask_sqrt_ps (x1, m, x1); + x1 = _mm256_maskz_sqrt_ps (m, x1); + + x2 = _mm_mask_sqrt_ps (x2, m, x2); + x2 = _mm_maskz_sqrt_ps (m, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-2.c new file mode 100644 index 00000000000..1bd5bb12e18 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsqrtps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsqrtps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsqrtps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-1.c new file mode 100644 index 00000000000..9234f0fe33e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128d x128; +volatile __m256d x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x128 = _mm_mask_sub_pd (x128, m, x128, x128); + x128 = _mm_maskz_sub_pd (m, x128, x128); + + x256 = _mm256_mask_sub_pd (x256, m, x256, x256); + x256 = _mm256_maskz_sub_pd (m, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-2.c new file mode 100644 index 00000000000..b3a9c8f76dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsubpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsubpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsubpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-1.c new file mode 100644 index 00000000000..a8909163bdb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m128 x128; +volatile __m256 x256; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + x128 = _mm_mask_sub_ps (x128, m, x128, x128); + x128 = _mm_maskz_sub_ps (m, x128, x128); + + x256 = _mm256_mask_sub_ps (x256, m, x256, x256); + x256 = _mm256_maskz_sub_ps (m, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-2.c new file mode 100644 index 00000000000..d22740a098d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vsubps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsubps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vsubps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-1.c new file mode 100644 index 00000000000..3c292804d2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_unpackhi_pd (yy, m, y2, y3); + xx = _mm_mask_unpackhi_pd (xx, m, x2, x3); + + yy = _mm256_maskz_unpackhi_pd (m, y2, y3); + xx = _mm_maskz_unpackhi_pd (m, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-2.c new file mode 100644 index 00000000000..a3323db368e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpckhpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpckhpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-1.c new file mode 100644 index 00000000000..1a8aa61ccff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 yy, y2, y3; +volatile __m128 xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_unpackhi_ps (yy, m, y2, y3); + xx = _mm_mask_unpackhi_ps (xx, m, x2, x3); + + yy = _mm256_maskz_unpackhi_ps (m, y2, y3); + xx = _mm_maskz_unpackhi_ps (m, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-2.c new file mode 100644 index 00000000000..211cbd90a52 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpckhps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpckhps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpckhps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-1.c new file mode 100644 index 00000000000..d2b6b867b4f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256d yy, y2, y3; +volatile __m128d xx, x2, x3; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + yy = _mm256_mask_unpacklo_pd (yy, m, y2, y3); + xx = _mm_mask_unpacklo_pd (xx, m, x2, x3); + + yy = _mm256_maskz_unpacklo_pd (m, y2, y3); + xx = _mm_maskz_unpacklo_pd (m, x2, x3); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-2.c new file mode 100644 index 00000000000..03df654b3ac --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpcklpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpcklpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-1.c new file mode 100644 index 00000000000..bf49da0d7ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 3 } } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x, y, z; +volatile __m128 xx, yy, zz; + +void extern +avx512vl_test (void) +{ + x = _mm256_unpacklo_ps (y, z); + x = _mm256_mask_unpacklo_ps (x, 2, y, z); + x = _mm256_maskz_unpacklo_ps (2, y, z); + xx = _mm_unpacklo_ps (yy, zz); + xx = _mm_mask_unpacklo_ps (xx, 2, yy, zz); + xx = _mm_maskz_unpacklo_ps (2, yy, zz); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-2.c new file mode 100644 index 00000000000..2fa930673bd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vunpcklps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpcklps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vunpcklps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vxorpd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vxorpd-2.c new file mode 100644 index 00000000000..1e88a3a609e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vxorpd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vxorpd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vxorpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vxorps-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vxorps-2.c new file mode 100644 index 00000000000..f6c3ed5bd1f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vxorps-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vxorps-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512dq-vxorps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.target/i386/i386.exp index c753a2b6658..e8da8e5c1a0 100644 --- a/gcc/testsuite/gcc.target/i386/i386.exp +++ b/gcc/testsuite/gcc.target/i386/i386.exp @@ -266,6 +266,19 @@ proc check_effective_target_avx512f { } { } "-mavx512f" ] } +# Return 1 if avx512vl instructions can be compiled. +proc check_effective_target_avx512vl { } { + return [check_no_compiler_messages avx512vl object { + typedef long long __v4di __attribute__ ((__vector_size__ (32))); + __v4di + mm256_and_epi64 (__v4di __X, __v4di __Y) + { + __v4di __W; + return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1); + } + } "-mavx512vl" ] +} + # Return 1 if avx512cd instructions can be compiled. proc check_effective_target_avx512cd { } { return [check_no_compiler_messages avx512cd_trans object { @@ -274,8 +287,8 @@ proc check_effective_target_avx512cd { } { _mm512_conflict_epi64 (__v8di __W, __v8di __A) { return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A, - (__v8di) __W, - -1); + (__v8di) __W, + -1); } } "-Wno-psabi -mavx512cd" ] } @@ -306,6 +319,36 @@ proc check_effective_target_sha { } { } "-O2 -msha" ] } +# Return 1 if avx512dq instructions can be compiled. +proc check_effective_target_avx512dq { } { + return [check_no_compiler_messages avx512dq object { + typedef long long __v8di __attribute__ ((__vector_size__ (64))); + __v8di + _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B) + { + return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A, + (__v8di) __B, + (__v8di) __W, + -1); + } + } "-mavx512dq" ] +} + +# Return 1 if avx512bw instructions can be compiled. +proc check_effective_target_avx512bw { } { + return [check_no_compiler_messages avx512bw object { + typedef short __v32hi __attribute__ ((__vector_size__ (64))); + __v32hi + _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B) + { + return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A, + (__v32hi) __B, + (__v32hi) __W, + -1); + } + } "-mavx512bw" ] +} + # If a testcase doesn't have special options, use these. global DEFAULT_CFLAGS if ![info exists DEFAULT_CFLAGS] then { diff --git a/gcc/testsuite/gcc.target/i386/m512-check.h b/gcc/testsuite/gcc.target/i386/m512-check.h index 64e085bc602..1a1065d2053 100644 --- a/gcc/testsuite/gcc.target/i386/m512-check.h +++ b/gcc/testsuite/gcc.target/i386/m512-check.h @@ -111,3 +111,7 @@ check_rough_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v, \ CHECK_ROUGH_EXP (union512, float, "%f") CHECK_ROUGH_EXP (union512d, double, "%f") +CHECK_ROUGH_EXP (union256, float, "%f") +CHECK_ROUGH_EXP (union256d, double, "%f") +CHECK_ROUGH_EXP (union128, float, "%f") +CHECK_ROUGH_EXP (union128d, double, "%f") diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index 88a7613e043..67bcf48fbc0 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl" } */ #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index de54a45a2e0..b17e8ebb5e0 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw" } */ #include <mm_malloc.h> @@ -382,3 +382,207 @@ /* shaintrin.h */ #define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1) + +/* TODO split later */ +#define __builtin_ia32_pslldq512(A, B) __builtin_ia32_pslldq512(A, 8) +#define __builtin_ia32_psrldq512(A, B) __builtin_ia32_psrldq512(A, 8) +#define __builtin_ia32_alignd128_mask(A, B, F, D, E) __builtin_ia32_alignd128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignd256_mask(A, B, F, D, E) __builtin_ia32_alignd256_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq128_mask(A, B, F, D, E) __builtin_ia32_alignq128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq256_mask(A, B, F, D, E) __builtin_ia32_alignq256_mask(A, B, 1, D, E) +#define __builtin_ia32_cmpb128_mask(A, B, E, D) __builtin_ia32_cmpb128_mask(A, B, 1, D) +#define __builtin_ia32_cmpb256_mask(A, B, E, D) __builtin_ia32_cmpb256_mask(A, B, 1, D) +#define __builtin_ia32_cmpb512_mask(A, B, E, D) __builtin_ia32_cmpb512_mask(A, B, 1, D) +#define __builtin_ia32_cmpd128_mask(A, B, E, D) __builtin_ia32_cmpd128_mask(A, B, 1, D) +#define __builtin_ia32_cmpd256_mask(A, B, E, D) __builtin_ia32_cmpd256_mask(A, B, 1, D) +#define __builtin_ia32_cmppd128_mask(A, B, E, D) __builtin_ia32_cmppd128_mask(A, B, 1, D) +#define __builtin_ia32_cmppd256_mask(A, B, E, D) __builtin_ia32_cmppd256_mask(A, B, 1, D) +#define __builtin_ia32_cmpps128_mask(A, B, E, D) __builtin_ia32_cmpps128_mask(A, B, 1, D) +#define __builtin_ia32_cmpps256_mask(A, B, E, D) __builtin_ia32_cmpps256_mask(A, B, 1, D) +#define __builtin_ia32_cmpq128_mask(A, B, E, D) __builtin_ia32_cmpq128_mask(A, B, 1, D) +#define __builtin_ia32_cmpq256_mask(A, B, E, D) __builtin_ia32_cmpq256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw128_mask(A, B, E, D) __builtin_ia32_cmpw128_mask(A, B, 1, D) +#define __builtin_ia32_cmpw256_mask(A, B, E, D) __builtin_ia32_cmpw256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw512_mask(A, B, E, D) __builtin_ia32_cmpw512_mask(A, B, 1, D) +#define __builtin_ia32_cvtpd2qq512_mask(A, B, C, D) __builtin_ia32_cvtpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvtpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2qq512_mask(A, B, C, D) __builtin_ia32_cvtps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2uqq512_mask(A, B, C, D) __builtin_ia32_cvtps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2qq512_mask(A, B, C, D) __builtin_ia32_cvttpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvttpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2qq512_mask(A, B, C, D) __builtin_ia32_cvttps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2uqq512_mask(A, B, C, D) __builtin_ia32_cvttps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtuqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtuqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_dbpsadbw128_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw128_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw256_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw256_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw512_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw512_mask(A, B, 1, D, E) +#define __builtin_ia32_extractf32x4_256_mask(A, E, C, D) __builtin_ia32_extractf32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf32x8_mask(A, E, C, D) __builtin_ia32_extractf32x8_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_512_mask(A, E, C, D) __builtin_ia32_extractf64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x4_256_mask(A, E, C, D) __builtin_ia32_extracti32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x8_mask(A, E, C, D) __builtin_ia32_extracti32x8_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_512_mask(A, E, C, D) __builtin_ia32_extracti64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_fixupimmpd128(A, B, C, E) __builtin_ia32_fixupimmpd128(A, B, C, 1) +#define __builtin_ia32_fixupimmpd128_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256(A, B, C, E) __builtin_ia32_fixupimmpd256(A, B, C, 1) +#define __builtin_ia32_fixupimmpd256_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128(A, B, C, E) __builtin_ia32_fixupimmps128(A, B, C, 1) +#define __builtin_ia32_fixupimmps128_mask(A, B, C, F, E) __builtin_ia32_fixupimmps128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256(A, B, C, E) __builtin_ia32_fixupimmps256(A, B, C, 1) +#define __builtin_ia32_fixupimmps256_mask(A, B, C, F, E) __builtin_ia32_fixupimmps256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fpclasspd128_mask(A, D, C) __builtin_ia32_fpclasspd128_mask(A, 1, C) +#define __builtin_ia32_fpclasspd256_mask(A, D, C) __builtin_ia32_fpclasspd256_mask(A, 1, C) +#define __builtin_ia32_fpclasspd512_mask(A, D, C) __builtin_ia32_fpclasspd512_mask(A, 1, C) +#define __builtin_ia32_fpclassps128_mask(A, D, C) __builtin_ia32_fpclassps128_mask(A, 1, C) +#define __builtin_ia32_fpclassps256_mask(A, D, C) __builtin_ia32_fpclassps256_mask(A, 1, C) +#define __builtin_ia32_fpclassps512_mask(A, D, C) __builtin_ia32_fpclassps512_mask(A, 1, C) +#define __builtin_ia32_fpclasssd(A, D) __builtin_ia32_fpclasssd(A, 1) +#define __builtin_ia32_fpclassss(A, D) __builtin_ia32_fpclassss(A, 1) +#define __builtin_ia32_gather3div2df(A, B, C, D, F) __builtin_ia32_gather3div2df(A, B, C, D, 1) +#define __builtin_ia32_gather3div2di(A, B, C, D, F) __builtin_ia32_gather3div2di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4df(A, B, C, D, F) __builtin_ia32_gather3div4df(A, B, C, D, 1) +#define __builtin_ia32_gather3div4di(A, B, C, D, F) __builtin_ia32_gather3div4di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4sf(A, B, C, D, F) __builtin_ia32_gather3div4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div4si(A, B, C, D, F) __builtin_ia32_gather3div4si(A, B, C, D, 1) +#define __builtin_ia32_gather3div8sf(A, B, C, D, F) __builtin_ia32_gather3div8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div8si(A, B, C, D, F) __builtin_ia32_gather3div8si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2df(A, B, C, D, F) __builtin_ia32_gather3siv2df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2di(A, B, C, D, F) __builtin_ia32_gather3siv2di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4df(A, B, C, D, F) __builtin_ia32_gather3siv4df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4di(A, B, C, D, F) __builtin_ia32_gather3siv4di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4sf(A, B, C, D, F) __builtin_ia32_gather3siv4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4si(A, B, C, D, F) __builtin_ia32_gather3siv4si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8sf(A, B, C, D, F) __builtin_ia32_gather3siv8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8si(A, B, C, D, F) __builtin_ia32_gather3siv8si(A, B, C, D, 1) +#define __builtin_ia32_getmantpd128_mask(A, E, C, D) __builtin_ia32_getmantpd128_mask(A, 1, C, D) +#define __builtin_ia32_getmantpd256_mask(A, E, C, D) __builtin_ia32_getmantpd256_mask(A, 1, C, D) +#define __builtin_ia32_getmantps128_mask(A, E, C, D) __builtin_ia32_getmantps128_mask(A, 1, C, D) +#define __builtin_ia32_getmantps256_mask(A, E, C, D) __builtin_ia32_getmantps256_mask(A, 1, C, D) +#define __builtin_ia32_insertf32x4_256_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf32x8_mask(A, B, F, D, E) __builtin_ia32_insertf32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_256_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_512_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x4_256_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x8_mask(A, B, F, D, E) __builtin_ia32_inserti32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_256_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_512_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_palignr128_mask(A, B, F, D, E) __builtin_ia32_palignr128_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr256_mask(A, B, F, D, E) __builtin_ia32_palignr256_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr512(A, B, D) __builtin_ia32_palignr512(A, B, 8) +#define __builtin_ia32_palignr512_mask(A, B, F, D, E) __builtin_ia32_palignr512_mask(A, B, 8, D, E) +#define __builtin_ia32_permdf256_mask(A, E, C, D) __builtin_ia32_permdf256_mask(A, 1, C, D) +#define __builtin_ia32_permdi256_mask(A, E, C, D) __builtin_ia32_permdi256_mask(A, 1, C, D) +#define __builtin_ia32_prold128_mask(A, E, C, D) __builtin_ia32_prold128_mask(A, 1, C, D) +#define __builtin_ia32_prold256_mask(A, E, C, D) __builtin_ia32_prold256_mask(A, 1, C, D) +#define __builtin_ia32_prolq128_mask(A, E, C, D) __builtin_ia32_prolq128_mask(A, 1, C, D) +#define __builtin_ia32_prolq256_mask(A, E, C, D) __builtin_ia32_prolq256_mask(A, 1, C, D) +#define __builtin_ia32_prord128_mask(A, E, C, D) __builtin_ia32_prord128_mask(A, 1, C, D) +#define __builtin_ia32_prord256_mask(A, E, C, D) __builtin_ia32_prord256_mask(A, 1, C, D) +#define __builtin_ia32_prorq128_mask(A, E, C, D) __builtin_ia32_prorq128_mask(A, 1, C, D) +#define __builtin_ia32_prorq256_mask(A, E, C, D) __builtin_ia32_prorq256_mask(A, 1, C, D) +#define __builtin_ia32_pshufd128_mask(A, E, C, D) __builtin_ia32_pshufd128_mask(A, 1, C, D) +#define __builtin_ia32_pshufd256_mask(A, E, C, D) __builtin_ia32_pshufd256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw128_mask(A, E, C, D) __builtin_ia32_pshufhw128_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw256_mask(A, E, C, D) __builtin_ia32_pshufhw256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw512_mask(A, E, C, D) __builtin_ia32_pshufhw512_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw128_mask(A, E, C, D) __builtin_ia32_pshuflw128_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw256_mask(A, E, C, D) __builtin_ia32_pshuflw256_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw512_mask(A, E, C, D) __builtin_ia32_pshuflw512_mask(A, 1, C, D) +#define __builtin_ia32_pslldi128_mask(A, E, C, D) __builtin_ia32_pslldi128_mask(A, 1, C, D) +#define __builtin_ia32_pslldi256_mask(A, E, C, D) __builtin_ia32_pslldi256_mask(A, 1, C, D) +#define __builtin_ia32_psllqi128_mask(A, E, C, D) __builtin_ia32_psllqi128_mask(A, 1, C, D) +#define __builtin_ia32_psllqi256_mask(A, E, C, D) __builtin_ia32_psllqi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi128_mask(A, E, C, D) __builtin_ia32_psllwi128_mask(A, 1, C, D) +#define __builtin_ia32_psllwi256_mask(A, E, C, D) __builtin_ia32_psllwi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi512_mask(A, E, C, D) __builtin_ia32_psllwi512_mask(A, 1, C, D) +#define __builtin_ia32_psradi128_mask(A, E, C, D) __builtin_ia32_psradi128_mask(A, 1, C, D) +#define __builtin_ia32_psradi256_mask(A, E, C, D) __builtin_ia32_psradi256_mask(A, 1, C, D) +#define __builtin_ia32_psraqi128_mask(A, E, C, D) __builtin_ia32_psraqi128_mask(A, 1, C, D) +#define __builtin_ia32_psraqi256_mask(A, E, C, D) __builtin_ia32_psraqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi128_mask(A, E, C, D) __builtin_ia32_psrawi128_mask(A, 1, C, D) +#define __builtin_ia32_psrawi256_mask(A, E, C, D) __builtin_ia32_psrawi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi512_mask(A, E, C, D) __builtin_ia32_psrawi512_mask(A, 1, C, D) +#define __builtin_ia32_psrldi128_mask(A, E, C, D) __builtin_ia32_psrldi128_mask(A, 1, C, D) +#define __builtin_ia32_psrldi256_mask(A, E, C, D) __builtin_ia32_psrldi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi128_mask(A, E, C, D) __builtin_ia32_psrlqi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi256_mask(A, E, C, D) __builtin_ia32_psrlqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi128_mask(A, E, C, D) __builtin_ia32_psrlwi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi256_mask(A, E, C, D) __builtin_ia32_psrlwi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi512_mask(A, E, C, D) __builtin_ia32_psrlwi512_mask(A, 1, C, D) +#define __builtin_ia32_pternlogd128_mask(A, B, C, F, E) __builtin_ia32_pternlogd128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd128_maskz(A, B, C, F, E) __builtin_ia32_pternlogd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_mask(A, B, C, F, E) __builtin_ia32_pternlogd256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_maskz(A, B, C, F, E) __builtin_ia32_pternlogd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_mask(A, B, C, F, E) __builtin_ia32_pternlogq128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_maskz(A, B, C, F, E) __builtin_ia32_pternlogq128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_mask(A, B, C, F, E) __builtin_ia32_pternlogq256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_maskz(A, B, C, F, E) __builtin_ia32_pternlogq256_maskz(A, B, C, 1, E) +#define __builtin_ia32_rangepd128_mask(A, B, F, D, E) __builtin_ia32_rangepd128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd256_mask(A, B, F, D, E) __builtin_ia32_rangepd256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd512_mask(A, B, I, D, E, F) __builtin_ia32_rangepd512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangeps128_mask(A, B, F, D, E) __builtin_ia32_rangeps128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps256_mask(A, B, F, D, E) __builtin_ia32_rangeps256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps512_mask(A, B, I, D, E, F) __builtin_ia32_rangeps512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangesd128_round(A, B, I, F) __builtin_ia32_rangesd128_round(A, B, 1, 8) +#define __builtin_ia32_rangess128_round(A, B, I, F) __builtin_ia32_rangess128_round(A, B, 1, 8) +#define __builtin_ia32_reducepd128_mask(A, E, C, D) __builtin_ia32_reducepd128_mask(A, 1, C, D) +#define __builtin_ia32_reducepd256_mask(A, E, C, D) __builtin_ia32_reducepd256_mask(A, 1, C, D) +#define __builtin_ia32_reducepd512_mask(A, E, C, D) __builtin_ia32_reducepd512_mask(A, 1, C, D) +#define __builtin_ia32_reduceps128_mask(A, E, C, D) __builtin_ia32_reduceps128_mask(A, 1, C, D) +#define __builtin_ia32_reduceps256_mask(A, E, C, D) __builtin_ia32_reduceps256_mask(A, 1, C, D) +#define __builtin_ia32_reduceps512_mask(A, E, C, D) __builtin_ia32_reduceps512_mask(A, 1, C, D) +#define __builtin_ia32_reducesd(A, B, F) __builtin_ia32_reducesd(A, B, 1) +#define __builtin_ia32_reducess(A, B, F) __builtin_ia32_reducess(A, B, 1) +#define __builtin_ia32_rndscalepd_128_mask(A, E, C, D) __builtin_ia32_rndscalepd_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscalepd_256_mask(A, E, C, D) __builtin_ia32_rndscalepd_256_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_128_mask(A, E, C, D) __builtin_ia32_rndscaleps_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_256_mask(A, E, C, D) __builtin_ia32_rndscaleps_256_mask(A, 1, C, D) +#define __builtin_ia32_scatterdiv2df(A, B, C, D, F) __builtin_ia32_scatterdiv2df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv2di(A, B, C, D, F) __builtin_ia32_scatterdiv2di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4df(A, B, C, D, F) __builtin_ia32_scatterdiv4df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4di(A, B, C, D, F) __builtin_ia32_scatterdiv4di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4sf(A, B, C, D, F) __builtin_ia32_scatterdiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4si(A, B, C, D, F) __builtin_ia32_scatterdiv4si(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8sf(A, B, C, D, F) __builtin_ia32_scatterdiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8si(A, B, C, D, F) __builtin_ia32_scatterdiv8si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2df(A, B, C, D, F) __builtin_ia32_scattersiv2df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2di(A, B, C, D, F) __builtin_ia32_scattersiv2di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4df(A, B, C, D, F) __builtin_ia32_scattersiv4df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4di(A, B, C, D, F) __builtin_ia32_scattersiv4di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4sf(A, B, C, D, F) __builtin_ia32_scattersiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4si(A, B, C, D, F) __builtin_ia32_scattersiv4si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8sf(A, B, C, D, F) __builtin_ia32_scattersiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8si(A, B, C, D, F) __builtin_ia32_scattersiv8si(A, B, C, D, 1) +#define __builtin_ia32_shuf_f32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_f64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd128_mask(A, B, F, D, E) __builtin_ia32_shufpd128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd256_mask(A, B, F, D, E) __builtin_ia32_shufpd256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps128_mask(A, B, F, D, E) __builtin_ia32_shufps128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps256_mask(A, B, F, D, E) __builtin_ia32_shufps256_mask(A, B, 1, D, E) +#define __builtin_ia32_ucmpb128_mask(A, B, E, D) __builtin_ia32_ucmpb128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb256_mask(A, B, E, D) __builtin_ia32_ucmpb256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb512_mask(A, B, E, D) __builtin_ia32_ucmpb512_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd128_mask(A, B, E, D) __builtin_ia32_ucmpd128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd256_mask(A, B, E, D) __builtin_ia32_ucmpd256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq128_mask(A, B, E, D) __builtin_ia32_ucmpq128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq256_mask(A, B, E, D) __builtin_ia32_ucmpq256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw128_mask(A, B, E, D) __builtin_ia32_ucmpw128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw256_mask(A, B, E, D) __builtin_ia32_ucmpw256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw512_mask(A, B, E, D) __builtin_ia32_ucmpw512_mask(A, B, 1, D) +#define __builtin_ia32_vcvtps2ph256_mask(A, E, C, D) __builtin_ia32_vcvtps2ph256_mask(A, 1, C, D) +#define __builtin_ia32_vcvtps2ph_mask(A, E, C, D) __builtin_ia32_vcvtps2ph_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd256_mask(A, E, C, D) __builtin_ia32_vpermilpd256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd_mask(A, E, C, D) __builtin_ia32_vpermilpd_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps256_mask(A, E, C, D) __builtin_ia32_vpermilps256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps_mask(A, E, C, D) __builtin_ia32_vpermilps_mask(A, 1, C, D) diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index 2641b801a03..28475c44302 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl" } */ #include <mm_malloc.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 26b805d4a41..a0098d4ece2 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -99,7 +99,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq") #endif /* Following intrinsics require immediate arguments. They @@ -214,7 +214,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq") #endif #include <immintrin.h> test_1 (_cvtss_sh, unsigned short, float, 1) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index fe61e17df97..46ef77b5acc 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -385,7 +385,211 @@ /* shaintrin.h */ #define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt") +/* TODO split later */ +#define __builtin_ia32_pslldq512(A, B) __builtin_ia32_pslldq512(A, 8) +#define __builtin_ia32_psrldq512(A, B) __builtin_ia32_psrldq512(A, 8) +#define __builtin_ia32_alignd128_mask(A, B, F, D, E) __builtin_ia32_alignd128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignd256_mask(A, B, F, D, E) __builtin_ia32_alignd256_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq128_mask(A, B, F, D, E) __builtin_ia32_alignq128_mask(A, B, 1, D, E) +#define __builtin_ia32_alignq256_mask(A, B, F, D, E) __builtin_ia32_alignq256_mask(A, B, 1, D, E) +#define __builtin_ia32_cmpb128_mask(A, B, E, D) __builtin_ia32_cmpb128_mask(A, B, 1, D) +#define __builtin_ia32_cmpb256_mask(A, B, E, D) __builtin_ia32_cmpb256_mask(A, B, 1, D) +#define __builtin_ia32_cmpb512_mask(A, B, E, D) __builtin_ia32_cmpb512_mask(A, B, 1, D) +#define __builtin_ia32_cmpd128_mask(A, B, E, D) __builtin_ia32_cmpd128_mask(A, B, 1, D) +#define __builtin_ia32_cmpd256_mask(A, B, E, D) __builtin_ia32_cmpd256_mask(A, B, 1, D) +#define __builtin_ia32_cmppd128_mask(A, B, E, D) __builtin_ia32_cmppd128_mask(A, B, 1, D) +#define __builtin_ia32_cmppd256_mask(A, B, E, D) __builtin_ia32_cmppd256_mask(A, B, 1, D) +#define __builtin_ia32_cmpps128_mask(A, B, E, D) __builtin_ia32_cmpps128_mask(A, B, 1, D) +#define __builtin_ia32_cmpps256_mask(A, B, E, D) __builtin_ia32_cmpps256_mask(A, B, 1, D) +#define __builtin_ia32_cmpq128_mask(A, B, E, D) __builtin_ia32_cmpq128_mask(A, B, 1, D) +#define __builtin_ia32_cmpq256_mask(A, B, E, D) __builtin_ia32_cmpq256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw128_mask(A, B, E, D) __builtin_ia32_cmpw128_mask(A, B, 1, D) +#define __builtin_ia32_cmpw256_mask(A, B, E, D) __builtin_ia32_cmpw256_mask(A, B, 1, D) +#define __builtin_ia32_cmpw512_mask(A, B, E, D) __builtin_ia32_cmpw512_mask(A, B, 1, D) +#define __builtin_ia32_cvtpd2qq512_mask(A, B, C, D) __builtin_ia32_cvtpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvtpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2qq512_mask(A, B, C, D) __builtin_ia32_cvtps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtps2uqq512_mask(A, B, C, D) __builtin_ia32_cvtps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2qq512_mask(A, B, C, D) __builtin_ia32_cvttpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvttpd2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2qq512_mask(A, B, C, D) __builtin_ia32_cvttps2qq512_mask(A, B, C, 8) +#define __builtin_ia32_cvttps2uqq512_mask(A, B, C, D) __builtin_ia32_cvttps2uqq512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2pd512_mask(A, B, C, D) __builtin_ia32_cvtuqq2pd512_mask(A, B, C, 8) +#define __builtin_ia32_cvtuqq2ps512_mask(A, B, C, D) __builtin_ia32_cvtuqq2ps512_mask(A, B, C, 8) +#define __builtin_ia32_dbpsadbw128_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw128_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw256_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw256_mask(A, B, 1, D, E) +#define __builtin_ia32_dbpsadbw512_mask(A, B, F, D, E) __builtin_ia32_dbpsadbw512_mask(A, B, 1, D, E) +#define __builtin_ia32_extractf32x4_256_mask(A, E, C, D) __builtin_ia32_extractf32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf32x8_mask(A, E, C, D) __builtin_ia32_extractf32x8_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extractf64x2_512_mask(A, E, C, D) __builtin_ia32_extractf64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x4_256_mask(A, E, C, D) __builtin_ia32_extracti32x4_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti32x8_mask(A, E, C, D) __builtin_ia32_extracti32x8_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D) +#define __builtin_ia32_extracti64x2_512_mask(A, E, C, D) __builtin_ia32_extracti64x2_512_mask(A, 1, C, D) +#define __builtin_ia32_fixupimmpd128(A, B, C, E) __builtin_ia32_fixupimmpd128(A, B, C, 1) +#define __builtin_ia32_fixupimmpd128_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256(A, B, C, E) __builtin_ia32_fixupimmpd256(A, B, C, 1) +#define __builtin_ia32_fixupimmpd256_mask(A, B, C, F, E) __builtin_ia32_fixupimmpd256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmpd256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmpd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128(A, B, C, E) __builtin_ia32_fixupimmps128(A, B, C, 1) +#define __builtin_ia32_fixupimmps128_mask(A, B, C, F, E) __builtin_ia32_fixupimmps128_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps128_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps128_maskz(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256(A, B, C, E) __builtin_ia32_fixupimmps256(A, B, C, 1) +#define __builtin_ia32_fixupimmps256_mask(A, B, C, F, E) __builtin_ia32_fixupimmps256_mask(A, B, C, 1, E) +#define __builtin_ia32_fixupimmps256_maskz(A, B, C, F, E) __builtin_ia32_fixupimmps256_maskz(A, B, C, 1, E) +#define __builtin_ia32_fpclasspd128_mask(A, D, C) __builtin_ia32_fpclasspd128_mask(A, 1, C) +#define __builtin_ia32_fpclasspd256_mask(A, D, C) __builtin_ia32_fpclasspd256_mask(A, 1, C) +#define __builtin_ia32_fpclasspd512_mask(A, D, C) __builtin_ia32_fpclasspd512_mask(A, 1, C) +#define __builtin_ia32_fpclassps128_mask(A, D, C) __builtin_ia32_fpclassps128_mask(A, 1, C) +#define __builtin_ia32_fpclassps256_mask(A, D, C) __builtin_ia32_fpclassps256_mask(A, 1, C) +#define __builtin_ia32_fpclassps512_mask(A, D, C) __builtin_ia32_fpclassps512_mask(A, 1, C) +#define __builtin_ia32_fpclasssd(A, D) __builtin_ia32_fpclasssd(A, 1) +#define __builtin_ia32_fpclassss(A, D) __builtin_ia32_fpclassss(A, 1) +#define __builtin_ia32_gather3div2df(A, B, C, D, F) __builtin_ia32_gather3div2df(A, B, C, D, 1) +#define __builtin_ia32_gather3div2di(A, B, C, D, F) __builtin_ia32_gather3div2di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4df(A, B, C, D, F) __builtin_ia32_gather3div4df(A, B, C, D, 1) +#define __builtin_ia32_gather3div4di(A, B, C, D, F) __builtin_ia32_gather3div4di(A, B, C, D, 1) +#define __builtin_ia32_gather3div4sf(A, B, C, D, F) __builtin_ia32_gather3div4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div4si(A, B, C, D, F) __builtin_ia32_gather3div4si(A, B, C, D, 1) +#define __builtin_ia32_gather3div8sf(A, B, C, D, F) __builtin_ia32_gather3div8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3div8si(A, B, C, D, F) __builtin_ia32_gather3div8si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2df(A, B, C, D, F) __builtin_ia32_gather3siv2df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv2di(A, B, C, D, F) __builtin_ia32_gather3siv2di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4df(A, B, C, D, F) __builtin_ia32_gather3siv4df(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4di(A, B, C, D, F) __builtin_ia32_gather3siv4di(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4sf(A, B, C, D, F) __builtin_ia32_gather3siv4sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv4si(A, B, C, D, F) __builtin_ia32_gather3siv4si(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8sf(A, B, C, D, F) __builtin_ia32_gather3siv8sf(A, B, C, D, 1) +#define __builtin_ia32_gather3siv8si(A, B, C, D, F) __builtin_ia32_gather3siv8si(A, B, C, D, 1) +#define __builtin_ia32_getmantpd128_mask(A, E, C, D) __builtin_ia32_getmantpd128_mask(A, 1, C, D) +#define __builtin_ia32_getmantpd256_mask(A, E, C, D) __builtin_ia32_getmantpd256_mask(A, 1, C, D) +#define __builtin_ia32_getmantps128_mask(A, E, C, D) __builtin_ia32_getmantps128_mask(A, 1, C, D) +#define __builtin_ia32_getmantps256_mask(A, E, C, D) __builtin_ia32_getmantps256_mask(A, 1, C, D) +#define __builtin_ia32_insertf32x4_256_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf32x8_mask(A, B, F, D, E) __builtin_ia32_insertf32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_256_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_insertf64x2_512_mask(A, B, F, D, E) __builtin_ia32_insertf64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x4_256_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti32x8_mask(A, B, F, D, E) __builtin_ia32_inserti32x8_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_256_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_inserti64x2_512_mask(A, B, F, D, E) __builtin_ia32_inserti64x2_512_mask(A, B, 1, D, E) +#define __builtin_ia32_palignr128_mask(A, B, F, D, E) __builtin_ia32_palignr128_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr256_mask(A, B, F, D, E) __builtin_ia32_palignr256_mask(A, B, 8, D, E) +#define __builtin_ia32_palignr512(A, B, D) __builtin_ia32_palignr512(A, B, 8) +#define __builtin_ia32_palignr512_mask(A, B, F, D, E) __builtin_ia32_palignr512_mask(A, B, 8, D, E) +#define __builtin_ia32_permdf256_mask(A, E, C, D) __builtin_ia32_permdf256_mask(A, 1, C, D) +#define __builtin_ia32_permdi256_mask(A, E, C, D) __builtin_ia32_permdi256_mask(A, 1, C, D) +#define __builtin_ia32_prold128_mask(A, E, C, D) __builtin_ia32_prold128_mask(A, 1, C, D) +#define __builtin_ia32_prold256_mask(A, E, C, D) __builtin_ia32_prold256_mask(A, 1, C, D) +#define __builtin_ia32_prolq128_mask(A, E, C, D) __builtin_ia32_prolq128_mask(A, 1, C, D) +#define __builtin_ia32_prolq256_mask(A, E, C, D) __builtin_ia32_prolq256_mask(A, 1, C, D) +#define __builtin_ia32_prord128_mask(A, E, C, D) __builtin_ia32_prord128_mask(A, 1, C, D) +#define __builtin_ia32_prord256_mask(A, E, C, D) __builtin_ia32_prord256_mask(A, 1, C, D) +#define __builtin_ia32_prorq128_mask(A, E, C, D) __builtin_ia32_prorq128_mask(A, 1, C, D) +#define __builtin_ia32_prorq256_mask(A, E, C, D) __builtin_ia32_prorq256_mask(A, 1, C, D) +#define __builtin_ia32_pshufd128_mask(A, E, C, D) __builtin_ia32_pshufd128_mask(A, 1, C, D) +#define __builtin_ia32_pshufd256_mask(A, E, C, D) __builtin_ia32_pshufd256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw128_mask(A, E, C, D) __builtin_ia32_pshufhw128_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw256_mask(A, E, C, D) __builtin_ia32_pshufhw256_mask(A, 1, C, D) +#define __builtin_ia32_pshufhw512_mask(A, E, C, D) __builtin_ia32_pshufhw512_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw128_mask(A, E, C, D) __builtin_ia32_pshuflw128_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw256_mask(A, E, C, D) __builtin_ia32_pshuflw256_mask(A, 1, C, D) +#define __builtin_ia32_pshuflw512_mask(A, E, C, D) __builtin_ia32_pshuflw512_mask(A, 1, C, D) +#define __builtin_ia32_pslldi128_mask(A, E, C, D) __builtin_ia32_pslldi128_mask(A, 1, C, D) +#define __builtin_ia32_pslldi256_mask(A, E, C, D) __builtin_ia32_pslldi256_mask(A, 1, C, D) +#define __builtin_ia32_psllqi128_mask(A, E, C, D) __builtin_ia32_psllqi128_mask(A, 1, C, D) +#define __builtin_ia32_psllqi256_mask(A, E, C, D) __builtin_ia32_psllqi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi128_mask(A, E, C, D) __builtin_ia32_psllwi128_mask(A, 1, C, D) +#define __builtin_ia32_psllwi256_mask(A, E, C, D) __builtin_ia32_psllwi256_mask(A, 1, C, D) +#define __builtin_ia32_psllwi512_mask(A, E, C, D) __builtin_ia32_psllwi512_mask(A, 1, C, D) +#define __builtin_ia32_psradi128_mask(A, E, C, D) __builtin_ia32_psradi128_mask(A, 1, C, D) +#define __builtin_ia32_psradi256_mask(A, E, C, D) __builtin_ia32_psradi256_mask(A, 1, C, D) +#define __builtin_ia32_psraqi128_mask(A, E, C, D) __builtin_ia32_psraqi128_mask(A, 1, C, D) +#define __builtin_ia32_psraqi256_mask(A, E, C, D) __builtin_ia32_psraqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi128_mask(A, E, C, D) __builtin_ia32_psrawi128_mask(A, 1, C, D) +#define __builtin_ia32_psrawi256_mask(A, E, C, D) __builtin_ia32_psrawi256_mask(A, 1, C, D) +#define __builtin_ia32_psrawi512_mask(A, E, C, D) __builtin_ia32_psrawi512_mask(A, 1, C, D) +#define __builtin_ia32_psrldi128_mask(A, E, C, D) __builtin_ia32_psrldi128_mask(A, 1, C, D) +#define __builtin_ia32_psrldi256_mask(A, E, C, D) __builtin_ia32_psrldi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi128_mask(A, E, C, D) __builtin_ia32_psrlqi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlqi256_mask(A, E, C, D) __builtin_ia32_psrlqi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi128_mask(A, E, C, D) __builtin_ia32_psrlwi128_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi256_mask(A, E, C, D) __builtin_ia32_psrlwi256_mask(A, 1, C, D) +#define __builtin_ia32_psrlwi512_mask(A, E, C, D) __builtin_ia32_psrlwi512_mask(A, 1, C, D) +#define __builtin_ia32_pternlogd128_mask(A, B, C, F, E) __builtin_ia32_pternlogd128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd128_maskz(A, B, C, F, E) __builtin_ia32_pternlogd128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_mask(A, B, C, F, E) __builtin_ia32_pternlogd256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogd256_maskz(A, B, C, F, E) __builtin_ia32_pternlogd256_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_mask(A, B, C, F, E) __builtin_ia32_pternlogq128_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq128_maskz(A, B, C, F, E) __builtin_ia32_pternlogq128_maskz(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_mask(A, B, C, F, E) __builtin_ia32_pternlogq256_mask(A, B, C, 1, E) +#define __builtin_ia32_pternlogq256_maskz(A, B, C, F, E) __builtin_ia32_pternlogq256_maskz(A, B, C, 1, E) +#define __builtin_ia32_rangepd128_mask(A, B, F, D, E) __builtin_ia32_rangepd128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd256_mask(A, B, F, D, E) __builtin_ia32_rangepd256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangepd512_mask(A, B, I, D, E, F) __builtin_ia32_rangepd512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangeps128_mask(A, B, F, D, E) __builtin_ia32_rangeps128_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps256_mask(A, B, F, D, E) __builtin_ia32_rangeps256_mask(A, B, 1, D, E) +#define __builtin_ia32_rangeps512_mask(A, B, I, D, E, F) __builtin_ia32_rangeps512_mask(A, B, 1, D, E, 8) +#define __builtin_ia32_rangesd128_round(A, B, I, F) __builtin_ia32_rangesd128_round(A, B, 1, 8) +#define __builtin_ia32_rangess128_round(A, B, I, F) __builtin_ia32_rangess128_round(A, B, 1, 8) +#define __builtin_ia32_reducepd128_mask(A, E, C, D) __builtin_ia32_reducepd128_mask(A, 1, C, D) +#define __builtin_ia32_reducepd256_mask(A, E, C, D) __builtin_ia32_reducepd256_mask(A, 1, C, D) +#define __builtin_ia32_reducepd512_mask(A, E, C, D) __builtin_ia32_reducepd512_mask(A, 1, C, D) +#define __builtin_ia32_reduceps128_mask(A, E, C, D) __builtin_ia32_reduceps128_mask(A, 1, C, D) +#define __builtin_ia32_reduceps256_mask(A, E, C, D) __builtin_ia32_reduceps256_mask(A, 1, C, D) +#define __builtin_ia32_reduceps512_mask(A, E, C, D) __builtin_ia32_reduceps512_mask(A, 1, C, D) +#define __builtin_ia32_reducesd(A, B, F) __builtin_ia32_reducesd(A, B, 1) +#define __builtin_ia32_reducess(A, B, F) __builtin_ia32_reducess(A, B, 1) +#define __builtin_ia32_rndscalepd_128_mask(A, E, C, D) __builtin_ia32_rndscalepd_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscalepd_256_mask(A, E, C, D) __builtin_ia32_rndscalepd_256_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_128_mask(A, E, C, D) __builtin_ia32_rndscaleps_128_mask(A, 1, C, D) +#define __builtin_ia32_rndscaleps_256_mask(A, E, C, D) __builtin_ia32_rndscaleps_256_mask(A, 1, C, D) +#define __builtin_ia32_scatterdiv2df(A, B, C, D, F) __builtin_ia32_scatterdiv2df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv2di(A, B, C, D, F) __builtin_ia32_scatterdiv2di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4df(A, B, C, D, F) __builtin_ia32_scatterdiv4df(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4di(A, B, C, D, F) __builtin_ia32_scatterdiv4di(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4sf(A, B, C, D, F) __builtin_ia32_scatterdiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv4si(A, B, C, D, F) __builtin_ia32_scatterdiv4si(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8sf(A, B, C, D, F) __builtin_ia32_scatterdiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scatterdiv8si(A, B, C, D, F) __builtin_ia32_scatterdiv8si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2df(A, B, C, D, F) __builtin_ia32_scattersiv2df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv2di(A, B, C, D, F) __builtin_ia32_scattersiv2di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4df(A, B, C, D, F) __builtin_ia32_scattersiv4df(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4di(A, B, C, D, F) __builtin_ia32_scattersiv4di(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4sf(A, B, C, D, F) __builtin_ia32_scattersiv4sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv4si(A, B, C, D, F) __builtin_ia32_scattersiv4si(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8sf(A, B, C, D, F) __builtin_ia32_scattersiv8sf(A, B, C, D, 1) +#define __builtin_ia32_scattersiv8si(A, B, C, D, F) __builtin_ia32_scattersiv8si(A, B, C, D, 1) +#define __builtin_ia32_shuf_f32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_f64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i32x4_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shuf_i64x2_256_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd128_mask(A, B, F, D, E) __builtin_ia32_shufpd128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufpd256_mask(A, B, F, D, E) __builtin_ia32_shufpd256_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps128_mask(A, B, F, D, E) __builtin_ia32_shufps128_mask(A, B, 1, D, E) +#define __builtin_ia32_shufps256_mask(A, B, F, D, E) __builtin_ia32_shufps256_mask(A, B, 1, D, E) +#define __builtin_ia32_ucmpb128_mask(A, B, E, D) __builtin_ia32_ucmpb128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb256_mask(A, B, E, D) __builtin_ia32_ucmpb256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpb512_mask(A, B, E, D) __builtin_ia32_ucmpb512_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd128_mask(A, B, E, D) __builtin_ia32_ucmpd128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpd256_mask(A, B, E, D) __builtin_ia32_ucmpd256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq128_mask(A, B, E, D) __builtin_ia32_ucmpq128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpq256_mask(A, B, E, D) __builtin_ia32_ucmpq256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw128_mask(A, B, E, D) __builtin_ia32_ucmpw128_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw256_mask(A, B, E, D) __builtin_ia32_ucmpw256_mask(A, B, 1, D) +#define __builtin_ia32_ucmpw512_mask(A, B, E, D) __builtin_ia32_ucmpw512_mask(A, B, 1, D) +#define __builtin_ia32_vcvtps2ph256_mask(A, E, C, D) __builtin_ia32_vcvtps2ph256_mask(A, 1, C, D) +#define __builtin_ia32_vcvtps2ph_mask(A, E, C, D) __builtin_ia32_vcvtps2ph_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd256_mask(A, E, C, D) __builtin_ia32_vpermilpd256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilpd_mask(A, E, C, D) __builtin_ia32_vpermilpd_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps256_mask(A, E, C, D) __builtin_ia32_vpermilps256_mask(A, 1, C, D) +#define __builtin_ia32_vpermilps_mask(A, E, C, D) __builtin_ia32_vpermilps_mask(A, 1, C, D) + +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl") #include <wmmintrin.h> #include <smmintrin.h> #include <mm3dnow.h> |