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path: root/gcc/config/aarch64/aarch64-simd.md
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2017-08-12Merged revisions r232323 through r251067 to the branchtr29124Edward Smith-Rowland
2017-07-20Merged revisions r232323 through r250392 to the branchEdward Smith-Rowland
2017-04-13Merged revisions through r246916 to the branchEdward Smith-Rowland
2016-10-12Merged from trunk to the branch.Edward Smith-Rowland
2016-08-24Merge trunk up through 239504 into the branch.Edward Smith-Rowland
2016-08-13Merged revisions r232323 through r239446 to the branchEdward Smith-Rowland
2016-07-22Merged revisions r232323 through r238652 to the branchEdward Smith-Rowland
2016-06-16Merged revisions r232323 through r237522 to the branchEdward Smith-Rowland
2016-06-03Merged revisions r232323 through r237074 to the branchEdward Smith-Rowland
2016-05-23Merged revisions r232323 through r236585 to the branchEdward Smith-Rowland
2016-03-01Merged r233676 through r233838 to the branchEdward Smith-Rowland
2016-02-18Merging r232742 through r233528...Edward Smith-Rowland
2016-01-13Merge from trunk.Edward Smith-Rowland
2015-12-16[AArch64] PR target/68696 FAIL: gcc.target/aarch64/vbslq_u64_1.c scan-assembl...Kyrylo Tkachov
2015-12-03Add an rsqrt_optab and IFN_RSQRT internal functionRichard Sandiford
2015-12-022015-12-02 David Sherwood <david.sherwood@arm.com>David Sherwood
2015-11-26[AArch64] Add sqrdmah, sqrdmsh instructions.Matthew Wahab
2015-11-252015-11-24 Michael Collison <michael.collison@linaro.org>Michael Collison
2015-11-22[AARCH64][PATCH 2/3] Implementing vmulx_lane NEON intrinsic variantsBilyan Borisov
2015-11-06[AArch64] Fix vqtb[lx][234] on big-endianChristophe Lyon
2015-11-062015-11-06 Benedikt Huber <benedikt.huber@theobroma-systems.com>Benedikt Huber
2015-11-03[AARCH64][PATCH 1/3] Implementing the variants of the vmulx_ NEON intrinsicBilyan Borisov
2015-10-20[AArch64] Add support for 64-bit vector-mode ldp/stpKyrylo Tkachov
2015-10-20[AArch64][1/2] Add fmul-by-power-of-2+fcvt optimisationKyrylo Tkachov
2015-10-12[AArch64_be] Fix vtbl[34] and vtbx4Christophe Lyon
2015-10-02[Patch AArch64] Improve SIMD concatenation with zeroesJames Greenhalgh
2015-09-29add separate insn sched class for vector LDP & STPEvandro Menezes
2015-09-23[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.James Greenhalgh
2015-09-15[AArch64 array_mode 7/8] Combine the expanders using VSTRUCT:nregsAlan Lawrence
2015-09-15[AArch64 array_mode 6/8] Remove V_TWO_ELEM, again using BLKmode + set_mem_size.Alan Lawrence
2015-09-15[AArch64 array_mode 5/8] Remove V_FOUR_ELEM, again using BLKmode + set_mem_size.Alan Lawrence
2015-09-15[AArch64 array_mode 3/8] Stop using EImode in aarch64-simd.md and iterators.mdAlan Lawrence
2015-09-15[AArch64 array_mode 2/8] Remove VSTRUCT_DREG, use BLKmode for d-reg aarch64_s...Alan Lawrence
2015-09-15[AArch64 array_mode 1/8] Rename vec_store_lanes<mode>_lane to aarch64_vec_sto...Alan Lawrence
2015-09-08[AArch64] Add vcvt(_high)?_f32_f16 intrinsics, with BE RTL fixAlan Lawrence
2015-09-08[AArch64] Improve code generation for float16 vector codeAlan Lawrence
2015-09-08[AArch64] Implement vcvt_{,high_}f16_f32Alan Lawrence
2015-09-08[AArch64] Add support for float16x{4,8}_t vectors/builtinsAlan Lawrence
2015-09-02[AArch64_be] Fix vldX/vstX AdvSIMD intrinsics.Christophe Lyon
2015-07-30gcc/David Sherwood
2015-07-222015-07-22 Charles Baylis <charles.baylis@linaro.org>Charles Baylis
2015-07-22gcc/ChangeLog:Charles Baylis
2015-05-08[AArch64] Add vcond(u?)didi patternAlan Lawrence
2015-04-30[PATCH][AARCH64]Define vec_shr as an unspec, use shl for big-endian.Renlin Li
2015-04-29[AArch64] Fix PR/65770 vstN_lane on bigendianAlan Lawrence
2015-01-28[Patch AArch64] Make integer vabs intrinsics UNSPECsJames Greenhalgh
2015-01-21gcc/David Sherwood
2015-01-21gcc/Richard Sandiford
2015-01-19[AArch64] PR 64448: Combine ((x ^ y) & m) ^ x into bsl/bif instructionKyrylo Tkachov
2015-01-19 * config/aarch64/aarch64-simd.md (aarch64_<maxmin_uns>p<mode>): NewFei Yang
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