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path: root/target/arm/tcg/translate-a64.c
AgeCommit message (Expand)Author
2023-09-01target/arm: Implement the SETG* instructionsfeat-mopsPeter Maydell
2023-09-01target/arm: Implement the SET* instructionsPeter Maydell
2023-09-01target/arm/tcg: Pass unpriv bool to get_a64_user_mem_index()Peter Maydell
2023-08-31target/arm: Allow cpu to configure GM blocksizeRichard Henderson
2023-08-24target/arm: Use tcg_gen_negsetcond_*Richard Henderson
2023-07-31target/arm: Fix MemOp for STGPRichard Henderson
2023-07-25arm: spelling fixesMichael Tokarev
2023-07-08target/arm: Demultiplex AESE and AESMCRichard Henderson
2023-06-19target/arm: Convert load/store tags insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store single structure to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store (multiple structures) to decodetreePeter Maydell
2023-06-19target/arm: Convert LDAPR/STLR (imm) to decodetreePeter Maydell
2023-06-19target/arm: Convert load (pointer auth) insns to decodetreePeter Maydell
2023-06-19target/arm: Convert atomic memory ops to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR reg+reg to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR with 12-bit immediate to decodetreePeter Maydell
2023-06-19target/arm: Convert ld/st reg+imm9 insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store-pair to decodetreePeter Maydell
2023-06-19target/arm: Convert load reg (literal) group to decodetreePeter Maydell
2023-06-19target/arm: Convert LDXP, STXP, CASP, CAS to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store exclusive and ordered to decodetreePeter Maydell
2023-06-19target/arm: Convert exception generation instructions to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (immediate) to decodetreePeter Maydell
2023-06-19target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetreePeter Maydell
2023-06-19target/arm: Convert barrier insns to decodetreePeter Maydell
2023-06-19target/arm: Convert hint instruction space to decodetreePeter Maydell
2023-06-19target/arm: Consistently use finalize_memop_asimd() for ASIMD loads/storesPeter Maydell
2023-06-19target/arm: Pass memop to gen_mte_check1_mmuidx() in reg_imm9 decodePeter Maydell
2023-06-19target/arm: Return correct result for LDG when ATA=0Peter Maydell
2023-06-19target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomicsPeter Maydell
2023-06-06target/arm: Move mte check for store-exclusiveRichard Henderson
2023-06-06target/arm: Relax ordered/atomic alignment checks for LSE2Richard Henderson
2023-06-06target/arm: Add SCTLR.nAA to TBFLAG_A64Richard Henderson
2023-06-06target/arm: Check alignment in helper_mte_checkRichard Henderson
2023-06-06target/arm: Pass single_memop to gen_mte_checkNRichard Henderson
2023-06-06target/arm: Pass memop to gen_mte_check1*Richard Henderson
2023-06-06target/arm: Hoist finalize_memop out of do_fp_{ld, st}Richard Henderson
2023-06-06target/arm: Hoist finalize_memop out of do_gpr_{ld, st}Richard Henderson
2023-06-06target/arm: Load/store integer pair with one tcg operationRichard Henderson
2023-06-06target/arm: Sink gen_mte_check1 into load/store_exclusiveRichard Henderson
2023-06-06target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2GRichard Henderson
2023-06-06target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld}Richard Henderson
2023-06-06target/arm: Use tcg_gen_qemu_ld_i128 for LDXPRichard Henderson
2023-06-06target/arm: Introduce finalize_memop_{atom,pair}Richard Henderson
2023-06-05target/arm: Tidy helpers for translationRichard Henderson
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson
2023-06-05target/arm: Include helper-gen.h in translator.hRichard Henderson
2023-05-18target/arm: Convert ERET, ERETAA, ERETAB to decodetreePeter Maydell
2023-05-18target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetreePeter Maydell