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path: root/target/loongarch/cpu.h
AgeCommit message (Expand)Author
2024-05-09target/loongarch: Add TCG macro in structure CPUArchStateBibo Mao
2024-04-29hw/loongarch: Add init_cmdlineSong Gao
2024-04-26target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'Philippe Mathieu-Daudé
2024-02-03include/exec: Implement cpu_mmu_index genericallyRichard Henderson
2024-02-03target/loongarch: Rename MMU_IDX_*Richard Henderson
2024-02-03target/loongarch: Populate CPUClass.mmu_indexRichard Henderson
2024-01-11hw/loongarch/virt: Set iocsr address space per-board rather than percpuBibo Mao
2024-01-11target/loongarch: Implement kvm_arch_init_vcpuTianrui Zhao
2024-01-11target/loongarch: Implement kvm get/set registersTianrui Zhao
2024-01-11target/loongarch: Supplement vcpu env initial when vcpu resetTianrui Zhao
2024-01-05target/loongarch: Use generic cpu_list()Gavin Shan
2023-11-07target/loongarch: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
2023-11-07target: Unify QOM stylePhilippe Mathieu-Daudé
2023-11-03target/loongarch: Allow user enable/disable LSX/LASX featuresSong Gao
2023-10-13target/loongarch: fix ASXE flag conflictJiajie Chen
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson
2023-09-20target/loongarch: check_vec support check LASX instructionsSong Gao
2023-09-20target/loongarch: Add LASX data supportSong Gao
2023-08-24target/loongarch: cpu: Implement get_arch_id callbackBibo Mao
2023-08-24target/loongarch: Truncate high 32 bits of address in VA32 modeJiajie Chen
2023-08-24target/loongarch: Extract set_pc() helperJiajie Chen
2023-08-24target/loongarch: Add LA64 & VA32 to DisasContextJiajie Chen
2023-08-24target/loongarch: Add new object class for loongarch32 cpusJiajie Chen
2023-08-24target/loongarch: Add function to check current archJiajie Chen
2023-08-24target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPUPhilippe Mathieu-Daudé
2023-07-24target/loongarch: Fix the CSRRD CPUID instruction on big endian hostsThomas Huth
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson
2023-06-16hw/intc: Set physical cpuid route for LoongArch ipi deviceTianrui Zhao
2023-05-06target/loongarch: Implement LSX fpu arith instructionsSong Gao
2023-05-06target/loongarch: Add CHECK_SXE maccro for check LSX enableSong Gao
2023-05-06target/loongarch: Add LSX data type VRegSong Gao
2023-03-03target/loongarch: Implement Chip Configuraiton Version Register(0x0000)Song Gao
2023-02-27target/loongarch/cpu: Restrict "memory.h" header to sysemuPhilippe Mathieu-Daudé
2023-02-27target/loongarch/cpu: Remove unused "sysbus.h" headerBernhard Beschow
2022-12-16target/loongarch: Convert to 3-phase resetPeter Maydell
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang
2022-11-04target/loongarch: Fix emulation of float-point disable exceptionRui Wang
2022-11-04target/loongarch: Adjust the layout of hardware flags bit fieldsRui Wang
2022-11-04target/loongarch: Add exception subcodeSong Gao
2022-08-05target/loongarch: Fix macros SET_FPU_* in cpu.hQi Hu
2022-07-19hw/loongarch: Add fdt supportXiaojuan Yang
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao
2022-06-06hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang
2022-06-06target/loongarch: Add constant timer supportXiaojuan Yang
2022-06-06target/loongarch: Add LoongArch interrupt and exception handleXiaojuan Yang
2022-06-06target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang
2022-06-06target/loongarch: Add CSRs definitionXiaojuan Yang
2022-06-06target/loongarch: Add core definitionSong Gao