Merge patches from Mans Rullgard1.1.1-linaro-android

0001-Merge-narrowing-to-8-bit-into-8x8-IDCT.patch
0002-Merge-dequant-into-8x8-IDCT.patch
0003-Move-constant-tables-to-rodata-section.patch
0004-Remove-pointless-pld-instructions.patch
0005-optimise-yvup2bgr888_venum.patch
0006-optimise-yyvup2bgr888_venum.patch
0007-remove-unused-values-from-constant-table.patch

3 files changed, 193 insertions, 418 deletions

diff --git a/simd/jdcolor-armv7.s b/simd/jdcolor-armv7.s
index e106330..5c22b6c 100644
--- a/simd/jdcolor-armv7.s
+++ b/simd/jdcolor-armv7.s
@@ -133,9 +133,7 @@ yvup2rgb565_venum:
      * ------------------------------------------------------------------------ */
     STMFD SP!, {LR}
 
-    PLD [R0, R3]                       @ preload luma line
-
-    ADR   R12, constants
+    LDR   R12, =constants
 
     VLD1.S16  {D6, D7}, [R12]!         @ D6, D7: 359 |  -88 | -183 | 454 | 256 | 0 | 255 | 0
     VLD1.S32  {D30, D31}, [R12]        @ Q15   :  -45824    |    34816   |  -57984 |     X
@@ -381,9 +379,7 @@ yyvup2rgb565_venum:
      * ------------------------------------------------------------------------ */
     STMFD SP!, {LR}
 
-    PLD [R0, R3]                       @ preload luma line
-
-    ADR   R12, constants
+    LDR   R12, =constants
 
     VLD1.S16  {D6, D7}, [R12]!         @ D6, D7: 359 |  -88 | -183 | 454 | 256 | 0 | 255 | 0
     VLD1.S32  {D30, D31}, [R12]        @ Q15   :  -45824    |    34816   |  -57984 |     X
@@ -644,11 +640,6 @@ end_yyvup2rgb565:
 
                                        @ end of yyvup2rgb565
 
-constants:
-    .hword (COEFF_V_RED),  (COEFF_U_GREEN), (COEFF_V_GREEN), (COEFF_U_BLUE) @   359  | -88   |  -183  | 454
-    .hword (COEFF_Y),      (COEFF_0),       (COEFF_255)    , (COEFF_0)      @   256  |   0   |   255  |  0
-    .word  (COEFF_BIAS_R), (COEFF_BIAS_G),  (COEFF_BIAS_B)                  @ -45824 | 34816 | -57984 |  X
-
 /*--------------------------------------------------------------------------
 * FUNCTION     : yvup2bgr888_venum
 *--------------------------------------------------------------------------
@@ -696,43 +687,21 @@ constants:
 .type yvup2bgr888_venum, %function
 yvup2bgr888_venum:
 
-    /*-------------------------------------------------------------------------
-     *  Store stack registers
-     * ------------------------------------------------------------------------ */
-    STMFD SP!, {LR}
-
-    PLD [R0, R3]                      @ preload luma line
+    LDR   R12, =constants2
 
-    ADR   R12, constants
-
-    VLD1.S16  {D6, D7}, [R12]!        @ D6, D7: 359 | -88 | -183 | 454 | 256 | 0 | 255 | 0
-    VLD1.S32  {D30, D31}, [R12]       @ Q15   :  -45824   |    34816   |  -57984 |     X
+    VLD1.S32  {D0, D1}, [R12,:128]!   @ Q15   :  -45824   |    34816   |  -57984 | 256
+    VLD1.S16  {D6},     [R12,:64]     @ D6, D7: 359 | -88 | -183 | 454
 
     /*-------------------------------------------------------------------------
      *  Load the 5th parameter via stack
      *  R0 ~ R3 are used to pass the first 4 parameters, the 5th and above
      *  parameters are passed via stack
      * ------------------------------------------------------------------------ */
-    LDR R12, [SP, #4]                 @ LR is the only one that has been pushed
-                                      @ into stack, increment SP by 4 to
-                                      @ get the parameter.
-                                      @ LDMIB SP, {R12} is an equivalent
-                                      @ instruction in this case, where only
-                                      @ one register was pushed into stack.
-
-    /*-------------------------------------------------------------------------
-     *  Load clamping parameters to duplicate vector elements
-     * ------------------------------------------------------------------------ */
-    VDUP.S16  Q4,  D7[1]              @ Q4:  0  |  0  |  0  |  0  |  0  |  0  |  0  |  0
-    VDUP.S16  Q5,  D7[2]              @ Q5: 255 | 255 | 255 | 255 | 255 | 255 | 255 | 255
-
-    /*-------------------------------------------------------------------------
-     *  Read bias
-     * ------------------------------------------------------------------------ */
-    VDUP.S32  Q0,   D30[0]            @ Q0:  -45824 | -45824 | -45824 | -45824
-    VDUP.S32  Q1,   D30[1]            @ Q1:   34816 |  34816 |  34816 |  34816
-    VDUP.S32  Q2,   D31[0]            @ Q2:  -57984 | -57984 | -57984 | -57984
+    LDR R12, [SP]
 
+    VDUP.32    Q12, D0[0]
+    VDUP.32    Q13, D0[1]
+    VDUP.32    Q14, D1[0]
 
     /*-------------------------------------------------------------------------
      *  The main loop
@@ -746,106 +715,74 @@ loop_yvup2bgr888:
      *  D15  : U0  U1  U2  U3  U4  U5  U6  U7
      * ------------------------------------------------------------------------ */
     VLD1.U8  {D12},  [p_y]!           @ Load 8 Luma elements (uint8) to D12
-    VLD1.U8  {D14},  [p_cr]!          @ Load 8 Cr elements (uint8) to D14
-    VLD1.U8  {D15},  [p_cb]!          @ Load 8 Cb elements (uint8) to D15
-
-    /*-------------------------------------------------------------------------
-     *  Expand uint8 value to uint16
-     *  D18, D19: Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
-     *  D20, D21: V0 V1 V2 V3 V4 V5 V6 V7
-     *  D22, D23: U0 U1 U2 U3 U4 U5 U6 U7
-     * ------------------------------------------------------------------------ */
     VMOVL.U8 Q9,  D12
+    VLD1.U8  {D14},  [p_cr]!          @ Load 8 Cr elements (uint8) to D14
     VMOVL.U8 Q10, D14
+    VLD1.U8  {D15},  [p_cb]!          @ Load 8 Cb elements (uint8) to D15
     VMOVL.U8 Q11, D15
 
     /*-------------------------------------------------------------------------
      *  Multiply contribution from chrominance, results are in 32-bit
      * ------------------------------------------------------------------------ */
-    VMULL.S16  Q12, D20, D6[0]        @ Q12:  359*(V0,V1,V2,V3)     Red
-    VMULL.S16  Q13, D22, D6[1]        @ Q13:  -88*(U0,U1,U2,U3)     Green
+    VMLAL.S16  Q12, D20, D6[0]        @ Q12:  359*(V0,V1,V2,V3)     Red
+    VMLAL.S16  Q12, D18, D1[2]        @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
+    VMLAL.S16  Q13, D22, D6[1]        @ Q13:  -88*(U0,U1,U2,U3)     Green
     VMLAL.S16  Q13, D20, D6[2]        @ Q13:  -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
-    VMULL.S16  Q14, D22, D6[3]        @ Q14:  454*(U0,U1,U2,U3)     Blue
-
-    /*-------------------------------------------------------------------------
-     *  Add bias
-     * ------------------------------------------------------------------------ */
-    VADD.S32  Q12, Q0                 @ Q12 add Red   bias -45824
-    VADD.S32  Q13, Q1                 @ Q13 add Green bias  34816
-    VADD.S32  Q14, Q2                 @ Q14 add Blue  bias -57984
-
-    /*-------------------------------------------------------------------------
-     *  Calculate Red, Green, Blue
-     * ------------------------------------------------------------------------ */
-    VMLAL.S16  Q12, D18, D7[0]        @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
-    VMLAL.S16  Q13, D18, D7[0]        @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
-    VMLAL.S16  Q14, D18, D7[0]        @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
+    VMLAL.S16  Q13, D18, D1[2]        @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
+    VMLAL.S16  Q14, D22, D6[3]        @ Q14:  454*(U0,U1,U2,U3)     Blue
+    VMLAL.S16  Q14, D18, D1[2]        @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
 
     /*-------------------------------------------------------------------------
      *  Right shift eight bits with rounding
      * ------------------------------------------------------------------------ */
     VSHRN.S32   D18 , Q12, #8         @ D18: R0, R1, R2, R3 in 16-bit Q0 format
+    VDUP.32     Q12, D0[0]
     VSHRN.S32   D20 , Q13, #8         @ D20: G0, G1, G2, G3 in 16-bit Q0 format
+    VDUP.32     Q13, D0[1]
     VSHRN.S32   D22,  Q14, #8         @ D22: B0, B1, B2, B3 in 16-bit Q0 format
+    VDUP.32     Q14, D1[0]
 
     /*-------------------------------------------------------------------------
      *  Done with the first 4 elements, continue on the next 4 elements
      * ------------------------------------------------------------------------ */
-
     /*-------------------------------------------------------------------------
      *  Multiply contribution from chrominance, results are in 32-bit
      * ------------------------------------------------------------------------ */
-    VMULL.S16  Q12, D21, D6[0]        @ Q12:  359*(V0,V1,V2,V3)     Red
-    VMULL.S16  Q13, D23, D6[1]        @ Q13:  -88*(U0,U1,U2,U3)     Green
+    VMLAL.S16  Q12, D21, D6[0]        @ Q12:  359*(V0,V1,V2,V3)     Red
+    VMLAL.S16  Q12, D19, D1[2]        @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
+    VMLAL.S16  Q13, D23, D6[1]        @ Q13:  -88*(U0,U1,U2,U3)     Green
     VMLAL.S16  Q13, D21, D6[2]        @ Q13:  -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
-    VMULL.S16  Q14, D23, D6[3]        @ Q14:  454*(U0,U1,U2,U3)     Blue
-
-    /*-------------------------------------------------------------------------
-     *  Add bias
-     * ------------------------------------------------------------------------ */
-    VADD.S32  Q12, Q0                 @ Q12 add Red   bias -45824
-    VADD.S32  Q13, Q1                 @ Q13 add Green bias  34816
-    VADD.S32  Q14, Q2                 @ Q14 add Blue  bias -57984
-
-    /*-------------------------------------------------------------------------
-     *  Calculate Red, Green, Blue
-     * ------------------------------------------------------------------------ */
-    VMLAL.S16  Q12, D19, D7[0]        @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
-    VMLAL.S16  Q13, D19, D7[0]        @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
-    VMLAL.S16  Q14, D19, D7[0]        @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
+    VMLAL.S16  Q13, D19, D1[2]        @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
+    VMLAL.S16  Q14, D23, D6[3]        @ Q14:  454*(U0,U1,U2,U3)     Blue
+    VMLAL.S16  Q14, D19, D1[2]        @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
 
     /*-------------------------------------------------------------------------
      *  Right shift eight bits with rounding
      * ------------------------------------------------------------------------ */
     VSHRN.S32   D19 , Q12, #8         @ D18: R0, R1, R2, R3 in 16-bit Q0 format
+    VDUP.32     Q12, D0[0]
     VSHRN.S32   D21 , Q13, #8         @ D20: G0, G1, G2, G3 in 16-bit Q0 format
+    VDUP.32     Q13, D0[1]
     VSHRN.S32   D23,  Q14, #8         @ D22: B0, B1, B2, B3 in 16-bit Q0 format
+    VDUP.32     Q14, D1[0]
 
     /*-------------------------------------------------------------------------
      *  Clamp the value to be within [0~255]
      * ------------------------------------------------------------------------ */
-    VMAX.S16  Q11, Q11, Q4            @ if Q11 <   0, Q11 =   0
-    VMIN.S16  Q11, Q11, Q5            @ if Q11 > 255, Q11 = 255
-    VQMOVUN.S16   D28, Q11            @ store Blue to D28, narrow the value from int16 to int8
-
-    VMAX.S16  Q10, Q10, Q4            @ if Q10 <   0, Q10 =   0
-    VMIN.S16  Q10, Q10, Q5            @ if Q10 > 255, Q10 = 255
-    VQMOVUN.S16   D27, Q10            @ store Green to D27, narrow the value from int16 to int8
-
-    VMAX.S16    Q9, Q9, Q4            @ if Q9 <   0, Q9 =   0
-    VMIN.S16    Q9, Q9, Q5            @ if Q9 > 255, Q9 = 255
-    VQMOVUN.S16    D26, Q9            @ store Red to D26, narrow the value from int16 to int8.
+    VQMOVUN.S16   D18, Q9             @ store Red to D26, narrow the value from int16 to int8.
+    VQMOVUN.S16   D19, Q10            @ store Green to D27, narrow the value from int16 to int8
+    VQMOVUN.S16   D20, Q11            @ store Blue to D28, narrow the value from int16 to int8
 
     SUBS length, length, #8           @ check if the length is less than 8
 
     BMI  trailing_yvup2bgr888         @ jump to trailing processing if remaining length is less than 8
 
-    VST3.U8  {D26,D27,D28}, [p_bgr]!  @ vector store Red, Green, Blue to destination
+    VST3.U8  {D18-D20}, [p_bgr]!      @ vector store Red, Green, Blue to destination
                                       @ Blue at LSB
 
     BHI loop_yvup2bgr888              @ loop if more than 8 pixels left
 
-    BEQ  end_yvup2bgr888              @ done if exactly 8 pixel processed in the loop
+    BXEQ LR                           @ done if exactly 8 pixel processed in the loop
 
 
 trailing_yvup2bgr888:
@@ -858,34 +795,32 @@ trailing_yvup2bgr888:
      * ------------------------------------------------------------------------ */
     ADDS length, length, #7           @ there are 7 or less in the trailing part
 
-    VST3.U8 {D26[0], D27[0], D28[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
-    BEQ  end_yvup2bgr888                       @ done if 0 pixel left
+    VST3.U8 {D18[0], D19[0], D20[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
+    BXEQ LR                                    @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[1], D27[1], D28[1]}, [p_bgr]!  @ store one more pixel
-    BEQ  end_yvup2bgr888                        @ done if 0 pixel left
+    VST3.U8 {D18[1], D19[1], D20[1]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                                     @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[2], D27[2], D28[2]}, [p_bgr]!  @ store one more pixel
-    BEQ  end_yvup2bgr888                        @ done if 0 pixel left
+    VST3.U8 {D18[2], D19[2], D20[2]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                                     @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[3], D27[3], D28[3]}, [p_bgr]!  @ store one more pixel
-    BEQ  end_yvup2bgr888                        @ done if 0 pixel left
+    VST3.U8 {D18[3], D19[3], D20[3]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                                     @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[4], D27[4], D28[4]}, [p_bgr]!  @ store one more pixel
-    BEQ  end_yvup2bgr888                        @ done if 0 pixel left
+    VST3.U8 {D18[4], D19[4], D20[4]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                                     @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[5], D27[5], D28[5]}, [p_bgr]!  @ store one more pixel
-    BEQ  end_yvup2bgr888                        @ done if 0 pixel left
+    VST3.U8 {D18[5], D19[5], D20[5]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                                     @ done if 0 pixel left
 
     SUBS length, length, #1           @ update length counter
-    VST3.U8 {D26[6], D27[6], D28[6]}, [p_bgr]!  @ store one more pixel
-
-end_yvup2bgr888:
-    LDMFD SP!, {PC}
+    VST3.U8 {D18[6], D19[6], D20[6]}, [p_bgr]!  @ store one more pixel
+    BX   LR
 
                                       @ end of yvup2bgr888
 
@@ -936,43 +871,17 @@ end_yvup2bgr888:
 */
 .type yyvup2bgr888_venum, %function
 yyvup2bgr888_venum:
-    /*-------------------------------------------------------------------------
-     *  Store stack registers
-     * ------------------------------------------------------------------------ */
-    STMFD SP!, {LR}
-
-    PLD [R0, R3]                       @ preload luma line
+    LDR   R12, =constants2
 
-    ADR   R12, constants
-
-    VLD1.S16  {D6, D7}, [R12]!         @ D6, D7: 359 | -88 | -183 | 454 | 256 | 0 | 255 | 0
-    VLD1.S32  {D30, D31}, [R12]        @ Q15   :  -45824   |    34816   |  -57984 |     X
+    VLD1.S32  {D0, D1}, [R12,:128]!    @ Q15   :  -45824   |    34816   |  -57984 | 256
+    VLD1.S16  {D6},     [R12,:64]      @ D6, D7: 359 | -88 | -183 | 454
 
     /*-------------------------------------------------------------------------
      *  Load the 5th parameter via stack
      *  R0 ~ R3 are used to pass the first 4 parameters, the 5th and above
      *  parameters are passed via stack
      * ------------------------------------------------------------------------ */
-    LDR R12, [SP, #4]                  @ LR is the only one that has been pushed
-                                       @ into stack, increment SP by 4 to
-                                       @ get the parameter.
-                                       @ LDMIB SP, {R12} is an equivalent
-                                       @ instruction in this case, where only
-                                       @ one register was pushed into stack.
-
-    /*-------------------------------------------------------------------------
-     *  Load clamping parameters to duplicate vector elements
-     * ------------------------------------------------------------------------ */
-    VDUP.S16  Q4,  D7[1]               @ Q4:  0  |  0  |  0  |  0  |  0  |  0  |  0  |  0
-    VDUP.S16  Q5,  D7[2]               @ Q5: 255 | 255 | 255 | 255 | 255 | 255 | 255 | 255
-
-    /*-------------------------------------------------------------------------
-     *  Read bias
-     * ------------------------------------------------------------------------ */
-    VDUP.S32  Q0,   D30[0]             @ Q0:  -45824 | -45824 | -45824 | -45824
-    VDUP.S32  Q1,   D30[1]             @ Q1:   34816 |  34816 |  34816 |  34816
-    VDUP.S32  Q2,   D31[0]             @ Q2:  -70688 | -70688 | -70688 | -70688
-
+    LDR R12, [SP]
 
     /*-------------------------------------------------------------------------
      *  The main loop
@@ -985,166 +894,121 @@ loop_yyvup2bgr888:
      *  D14  : V0  V1  V2  V3  V4  V5  V6  V7
      *  D15  : U0  U1  U2  U3  U4  U5  U6  U7
      * ------------------------------------------------------------------------ */
-    VLD2.U8  {D12,D13}, [p_y]!         @ Load 16 Luma elements (uint8) to D12, D13
+    VLD2.U8  {D24,D26}, [p_y]!         @ Load 16 Luma elements (uint8) to D24,D26
     VLD1.U8  {D14},  [p_cr]!           @ Load 8 Cr elements (uint8) to D14
     VLD1.U8  {D15},  [p_cb]!           @ Load 8 Cb elements (uint8) to D15
 
-    /*-------------------------------------------------------------------------
-     *  Expand uint8 value to uint16
-     *  D24, D25: Y0 Y2 Y4 Y6 Y8 Y10 Y12 Y14
-     *  D26, D27: Y1 Y3 Y5 Y7 Y9 Y11 Y13 Y15
-     *  D28, D29: V0 V1 V2 V3 V4 V5  V6  V7
-     *  D30, D31: U0 U1 U2 U3 U4 U5  U6  U7
-     * ------------------------------------------------------------------------ */
-    VMOVL.U8 Q12, D12
-    VMOVL.U8 Q13, D13
+    VMOVL.U8 Q12, D24
+    VDUP.32  Q1,  D0[0]
+    VMOVL.U8 Q13, D26
+    VDUP.32  Q2,  D0[1]
     VMOVL.U8 Q14, D14
+    VDUP.32  Q8,  D1[0]
     VMOVL.U8 Q15, D15
 
     /*-------------------------------------------------------------------------
      *  Multiply contribution from chrominance, results are in 32-bit
      * ------------------------------------------------------------------------ */
-    VMULL.S16  Q6, D28, D6[0]          @ Q6:  359*(V0,V1,V2,V3)     Red
-    VMULL.S16  Q7, D30, D6[1]          @ Q7: -88*(U0,U1,U2,U3)     Green
-    VMLAL.S16  Q7, D28, D6[2]          @ q7: -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
-    VMULL.S16  Q8, D30, D6[3]          @ q8:  454*(U0,U1,U2,U3)     Blue
-
-    /*-------------------------------------------------------------------------
-     *  Add bias
-     * ------------------------------------------------------------------------ */
-    VADD.S32  Q6, Q0                   @ Q6 add Red   bias -45824
-    VADD.S32  Q7, Q1                   @ Q7 add Green bias  34816
-    VADD.S32  Q8, Q2                   @ Q8 add Blue  bias -57984
+    VMLAL.S16  Q1, D28, D6[0]          @ Q1:  359*(V0,V1,V2,V3)     Red
+    VMLAL.S16  Q2, D30, D6[1]          @ Q2: -88*(U0,U1,U2,U3)     Green
+    VMLAL.S16  Q2, D28, D6[2]          @ q7: -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
+    VMLAL.S16  Q8, D30, D6[3]          @ q8:  454*(U0,U1,U2,U3)     Blue
 
     /*-------------------------------------------------------------------------
      *  Calculate Red, Green, Blue
      * ------------------------------------------------------------------------ */
-    VMOV.S32   Q9, Q6
-    VMLAL.S16  Q6, D24, D7[0]          @ Q6: R0, R2, R4, R6 in 32-bit Q8 format
-    VMLAL.S16  Q9, D26, D7[0]          @ Q9: R1, R3, R5, R7 in 32-bit Q8 format
+    VMOV.S32   Q9, Q1
+    VMLAL.S16  Q1, D24, D1[2]          @ Q1: R0, R2, R4, R6 in 32-bit Q8 format
+    VMLAL.S16  Q9, D26, D1[2]          @ Q9: R1, R3, R5, R7 in 32-bit Q8 format
 
-    VMOV.S32   Q10, Q7
-    VMLAL.S16  Q7,  D24, D7[0]         @ Q7:  G0, G2, G4, G6 in 32-bit Q8 format
-    VMLAL.S16  Q10, D26, D7[0]         @ Q10: G1, G3, G5, G7 in 32-bit Q8 format
+    VMOV.S32   Q10, Q2
+    VMLAL.S16  Q2,  D24, D1[2]         @ Q2:  G0, G2, G4, G6 in 32-bit Q8 format
+    VMLAL.S16  Q10, D26, D1[2]         @ Q10: G1, G3, G5, G7 in 32-bit Q8 format
 
     VMOV.S32   Q11, Q8
-    VMLAL.S16  Q8,  D24, D7[0]         @ Q8:  B0, B2, B4, B6 in 32-bit Q8 format
-    VMLAL.S16  Q11, D26, D7[0]         @ Q11: B1, B3, B5, B7 in 32-bit Q8 format
+    VMLAL.S16  Q8,  D24, D1[2]         @ Q8:  B0, B2, B4, B6 in 32-bit Q8 format
+    VMLAL.S16  Q11, D26, D1[2]         @ Q11: B1, B3, B5, B7 in 32-bit Q8 format
 
     /*-------------------------------------------------------------------------
      *  Right shift eight bits with rounding
      * ------------------------------------------------------------------------ */
-    VSHRN.S32   D12, Q6,  #8           @ D12: R0 R2 R4 R6 in 16-bit Q0 format
-    VSHRN.S32   D13, Q9,  #8           @ D13: R1 R3 R5 R7 in 16-bit Q0 format
-    VZIP.16     D12, D13               @ Q6 : R0 R1 R2 R3 R4 R5 R6 R7
-
-    VSHRN.S32   D18, Q7,  #8           @ D18: G0 G2 G4 G6 in 16-bit Q0 format
+    VSHRN.S32   D2,  Q1,  #8           @ D12: R0 R2 R4 R6 in 16-bit Q0 format
+    VSHRN.S32   D3,  Q9,  #8           @ D13: R1 R3 R5 R7 in 16-bit Q0 format
+    VSHRN.S32   D18, Q2,  #8           @ D18: G0 G2 G4 G6 in 16-bit Q0 format
     VSHRN.S32   D19, Q10, #8           @ D19: G1 G3 G5 G7 in 16-bit Q0 format
-    VZIP.16     D18, D19               @ Q9 : G0 G1 G2 G3 G4 G5 G6 G7
-
+    VZIP.16     D2,  D3                @ Q1 : R0 R1 R2 R3 R4 R5 R6 R7
     VSHRN.S32   D20, Q8,  #8           @ D20: B0 B2 B4 B6 in 16-bit Q0 format
     VSHRN.S32   D21, Q11, #8           @ D21: B1 B3 B5 B7 in 16-bit Q0 format
+    VZIP.16     D18, D19               @ Q9 : G0 G1 G2 G3 G4 G5 G6 G7
+    VQMOVUN.S16 D22, Q1                @ store Red to D21, narrow the value from int16 to int8
     VZIP.16     D20, D21               @ Q10: B0 B1 B2 B3 B4 B5 B6 B7
-
-    /*-------------------------------------------------------------------------
-     *  Clamp the value to be within [0~255]
-     * ------------------------------------------------------------------------ */
-    VMAX.S16  Q10, Q10, Q4             @ if Q10 <   0, Q10 =   0
-    VMIN.S16  Q10, Q10, Q5             @ if Q10 > 255, Q10 = 255
-    VQMOVUN.S16   D23, Q10             @ store Blue to D23, narrow the value from int16 to int8
-
-    VMAX.S16  Q9, Q9, Q4               @ if Q9 <   0, Q9 =   0
-    VMIN.S16  Q9, Q9, Q5               @ if Q9 > 255, Q9 = 255
-    VQMOVUN.S16  D22, Q9               @ store Green to D22, narrow the value from int16 to int8
-
-    VMAX.S16  Q6, Q6, Q4               @ if Q6 <   0, Q6 =   0
-    VMIN.S16  Q6, Q6, Q5               @ if Q6 > 255, Q6 = 255
-    VQMOVUN.S16  D21, Q6               @ store Red to D21, narrow the value from int16 to int8
+    VQMOVUN.S16 D23, Q9                @ store Green to D22, narrow the value from int16 to int8
+    VDUP.32     Q1,  D0[0]
+    VQMOVUN.S16 D24, Q10               @ store Blue to D23, narrow the value from int16 to int8
 
     SUBS length, length, #8            @ check if the length is less than 8
 
     BMI  trailing_yyvup2bgr888         @ jump to trailing processing if remaining length is less than 8
 
-    VST3.U8  {D21,D22,D23}, [p_bgr]!   @ vector store Blue, Green, Red to destination
+    VST3.U8  {D22-D24}, [p_bgr]!       @ vector store Blue, Green, Red to destination
                                        @ Red at LSB
 
-    BEQ  end_yyvup2bgr888              @ done if exactly 8 pixel processed in the loop
+    BXEQ  LR                           @ done if exactly 8 pixel processed in the loop
 
     /*-------------------------------------------------------------------------
      *  Done with the first 8 elements, continue on the next 8 elements
      * ------------------------------------------------------------------------ */
-
     /*-------------------------------------------------------------------------
      *  Multiply contribution from chrominance, results are in 32-bit
      * ------------------------------------------------------------------------ */
-    VMULL.S16  Q6, D29, D6[0]          @ Q6: 359*(V4,V5,V6,V7)       Red
-    VMULL.S16  Q7, D31, D6[1]          @ Q7: -88*(U4,U5,U6,U7)      Green
-    VMLAL.S16  Q7, D29, D6[2]          @ Q7: -88*(U4,U5,U6,U7) - 183*(V4,V5,V6,V7)
-    VMULL.S16  Q8, D31, D6[3]          @ Q8: 454*(U4,U5,U6,U7)       Blue
-
-    /*-------------------------------------------------------------------------
-     *  Add bias
-     * ------------------------------------------------------------------------ */
-    VADD.S32  Q6, Q0                   @ Q6 add Red   bias -45824
-    VADD.S32  Q7, Q1                   @ Q7 add Green bias  34816
-    VADD.S32  Q8, Q2                   @ Q8 add Blue  bias -70688
+    VDUP.32    Q2, D0[1]
+    VMLAL.S16  Q1, D29, D6[0]          @ Q1: 359*(V4,V5,V6,V7)       Red
+    VDUP.32    Q8, D1[0]
+    VMLAL.S16  Q2, D31, D6[1]          @ Q2: -88*(U4,U5,U6,U7)      Green
+    VMLAL.S16  Q2, D29, D6[2]          @ Q2: -88*(U4,U5,U6,U7) - 183*(V4,V5,V6,V7)
+    VMLAL.S16  Q8, D31, D6[3]          @ Q8: 454*(U4,U5,U6,U7)       Blue
 
     /*-------------------------------------------------------------------------
      *  Calculate Red, Green, Blue
      * ------------------------------------------------------------------------ */
-    VMOV.S32   Q9, Q6
-    VMLAL.S16  Q6, D25, D7[0]          @ Q6: R8 R10 R12 R14 in 32-bit Q8 format
-    VMLAL.S16  Q9, D27, D7[0]          @ Q9: R9 R11 R13 R15 in 32-bit Q8 format
+    VMOV.S32   Q9, Q1
+    VMLAL.S16  Q1, D25, D1[2]          @ Q1: R8 R10 R12 R14 in 32-bit Q8 format
+    VMLAL.S16  Q9, D27, D1[2]          @ Q9: R9 R11 R13 R15 in 32-bit Q8 format
 
-    VMOV.S32   Q10, Q7
-    VMLAL.S16  Q7,  D25, D7[0]         @ Q7: G0, G2, G4, G6 in 32-bit Q8 format
-    VMLAL.S16  Q10, D27, D7[0]         @ Q10 : G1, G3, G5, G7 in 32-bit Q8 format
+    VMOV.S32   Q10, Q2
+    VMLAL.S16  Q2,  D25, D1[2]         @ Q2: G0, G2, G4, G6 in 32-bit Q8 format
+    VMLAL.S16  Q10, D27, D1[2]         @ Q10 : G1, G3, G5, G7 in 32-bit Q8 format
 
     VMOV.S32   Q11, Q8
-    VMLAL.S16  Q8,  D25, D7[0]         @ Q8: B0, B2, B4, B6 in 32-bit Q8 format
-    VMLAL.S16  Q11, D27, D7[0]         @ Q11 : B1, B3, B5, B7 in 32-bit Q8 format
+    VMLAL.S16  Q8,  D25, D1[2]         @ Q8: B0, B2, B4, B6 in 32-bit Q8 format
+    VMLAL.S16  Q11, D27, D1[2]         @ Q11 : B1, B3, B5, B7 in 32-bit Q8 format
 
     /*-------------------------------------------------------------------------
      *  Right shift eight bits with rounding
      * ------------------------------------------------------------------------ */
-    VSHRN.S32   D12, Q6,  #8           @ D12: R8 R10 R12 R14 in 16-bit Q0 format
-    VSHRN.S32   D13, Q9,  #8           @ D13: R9 R11 R13 R15 in 16-bit Q0 format
-    VZIP.16     D12, D13               @ Q6: R8 R9 R10 R11 R12 R13 R14 R15
-
-    VSHRN.S32   D18, Q7,  #8           @ D18: G8 G10 G12 G14 in 16-bit Q0 format
+    VSHRN.S32   D2,  Q1,  #8           @ D12: R8 R10 R12 R14 in 16-bit Q0 format
+    VSHRN.S32   D3,  Q9,  #8           @ D13: R9 R11 R13 R15 in 16-bit Q0 format
+    VSHRN.S32   D18, Q2,  #8           @ D18: G8 G10 G12 G14 in 16-bit Q0 format
     VSHRN.S32   D19, Q10, #8           @ D19: G9 G11 G13 G15 in 16-bit Q0 format
-    VZIP.16     D18, D19               @ Q9:  G8 G9 G10 G11 G12 G13 G14 G15
-
+    VZIP.16     D2,  D3                @ Q1: R8 R9 R10 R11 R12 R13 R14 R15
     VSHRN.S32   D20, Q8,  #8           @ D20: B8 B10 B12 B14 in 16-bit Q0 format
     VSHRN.S32   D21, Q11, #8           @ D21: B9 B11 B13 B15 in 16-bit Q0 format
+    VZIP.16     D18, D19               @ Q9:  G8 G9 G10 G11 G12 G13 G14 G15
+    VQMOVUN.S16 D22, Q1                @ store Red to D21, narrow the value from int16 to int8
     VZIP.16     D20, D21               @ Q10: B8 B9 B10 B11 B12 B13 B14 B15
-
-    /*-------------------------------------------------------------------------
-     *  Clamp the value to be within [0~255]
-     * ------------------------------------------------------------------------ */
-    VMAX.S16  Q10, Q10, Q4             @ if Q10 <   0, Q10 =   0
-    VMIN.S16  Q10, Q10, Q5             @ if Q10 > 255, Q10 = 255
-    VQMOVUN.S16   D23, Q10             @ store Blue to D23, narrow the value from int16 to int8
-
-    VMAX.S16  Q9, Q9, Q4               @ if Q9 <   0, Q9 =   0
-    VMIN.S16  Q9, Q9, Q5               @ if Q9 > 255, Q9 = 255
-    VQMOVUN.S16  D22, Q9               @ store Green to D22, narrow the value from int16 to int8
-
-    VMAX.S16  Q6, Q6, Q4               @ if Q6 <   0, Q6 =   0
-    VMIN.S16  Q6, Q6, Q5               @ if Q6 > 255, Q6 = 255
-    VQMOVUN.S16  D21, Q6               @ store Red to D21, narrow the value from int16 to int8
-
+    VQMOVUN.S16 D23, Q9                @ store Green to D22, narrow the value from int16 to int8
+    VQMOVUN.S16 D24, Q10               @ store Blue to D23, narrow the value from int16 to int8
 
     SUBS length, length, #8            @ check if the length is less than 8
 
     BMI  trailing_yyvup2bgr888         @ jump to trailing processing if remaining length is less than 8
 
-    VST3.U8  {D21,D22,D23}, [p_bgr]!   @ vector store Blue, Green, Red to destination
+    VST3.U8  {D22-D24}, [p_bgr]!       @ vector store Blue, Green, Red to destination
                                        @ Red at LSB
 
     BHI loop_yyvup2bgr888              @ loop if more than 8 pixels left
 
-    BEQ  end_yyvup2bgr888              @ done if exactly 8 pixel processed in the loop
+    BXEQ  LR                           @ done if exactly 8 pixel processed in the loop
 
 
 trailing_yyvup2bgr888:
@@ -1157,35 +1021,33 @@ trailing_yyvup2bgr888:
      * ------------------------------------------------------------------------ */
     ADDS length, length, #7            @ there are 7 or less in the trailing part
 
-    VST3.U8 {D21[0],D22[0],D23[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[0],D23[0],D24[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[1],D22[1],D23[1]}, [p_bgr]!  @ store one more pixel
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[1],D23[1],D24[1]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[2],D22[2],D23[2]}, [p_bgr]!  @ store one more pixel
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[2],D23[2],D24[2]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[3],D22[3],D23[3]}, [p_bgr]!  @ store one more pixel
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[3],D23[3],D24[3]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[4],D22[4],D23[4]}, [p_bgr]!  @ store one more pixel
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[4],D23[4],D24[4]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[5],D22[5],D23[5]}, [p_bgr]!  @ store one more pixel
-    BEQ end_yyvup2bgr888               @ done if 0 pixel left
+    VST3.U8 {D22[5],D23[5],D24[5]}, [p_bgr]!  @ store one more pixel
+    BXEQ LR                            @ done if 0 pixel left
 
     SUBS length, length, #1            @ update length counter
-    VST3.U8 {D21[6],D22[6],D23[6]}, [p_bgr]!  @ store one more pixel
-
-end_yyvup2bgr888:
-    LDMFD SP!, {PC}
+    VST3.U8 {D22[6],D23[6],D24[6]}, [p_bgr]!  @ store one more pixel
 
+    BX LR
                                        @ end of yyvup2bgr888
 
 /*--------------------------------------------------------------------------
@@ -1239,9 +1101,7 @@ yvup2abgr8888_venum:
      * ------------------------------------------------------------------------ */
     STMFD SP!, {LR}
 
-    PLD [R0, R3]                       @ preload luma line
-
-    ADR   R12, constants
+    LDR   R12, =constants
 
     VLD1.S16  {D6, D7}, [R12]!         @ D6, D7: 359 |  -88 | -183 | 454 | 256 | 0 | 255 | 0
     VLD1.S32  {D30, D31}, [R12]        @ Q15   :  -45824    |    34816   |  -57984 |     X
@@ -1482,9 +1342,7 @@ yyvup2abgr8888_venum:
      * ------------------------------------------------------------------------ */
     STMFD SP!, {LR}
 
-    PLD [R0, R3]                       @ preload luma line
-
-    ADR   R12, constants
+    LDR   R12, =constants
 
     VLD1.S16  {D6, D7}, [R12]!         @ D6, D7: 359 |  -88 | -183 | 454 | 256 | 0 | 255 | 0
     VLD1.S32  {D30, D31}, [R12]        @ Q15   :  -45824    |    34816   |  -57984 |     X
@@ -1738,4 +1596,16 @@ end_yyvup2abgr:
     LDMFD SP!, {PC}
                                        @ end of yyvup2abgr
 
+.section .rodata
+.align 4
+constants:
+    .hword (COEFF_V_RED),  (COEFF_U_GREEN), (COEFF_V_GREEN), (COEFF_U_BLUE) @   359  | -88   |  -183  | 454
+    .hword (COEFF_Y),      (COEFF_0),       (COEFF_255)    , (COEFF_0)      @   256  |   0   |   255  |  0
+    .word  (COEFF_BIAS_R), (COEFF_BIAS_G),  (COEFF_BIAS_B)                  @ -45824 | 34816 | -57984 |  X
+
+.align 4
+constants2:
+    .word  (COEFF_BIAS_R), (COEFF_BIAS_G),  (COEFF_BIAS_B) , (COEFF_Y)      @ -45824 | 34816 | -57984 | 256
+    .hword (COEFF_V_RED),  (COEFF_U_GREEN), (COEFF_V_GREEN), (COEFF_U_BLUE) @   359  | -88   |  -183  | 454
+
 .end
diff --git a/simd/jdidct-armv7.s b/simd/jdidct-armv7.s
index d61e219..921b0c4 100644
--- a/simd/jdidct-armv7.s
+++ b/simd/jdidct-armv7.s
@@ -126,27 +126,34 @@
         @==================================================================
         @ Load input input data from memory and shift
         @==================================================================
+        vld1.16   {q5-q6}, [r3]!
+        vshl.s16   q5,  q5,  #4
         vld1.16   {d16, d17},[r0]!     @q8 =row0
-        vqshl.s16  q8,  q8,  #4        @Input data too big?!!
-                                       @Maximum MPEG input is 2047/-2048.
+        vshl.s16   q6,  q6,  #4
+        vmul.s16   q8,  q8,  q5
         vld1.16   {d18, d19},[r0]!     @q9 =row1
-        vqshl.s16  q9,  q9,  #4        @Shift 1 instead of 4
-
+        vmul.s16   q9,  q9,  q6
+        vld1.16   {q5-q6}, [r3]!
+        vshl.s16   q5,  q5,  #4
         vld1.16   {d20, d21},[r0]!     @q10=row2
-        vqshl.s16  q10, q10, #4
-
+        vshl.s16   q6,  q6,  #4
+        vmul.s16   q10, q10, q5
         vld1.16   {d22, d23},[r0]!     @q11=row3
-        vqshl.s16  q11, q11, #4
-
+        vmul.s16   q11, q11, q6
+        vld1.16   {q5-q6}, [r3]!
+        vshl.s16   q5,  q5,  #4
         vld1.16   {d24, d25},[r0]!     @q12=row4
-        vqshl.s16  q12, q12, #4
-
+        vshl.s16   q6,  q6,  #4
+        vmul.s16   q12, q12, q5
         vld1.16   {d26, d27},[r0]!     @q13=row5
-        vqshl.s16  q13, q13, #4
+        vmul.s16   q13, q13, q6
+        vld1.16   {q5-q6}, [r3]!
+        vshl.s16   q5,  q5,  #4
         vld1.16   {d28, d29},[r0]!     @q14=row6
-        vqshl.s16  q14, q14, #4
+        vshl.s16   q6,  q6,  #4
+        vmul.s16   q14, q14, q5
         vld1.16   {d30, d31},[r0]!     @q15=row7
-        vqshl.s16  q15, q15, #4
+        vmul.s16   q15, q15, q6
 
         @==================================================================
         @ refresh the constants that was clobbered last time through IDCT1D
@@ -221,53 +228,39 @@
         @ 3. use multiple store. Each store will save one row of output.
         @    The st queue size is 4, so do no more than 4 str in sequence.
         @==================================================================
-        ldr       r5, =constants+5*16  @constants[5],
-        vld1.16   d10, [r5]            @load clamping parameters
-        vdup.s16  q6,  d10[0]          @q6=[0000000000000000]
-        vdup.s16  q7,  d10[1]          @q7=[FFFFFFFFFFFFFFFF]
-
-        @Save the results
-        vshr.s16  q8,  q8,  #6         @q8 = vy0
-        vmax.s16  q8,  q8,  q6         @clamp >0
-        vmin.s16  q8,  q8,  q7         @clamp <255
-
-        vshr.s16  q9,  q9,  #6         @q9 = vy1
-        vmax.s16  q9,  q9,  q6         @clamp >0
-        vmin.s16  q9,  q9,  q7         @clamp <255
-
-        vshr.s16  q10, q10, #6         @q10 = vy2
-        vmax.s16  q10, q10, q6         @clamp >0
-        vmin.s16  q10, q10, q7         @clamp <255
-
-        vshr.s16  q11, q11, #6         @q11 = vy3
-        vmax.s16  q11, q11, q6         @clamp >0
-        vmin.s16  q11, q11, q7         @clamp <255
-
-        vst1.16  {d16, d17},[r1],r2    @q8 =row0
-        vst1.16  {d18, d19},[r1],r2    @q9 =row1
-        vst1.16  {d20, d21},[r1],r2    @q10=row2
-        vst1.16  {d22, d23},[r1],r2    @q11=row3
-
-        vshr.s16  q12, q12, #6         @q12 = vy4
-        vmax.s16  q12, q12, q6         @clamp >0
-        vmin.s16  q12, q12, q7         @clamp <255
-
-        vshr.s16  q13, q13, #6         @q13 = vy5
-        vmax.s16  q13, q13, q6         @clamp >0
-        vmin.s16  q13, q13, q7         @clamp <255
-
-        vshr.s16  q14, q14, #6         @q14 = vy6
-        vmax.s16  q14, q14, q6         @clamp >0
-        vmin.s16  q14, q14, q7         @clamp <255
-
-        vshr.s16  q15, q15, #6         @q15 = vy7
-        vmax.s16  q15, q15, q6         @clamp >0
-        vmin.s16  q15, q15, q7         @clamp <255
-
-        vst1.16  {d24, d25},[r1],r2    @q12=row4
-        vst1.16  {d26, d27},[r1],r2    @q13=row5
-        vst1.16  {d28, d29},[r1],r2    @q14=row6
-        vst1.16  {d30, d31},[r1]       @q15=row7
+        vqshrun.s16 d16, q8,  #6
+        vqshrun.s16 d17, q9,  #6
+        vqshrun.s16 d18, q10, #6
+        vqshrun.s16 d19, q11, #6
+        vqshrun.s16 d20, q12, #6
+        vqshrun.s16 d21, q13, #6
+        vqshrun.s16 d22, q14, #6
+        vqshrun.s16 d23, q15, #6
+
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d16}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d17}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d18}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d19}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d20}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d21}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d22}, [r12]
+        ldr       r12, [r1], #4
+        add       r12, r12, r2
+        vst1.8    {d23}, [r12]
     .endm
 
     .macro BIG_BODY_TRANSPOSE_INPUT
diff --git a/simd/jsimd_arm_neon.c b/simd/jsimd_arm_neon.c
index 721e364..722dc62 100644
--- a/simd/jsimd_arm_neon.c
+++ b/simd/jsimd_arm_neon.c
@@ -41,7 +41,7 @@ typedef my_color_deconverter * my_cconvert_ptr;
 EXTERN (void) idct_1x1_venum (INT16 * coeffPtr, INT16 * samplePtr, INT32 stride);
 EXTERN (void) idct_2x2_venum (INT16 * coeffPtr, INT16 * samplePtr, INT32 stride);
 EXTERN (void) idct_4x4_venum (INT16 * coeffPtr, INT16 * samplePtr, INT32 stride);
-EXTERN (void) idct_8x8_venum (INT16 * coeffPtr, INT16 * samplePtr, INT32 stride);
+EXTERN (void) idct_8x8_venum (INT16 * coeffPtr, UINT8 **samplePtr, INT32 col, INT16 *qtab);
 
 /* Color conversion routines */
 EXTERN (void) yvup2rgb565_venum (UINT8 *pLumaLine,
@@ -450,54 +450,10 @@ jsimd_idct_islow (j_decompress_ptr cinfo, jpeg_component_info * compptr,
                 JCOEFPTR coef_block, JSAMPARRAY output_buf,
                 JDIMENSION output_col)
 {
-  ISLOW_MULT_TYPE * quantptr;
-  JCOEFPTR coefptr;
-  int ctr;
-
-  /* idct_out temp buffer is needed because output_buf sample allocation is 8 bits,
-   * while IDCT output expects 16 bits.
-   */
-  INT16 idct_out[DCTSIZE2];  /* buffers data between passes */
-  JSAMPROW outptr;
-  INT16*  idctptr;
-
-  coefptr  = coef_block;
-  quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
-
-  /* Dequantize the coeff buffer and write it back to the same location */
-  for (ctr = DCTSIZE; ctr > 0; ctr--) {
-    coefptr[0]         = DEQUANTIZE(coefptr[0]        , quantptr[0]        );
-    coefptr[DCTSIZE*1] = DEQUANTIZE(coefptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-    coefptr[DCTSIZE*2] = DEQUANTIZE(coefptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
-    coefptr[DCTSIZE*3] = DEQUANTIZE(coefptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-    coefptr[DCTSIZE*4] = DEQUANTIZE(coefptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
-    coefptr[DCTSIZE*5] = DEQUANTIZE(coefptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
-    coefptr[DCTSIZE*6] = DEQUANTIZE(coefptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-    coefptr[DCTSIZE*7] = DEQUANTIZE(coefptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
-    /* advance pointers to next column */
-    quantptr++;
-    coefptr++;
-  }
-
   idct_8x8_venum((INT16*)coef_block,
-                 (INT16*)idct_out,
-                 DCTSIZE * sizeof(INT16));
-
-  idctptr = idct_out;
-  for (ctr = 0; ctr < DCTSIZE; ctr++) {
-    outptr = output_buf[ctr] + output_col;
-    // outptr sample size is 1 byte while idctptr sample size is 2 bytes
-    outptr[0] = idctptr[0];
-    outptr[1] = idctptr[1];
-    outptr[2] = idctptr[2];
-    outptr[3] = idctptr[3];
-    outptr[4] = idctptr[4];
-    outptr[5] = idctptr[5];
-    outptr[6] = idctptr[6];
-    outptr[7] = idctptr[7];
-    idctptr  += DCTSIZE;      /* advance pointers to next row */
-  }
+                 output_buf,
+                 output_col,
+                 compptr->dct_table);
 }
 
 GLOBAL(void)
@@ -505,54 +461,10 @@ jsimd_idct_ifast (j_decompress_ptr cinfo, jpeg_component_info * compptr,
                 JCOEFPTR coef_block, JSAMPARRAY output_buf,
                 JDIMENSION output_col)
 {
-  ISLOW_MULT_TYPE * quantptr;
-  JCOEFPTR coefptr;
-  int ctr;
-
-  /* idct_out temp buffer is needed because output_buf sample allocation is 8 bits,
-   * while IDCT output expects 16 bits.
-   */
-  INT16 idct_out[DCTSIZE2];  /* buffers data between passes */
-  JSAMPROW outptr;
-  INT16*  idctptr;
-
-  coefptr  = coef_block;
-  quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
-
-  /* Dequantize the coeff buffer and write it back to the same location */
-  for (ctr = DCTSIZE; ctr > 0; ctr--) {
-    coefptr[0]         = DEQUANTIZE(coefptr[0]        , quantptr[0]        );
-    coefptr[DCTSIZE*1] = DEQUANTIZE(coefptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-    coefptr[DCTSIZE*2] = DEQUANTIZE(coefptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
-    coefptr[DCTSIZE*3] = DEQUANTIZE(coefptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-    coefptr[DCTSIZE*4] = DEQUANTIZE(coefptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
-    coefptr[DCTSIZE*5] = DEQUANTIZE(coefptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
-    coefptr[DCTSIZE*6] = DEQUANTIZE(coefptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-    coefptr[DCTSIZE*7] = DEQUANTIZE(coefptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
-    /* advance pointers to next column */
-    quantptr++;
-    coefptr++;
-  }
-
   idct_8x8_venum((INT16*)coef_block,
-                 (INT16*)idct_out,
-                 DCTSIZE * sizeof(INT16));
-
-  idctptr = idct_out;
-  for (ctr = 0; ctr < DCTSIZE; ctr++) {
-    outptr = output_buf[ctr] + output_col;
-    // outptr sample size is 1 byte while idctptr sample size is 2 bytes
-    outptr[0] = idctptr[0];
-    outptr[1] = idctptr[1];
-    outptr[2] = idctptr[2];
-    outptr[3] = idctptr[3];
-    outptr[4] = idctptr[4];
-    outptr[5] = idctptr[5];
-    outptr[6] = idctptr[6];
-    outptr[7] = idctptr[7];
-    idctptr  += DCTSIZE;      /* advance pointers to next row */
-  }
+                 output_buf,
+                 output_col,
+                 compptr->dct_table);
 }
 
 GLOBAL(void)