diff options
Diffstat (limited to 'hw/cadence_gem.c')
-rw-r--r-- | hw/cadence_gem.c | 40 |
1 files changed, 22 insertions, 18 deletions
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index 0c037a2..ab86c17 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -25,7 +25,7 @@ #include <zlib.h> /* For crc32 */ #include "sysbus.h" -#include "net.h" +#include "net/net.h" #include "net/checksum.h" #ifdef CADENCE_GEM_ERR_DEBUG @@ -389,10 +389,10 @@ static void gem_init_register_masks(GemState *s) */ static void phy_update_link(GemState *s) { - DB_PRINT("down %d\n", s->nic->nc.link_down); + DB_PRINT("down %d\n", qemu_get_queue(s->nic)->link_down); /* Autonegotiation status mirrors link status. */ - if (s->nic->nc.link_down) { + if (qemu_get_queue(s->nic)->link_down) { s->phy_regs[PHY_REG_STATUS] &= ~(PHY_REG_STATUS_ANEGCMPL | PHY_REG_STATUS_LINK); s->phy_regs[PHY_REG_INT_ST] |= PHY_REG_INT_ST_LINKC; @@ -409,7 +409,7 @@ static int gem_can_receive(NetClientState *nc) { GemState *s; - s = DO_UPCAST(NICState, nc, nc)->opaque; + s = qemu_get_nic_opaque(nc); DB_PRINT("\n"); @@ -612,7 +612,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) uint8_t rxbuf[2048]; uint8_t *rxbuf_ptr; - s = DO_UPCAST(NICState, nc, nc)->opaque; + s = qemu_get_nic_opaque(nc); /* Do nothing if receive is not enabled. */ if (!(s->regs[GEM_NWCTRL] & GEM_NWCTRL_RXENA)) { @@ -687,14 +687,15 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) packet_desc_addr = s->rx_desc_addr; while (1) { - DB_PRINT("read descriptor 0x%x\n", packet_desc_addr); + DB_PRINT("read descriptor 0x%x\n", (unsigned)packet_desc_addr); /* read current descriptor */ cpu_physical_memory_read(packet_desc_addr, (uint8_t *)&desc[0], sizeof(desc)); /* Descriptor owned by software ? */ if (rx_desc_get_ownership(desc) == 1) { - DB_PRINT("descriptor 0x%x owned by sw.\n", packet_desc_addr); + DB_PRINT("descriptor 0x%x owned by sw.\n", + (unsigned)packet_desc_addr); s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_NOBUF; /* Handle interrupt consequences */ gem_update_int_status(s); @@ -709,7 +710,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) */ if (rx_desc_get_buffer(desc) == 0) { DB_PRINT("Invalid RX buffer (NULL) for descriptor 0x%x\n", - packet_desc_addr); + (unsigned)packet_desc_addr); break; } @@ -749,7 +750,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) s->rx_desc_addr += 8; } - DB_PRINT("set SOF, OWN on descriptor 0x%08x\n", packet_desc_addr); + DB_PRINT("set SOF, OWN on descriptor 0x%08x\n", (unsigned)packet_desc_addr); /* Count it */ gem_receive_updatestats(s, buf, size); @@ -861,7 +862,8 @@ static void gem_transmit(GemState *s) */ if ((tx_desc_get_buffer(desc) == 0) || (tx_desc_get_length(desc) == 0)) { - DB_PRINT("Invalid TX descriptor @ 0x%x\n", packet_desc_addr); + DB_PRINT("Invalid TX descriptor @ 0x%x\n", + (unsigned)packet_desc_addr); break; } @@ -906,9 +908,10 @@ static void gem_transmit(GemState *s) /* Send the packet somewhere */ if (s->phy_loop) { - gem_receive(&s->nic->nc, tx_packet, total_bytes); + gem_receive(qemu_get_queue(s->nic), tx_packet, total_bytes); } else { - qemu_send_packet(&s->nic->nc, tx_packet, total_bytes); + qemu_send_packet(qemu_get_queue(s->nic), tx_packet, + total_bytes); } /* Prepare for next packet */ @@ -959,7 +962,7 @@ static void gem_phy_reset(GemState *s) static void gem_reset(DeviceState *d) { - GemState *s = FROM_SYSBUS(GemState, sysbus_from_qdev(d)); + GemState *s = FROM_SYSBUS(GemState, SYS_BUS_DEVICE(d)); DB_PRINT("\n"); @@ -1031,10 +1034,11 @@ static uint64_t gem_read(void *opaque, hwaddr offset, unsigned size) offset >>= 2; retval = s->regs[offset]; - DB_PRINT("offset: 0x%04x read: 0x%08x\n", offset*4, retval); + DB_PRINT("offset: 0x%04x read: 0x%08x\n", (unsigned)offset*4, retval); switch (offset) { case GEM_ISR: + DB_PRINT("lowering irq on ISR read\n"); qemu_set_irq(s->irq, 0); break; case GEM_PHYMNTNC: @@ -1073,7 +1077,7 @@ static void gem_write(void *opaque, hwaddr offset, uint64_t val, GemState *s = (GemState *)opaque; uint32_t readonly; - DB_PRINT("offset: 0x%04x write: 0x%08x ", offset, (unsigned)val); + DB_PRINT("offset: 0x%04x write: 0x%08x ", (unsigned)offset, (unsigned)val); offset >>= 2; /* Squash bits which are read only in write value */ @@ -1148,7 +1152,7 @@ static const MemoryRegionOps gem_ops = { static void gem_cleanup(NetClientState *nc) { - GemState *s = DO_UPCAST(NICState, nc, nc)->opaque; + GemState *s = qemu_get_nic_opaque(nc); DB_PRINT("\n"); s->nic = NULL; @@ -1157,7 +1161,7 @@ static void gem_cleanup(NetClientState *nc) static void gem_set_link(NetClientState *nc) { DB_PRINT("\n"); - phy_update_link(DO_UPCAST(NICState, nc, nc)->opaque); + phy_update_link(qemu_get_nic_opaque(nc)); } static NetClientInfo net_gem_info = { @@ -1218,7 +1222,7 @@ static void gem_class_init(ObjectClass *klass, void *data) dc->reset = gem_reset; } -static TypeInfo gem_info = { +static const TypeInfo gem_info = { .class_init = gem_class_init, .name = "cadence_gem", .parent = TYPE_SYS_BUS_DEVICE, |