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Diffstat (limited to 'hw/pl022.c')
-rw-r--r--hw/pl022.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/hw/pl022.c b/hw/pl022.c
index 60e35da..fbd7ded 100644
--- a/hw/pl022.c
+++ b/hw/pl022.c
@@ -130,7 +130,7 @@ static void pl022_xfer(pl022_state *s)
pl022_update(s);
}
-static uint64_t pl022_read(void *opaque, target_phys_addr_t offset,
+static uint64_t pl022_read(void *opaque, hwaddr offset,
unsigned size)
{
pl022_state *s = (pl022_state *)opaque;
@@ -168,12 +168,13 @@ static uint64_t pl022_read(void *opaque, target_phys_addr_t offset,
/* Not implemented. */
return 0;
default:
- hw_error("pl022_read: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl022_read: Bad offset %x\n", (int)offset);
return 0;
}
}
-static void pl022_write(void *opaque, target_phys_addr_t offset,
+static void pl022_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
pl022_state *s = (pl022_state *)opaque;
@@ -211,11 +212,12 @@ static void pl022_write(void *opaque, target_phys_addr_t offset,
break;
case 0x20: /* DMACR */
if (value) {
- hw_error("pl022: DMA not implemented\n");
+ qemu_log_mask(LOG_UNIMP, "pl022: DMA not implemented\n");
}
break;
default:
- hw_error("pl022_write: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl022_write: Bad offset %x\n", (int)offset);
}
}