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path: root/hw/usb/hcd-musb.c
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Diffstat (limited to 'hw/usb/hcd-musb.c')
-rw-r--r--hw/usb/hcd-musb.c31
1 files changed, 16 insertions, 15 deletions
diff --git a/hw/usb/hcd-musb.c b/hw/usb/hcd-musb.c
index e77e0b2..7856f53 100644
--- a/hw/usb/hcd-musb.c
+++ b/hw/usb/hcd-musb.c
@@ -608,7 +608,6 @@ static void musb_packet(MUSBState *s, MUSBEndPoint *ep,
{
USBDevice *dev;
USBEndpoint *uep;
- int ret;
int idx = epnum && dir;
int ttype;
@@ -628,19 +627,24 @@ static void musb_packet(MUSBState *s, MUSBEndPoint *ep,
dev = usb_find_device(&s->port, ep->faddr[idx]);
uep = usb_ep_get(dev, pid, ep->type[idx] & 0xf);
usb_packet_setup(&ep->packey[dir].p, pid, uep,
- (dev->addr << 16) | (uep->nr << 8) | pid);
+ (dev->addr << 16) | (uep->nr << 8) | pid, false, true);
usb_packet_addbuf(&ep->packey[dir].p, ep->buf[idx], len);
ep->packey[dir].ep = ep;
ep->packey[dir].dir = dir;
- ret = usb_handle_packet(dev, &ep->packey[dir].p);
+ usb_handle_packet(dev, &ep->packey[dir].p);
- if (ret == USB_RET_ASYNC) {
+ if (ep->packey[dir].p.status == USB_RET_ASYNC) {
+ usb_device_flush_ep_queue(dev, uep);
ep->status[dir] = len;
return;
}
- ep->status[dir] = ret;
+ if (ep->packey[dir].p.status == USB_RET_SUCCESS) {
+ ep->status[dir] = ep->packey[dir].p.actual_length;
+ } else {
+ ep->status[dir] = ep->packey[dir].p.status;
+ }
musb_schedule_cb(&s->port, &ep->packey[dir].p);
}
@@ -754,7 +758,6 @@ static void musb_rx_packet_complete(USBPacket *packey, void *opaque)
if (ep->status[1] == USB_RET_STALL) {
ep->status[1] = 0;
- packey->result = 0;
ep->csr[1] |= MGC_M_RXCSR_H_RXSTALL;
if (!epnum)
@@ -793,14 +796,12 @@ static void musb_rx_packet_complete(USBPacket *packey, void *opaque)
/* TODO: check len for over/underruns of an OUT packet? */
/* TODO: perhaps make use of e->ext_size[1] here. */
- packey->result = ep->status[1];
-
if (!(ep->csr[1] & (MGC_M_RXCSR_H_RXSTALL | MGC_M_RXCSR_DATAERROR))) {
ep->csr[1] |= MGC_M_RXCSR_FIFOFULL | MGC_M_RXCSR_RXPKTRDY;
if (!epnum)
ep->csr[0] |= MGC_M_CSR0_RXPKTRDY;
- ep->rxcount = packey->result; /* XXX: MIN(packey->len, ep->maxp[1]); */
+ ep->rxcount = ep->status[1]; /* XXX: MIN(packey->len, ep->maxp[1]); */
/* In DMA mode: assert DMA request for this EP */
}
@@ -1237,7 +1238,7 @@ static void musb_ep_writeh(void *opaque, int ep, int addr, uint16_t value)
}
/* Generic control */
-static uint32_t musb_readb(void *opaque, target_phys_addr_t addr)
+static uint32_t musb_readb(void *opaque, hwaddr addr)
{
MUSBState *s = (MUSBState *) opaque;
int ep, i;
@@ -1309,7 +1310,7 @@ static uint32_t musb_readb(void *opaque, target_phys_addr_t addr)
};
}
-static void musb_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void musb_writeb(void *opaque, hwaddr addr, uint32_t value)
{
MUSBState *s = (MUSBState *) opaque;
int ep;
@@ -1403,7 +1404,7 @@ static void musb_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
};
}
-static uint32_t musb_readh(void *opaque, target_phys_addr_t addr)
+static uint32_t musb_readh(void *opaque, hwaddr addr)
{
MUSBState *s = (MUSBState *) opaque;
int ep, i;
@@ -1457,7 +1458,7 @@ static uint32_t musb_readh(void *opaque, target_phys_addr_t addr)
};
}
-static void musb_writeh(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void musb_writeh(void *opaque, hwaddr addr, uint32_t value)
{
MUSBState *s = (MUSBState *) opaque;
int ep;
@@ -1513,7 +1514,7 @@ static void musb_writeh(void *opaque, target_phys_addr_t addr, uint32_t value)
};
}
-static uint32_t musb_readw(void *opaque, target_phys_addr_t addr)
+static uint32_t musb_readw(void *opaque, hwaddr addr)
{
MUSBState *s = (MUSBState *) opaque;
int ep;
@@ -1531,7 +1532,7 @@ static uint32_t musb_readw(void *opaque, target_phys_addr_t addr)
};
}
-static void musb_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void musb_writew(void *opaque, hwaddr addr, uint32_t value)
{
MUSBState *s = (MUSBState *) opaque;
int ep;