ci/llvm-monorepo.git - [no description]

Branch	Commit message	Author	Age
linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig	[SelectionDAG] Update check in createOperands to reflect max() is a valid value.	Florian Hahn	5 years
linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig	[InstCombine]Avoid introduction of unaligned mem access	Serguei Katkov	5 years
linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig	[elfabi] Add support for reading DT_SONAME from binaries	Armando Montanez	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig	Fix build breakage from llvm r351317	Pavel Labath	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig	correct script name in generated tests	Eric Fiselier	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig	Set '-target' flag in the test checking the MacOS include dir	Ilya Biryukov	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig	[InstCombine]Avoid introduction of unaligned mem access	Serguei Katkov	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig	[X86] Regenerate test	Simon Pilgrim	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig	[SEH] Pass the frame pointer from SEH finally to finally functions	Sanjin Sijaric	5 years
linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig	[NewPM][TSan] Reiterate the TSan port	Philip Pfaffe	5 years
[...]


Age	Commit message	Author
2018-09-28	[llvm-mca] Remove redundant namespace prefixes. NFClinaro-local/ci/llvm-kernel-armv8l-tested linaro-local/ci/llvm-kernel-armv8l-good linaro-local/ci/llvm-kernel-aarch64-tested linaro-local/ci/llvm-kernel-aarch64-good	Andrea Di Biagio
2018-09-28	[X86][Btver2] Fix BSF/BSR schedule	Simon Pilgrim
2018-09-28	Revert r343308: [LoopInterchange] Turn into a loop pass.	Florian Hahn
2018-09-28	[ARM] Prevent DSP and SIM32 being set for v6m	Sam Parker
2018-09-28	[LoopInterchange] Turn into a loop pass.	Florian Hahn
2018-09-28	[llvm-mca] Teach how to track zero registers in class RegisterFile.	Andrea Di Biagio
2018-09-28	[docs] Fix links in Clangd documentation	Kirill Bobyrev
2018-09-28	[ClangFormat] 'try' of function-try-block doesn't obey BraceWrapping	Owen Pan
2018-09-28	[ARM] Alter test to account for change to armv6k default CPU	Peter Smith
2018-09-28	[ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k	Peter Smith
[...]

Clone
https://git.linaro.org/toolchain/ci/llvm-monorepo.git
ssh://git@git.linaro.org/toolchain/ci/llvm-monorepo.git