diff options
author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-15 16:31:10 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-15 16:31:10 +0000 |
commit | f562b81afcb48f632e6367816416415e5a585bf9 (patch) | |
tree | bfed24e8f33dce43d08126b63a36b92423dc172f | |
parent | 28dffd1800bafd29011cf6b1870ab18a4342aa8d (diff) |
[X86] Add PR40318 shuffle test caselinaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig
The other test case is already covered by the PR40306 test case, which was mainly concerned with SSSE3 codegen.
-rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll index fd1098aa225..9f2a0ccf642 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll @@ -2506,6 +2506,38 @@ define <8 x i16> @shuffle_v8i16_9zzzuuuu(<8 x i16> %x) { ret <8 x i16> %r } +; PR40318 +define <8 x i16> @shuffle_v8i16_2zzzuuuu(<8 x i16> %x) { +; SSE2-LABEL: shuffle_v8i16_2zzzuuuu: +; SSE2: # %bb.0: +; SSE2-NEXT: pxor %xmm1, %xmm1 +; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,1,2,0] +; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,0,4,5,6,7] +; SSE2-NEXT: retq +; +; SSSE3-LABEL: shuffle_v8i16_2zzzuuuu: +; SSSE3: # %bb.0: +; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u] +; SSSE3-NEXT: retq +; +; SSE41-LABEL: shuffle_v8i16_2zzzuuuu: +; SSE41: # %bb.0: +; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] +; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero +; SSE41-NEXT: retq +; +; AVX-LABEL: shuffle_v8i16_2zzzuuuu: +; AVX: # %bb.0: +; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] +; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero +; AVX-NEXT: retq + %r = shufflevector <8 x i16> %x, <8 x i16> zeroinitializer, <8 x i32> <i32 2, i32 9, i32 10, i32 11, i32 undef, i32 undef, i32 undef, i32 undef> + ret <8 x i16> %r +} + define <8 x i16> @mask_v8i16_012345ef(<8 x i16> %a, <8 x i16> %b) { ; SSE2-LABEL: mask_v8i16_012345ef: ; SSE2: # %bb.0: |