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| author | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2020-03-18 06:02:05 +0530 |
|---|---|---|
| committer | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2020-03-18 06:02:05 +0530 |
| commit | 50198d61fe28036d38689cd4d780ad710cbaa1e3 (patch) | |
| tree | 60fadc84f733026cfda91184d6e29998cc280d04 | |
| parent | e0ab0e6a281f75e33090ed7f382a5f5e553fb393 (diff) | |
Prefer indirect call for Thumb-1, if number of args is less than 3.linaro-local/llvm-583-blx
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/minsize-call-cse.ll | 17 |
2 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 858ea8843162..5e5055c070b3 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -2141,6 +2141,12 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, return isa<Instruction>(U) && cast<Instruction>(U)->getParent() == BB; }) > 2; + + // For Thumb1, since high registers are not allocatable, we add another constraint + // to check for number of arguments and prefer indirect only if it's below a certain + // threshold (set to 2), to avoid increasing register pressure. + if (PreferIndirect && Subtarget->isThumb1Only()) + PreferIndirect = Outs.size() < 3; } } if (isTailCall) { diff --git a/llvm/test/CodeGen/ARM/minsize-call-cse.ll b/llvm/test/CodeGen/ARM/minsize-call-cse.ll index 072b76f03ba3..bab0c22ea941 100644 --- a/llvm/test/CodeGen/ARM/minsize-call-cse.ll +++ b/llvm/test/CodeGen/ARM/minsize-call-cse.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s | FileCheck %s +; RUN: llc -mtriple=armv6m-eabi < %s | FileCheck %s --check-prefix=CHECK-V6M target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "thumbv7m-arm-none-eabi" @@ -7,6 +8,9 @@ target triple = "thumbv7m-arm-none-eabi" ; CHECK: blx r ; CHECK: blx r ; CHECK: blx r +; CHECK-V6M: blx r +; CHECK-V6M: blx r +; CHECK-V6M: blx r define void @f() minsize optsize { entry: call void @g(i32 45, i32 66) @@ -25,4 +29,17 @@ entry: ret void } +; CHECK-LABEL: i: +; CHECK-V6M: bl y +; CHECK-V6M: bl y +; CHECK-V6M: bl y +define void @i() minsize optsize { +entry: + call void @y(i32 45, i32 66, i32 77) + call void @y(i32 88, i32 32, i32 50) + call void @y(i32 55, i32 33, i32 41) + ret void +} + declare void @g(i32,i32) +declare void @y(i32,i32,i32) |