arm: Remove coercion from scalar argument to vmin & vmax intrinsics

This patch fixes an issue with vmin* and vmax* intrinsics which accept
a scalar argument. Previously when the scalar was of different width
to the vector elements this would generate __ARM_undef. This change
allows the scalar argument to be implicitly converted to the correct
width. Also tidied up the relevant unit tests, some of which would
have passed even if only one of two or three intrinsic calls had
compiled correctly.

Bootstrapped and tested on arm-none-eabi, gcc and CMSIS_DSP
testsuites are clean. OK for trunk?

Thanks,
Joe

gcc/ChangeLog:

2020-08-10  Joe Ramsay  <joe.ramsay@arm.com>

	* config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of scalar
	argument.
	(__arm_vmaxnmvq): Likewise.
	(__arm_vminnmavq): Likewise.
	(__arm_vminnmvq): Likewise.
	(__arm_vmaxnmavq_p): Likewise.
	(__arm_vmaxnmvq_p): Likewise (and delete duplicate definition).
	(__arm_vminnmavq_p): Likewise.
	(__arm_vminnmvq_p): Likewise.
	(__arm_vmaxavq): Likewise.
	(__arm_vmaxavq_p): Likewise.
	(__arm_vmaxvq): Likewise.
	(__arm_vmaxvq_p): Likewise.
	(__arm_vminavq): Likewise.
	(__arm_vminavq_p): Likewise.
	(__arm_vminvq): Likewise.
	(__arm_vminvq_p): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Add test for mismatched
	width of scalar argument.
	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.

53 files changed, 500 insertions, 140 deletions

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 99cff41cccb..26c83c7efef 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -41682,16 +41682,16 @@ extern void *__ARM_undef;
 #define __arm_vmaxavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vmaxavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41706,36 +41706,36 @@ extern void *__ARM_undef;
 #define __arm_vmaxvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 (__p0,__ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vmaxvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vminavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vminavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41750,22 +41750,22 @@ extern void *__ARM_undef;
 #define __arm_vminvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vminvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vmladavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
index 02e02270d4d..74ffad4e726 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
index 7ecd94abbe7..40800b0f12e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
index 7a21de78153..7638737fb84 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
index 4621eba63c7..0dca149b3e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)
   return vmaxavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
index 8813d9da053..f419a771017 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)
   return vmaxavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
index 961f1d28ad5..214ad88f4aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)
   return vmaxavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
index de48ea8f932..6d8cf19a341 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vmaxnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
index b4c7f836969..ef79030d8eb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vmaxnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
index 9c2eed08c37..f7f39f59dad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
index 1cadccb6c8b..341f6254a5a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
index 81f4b9bd49a..80bd1d4cda1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vmaxnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
index ab06c2b3de2..bb2fc46f88a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vmaxnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
index e37c5a107bb..3efe203007b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
index 884cd456614..6c13247f1f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
index 79de370bfd7..657efc51bea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
index e52674486ea..5882351c0fa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
index d3cedd4cd33..3737ecd3307 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
index 79572f7a246..348cf39caa0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
index e2f7a6f3329..f2e976216c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
index f977806bf2e..7df5b63c9bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
index 90f10b54bff..8412452cf33 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)
   return vmaxvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
index aa0e88b9483..09f4909c9a8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)
   return vmaxvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
index 884b84d8e39..a087bbc6b64 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)
   return vmaxvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
index 2813ebdd3c6..47fe0d1cf0f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)
   return vmaxvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
index ab51b1e1088..aa723daf5dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)
   return vmaxvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
index 3326cfb4b66..3aae785040c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)
   return vmaxvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
index 6b876483bc4..9303ae02e39 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
index 086ff56b935..36247f68b2c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
index 999c11ca73c..d3361615dcc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
index a626e312291..17e4edca2f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)
   return vminavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
index be575cb5da3..032d02b8857 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)
   return vminavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
index c3dfe4bfeba..2a2bb3d6146 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)
   return vminavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
index 2111681cea4..fadb23e05c8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vminnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
index bd87b85ec4a..84714a96b9f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vminnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
index e6d0bb5a8f0..c79fa307ae0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
index 6b56b67b7ba..bea04c7aac6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
index 4d4caaea992..0eb3a4af14e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vminnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
index dab04d93f0f..f3183508f8e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vminnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
index f5eafb10122..16f6ac514c8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
index 5ac20bf305f..a8e4f9ffba7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
index c2edb622d5a..91bb63f6ba6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
index ba8921715a4..a846701312c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
index 1665c53f96e..716d414f3a7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
index 5bade0ac334..cc7f8fe8933 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
index c4c574882a3..6bde0be29cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
index dc890dc3472..bb894904f3c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
index f6eed633f03..6d589aa4a05 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)
   return vminvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,11 @@ foo1 (int16_t a, int16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
index 4077c32fffe..7c727d6d92b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)
   return vminvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,11 @@ foo1 (int32_t a, int32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
+int32_t
+foo2 (int8_t a, int32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
index bdf15f45acc..76309482fc5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)
   return vminvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,11 @@ foo1 (int8_t a, int8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
index 5c0935c78cd..698975f456c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)
   return vminvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
+
+uint8_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
index 1580c87fbb1..7489f81debf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)
   return vminvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,11 @@ foo1 (uint32_t a, uint32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
+uint32_t
+foo2 (uint16_t a, uint32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
index 95919b412e0..aa2b986d558 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)
   return vminvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */