diff options
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-01-18 19:30:38 +0000 |
|---|---|---|
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-01-18 19:30:38 +0000 |
| commit | 288e4639cf6dec9c33f9336c7ee1213576396c9a (patch) | |
| tree | e8ae6a83c5e3e3261be4c189b435bf24d9dabf51 /libitm | |
| parent | 5dd8ae13f945ab5cf8a7e345309b2d3f790e3cd0 (diff) | |
[gcc]
2017-01-18 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
__builtin_vec_revb builtins.
* config/rs6000/rs6000-builtins.def (P9V_BUILTIN_XXBRQ_V16QI): Add
built-in functions to support generation of the ISA 3.0 XXBR<x>
vector byte reverse instructions.
(P9V_BUILTIN_XXBRQ_V1TI): Likewise.
(P9V_BUILTIN_XXBRD_V2DI): Likewise.
(P9V_BUILTIN_XXBRD_V2DF): Likewise.
(P9V_BUILTIN_XXBGW_V4SI): Likewise.
(P9V_BUILTIN_XXBGW_V4SF): Likewise.
(P9V_BUILTIN_XXBGH_V8HI): Likewise.
(P9V_BUILTIN_VEC_REVB): Likewise.
* config/rs6000/vsx.md (p9_xxbrq_v1ti): New insns/expanders to
generate the ISA 3.0 XXBR<x> vector byte reverse instructions.
(p9_xxbrq_v16qi): Likewise.
(p9_xxbrd_<mode>, VSX_D iterator): Likewise.
(p9_xxbrw_<mode>, VSX_W iterator): Likewise.
(p9_xxbrh_v8hi): Likewise.
* config/rs6000/altivec.h (vec_revb): Define if ISA 3.0.
* doc/extend.texi (RS/6000 Altivec Built-ins): Document the
vec_revb built-in functions.
[gcc/testsuite]
2017-01-18 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-xxbr-1.c: New test.
* gcc.target/powerpc/p9-xxbr-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244593 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libitm')
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