[ARC] Basic support in gdb-remote process plugin

Differential Revision: https://reviews.llvm.org/D55718

git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@375122 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 13 insertions, 1 deletions

diff --git a/include/lldb/Utility/ArchSpec.h b/include/lldb/Utility/ArchSpec.h
index ae0a4810f..3bfc988ab 100644
--- a/include/lldb/Utility/ArchSpec.h
+++ b/include/lldb/Utility/ArchSpec.h
@@ -184,6 +184,8 @@ public:
     eCore_uknownMach32,
     eCore_uknownMach64,
 
+    eCore_arc, // little endian ARC
+
     kNumCores,
 
     kCore_invalid,
diff --git a/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp b/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
index c85f491c8..02ba400af 100644
--- a/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+++ b/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
@@ -339,7 +339,7 @@ void GDBRemoteCommunicationClient::GetRemoteQSupported() {
                                   // not, we assume no limit
 
   // build the qSupported packet
-  std::vector<std::string> features = {"xmlRegisters=i386,arm,mips"};
+  std::vector<std::string> features = {"xmlRegisters=i386,arm,mips,arc"};
   StreamString packet;
   packet.PutCString("qSupported");
   for (uint32_t i = 0; i < features.size(); ++i) {
diff --git a/source/Target/Platform.cpp b/source/Target/Platform.cpp
index 3087512fb..c9849a9e5 100644
--- a/source/Target/Platform.cpp
+++ b/source/Target/Platform.cpp
@@ -1823,6 +1823,12 @@ size_t Platform::GetSoftwareBreakpointTrapOpcode(Target &target,
     trap_opcode_size = sizeof(g_aarch64_opcode);
   } break;
 
+  case llvm::Triple::arc: {
+    static const uint8_t g_hex_opcode[] = { 0xff, 0x7f };
+    trap_opcode = g_hex_opcode;
+    trap_opcode_size = sizeof(g_hex_opcode);
+  } break;
+
   // TODO: support big-endian arm and thumb trap codes.
   case llvm::Triple::arm: {
     // The ARM reference recommends the use of 0xe7fddefe and 0xdefe but the
diff --git a/source/Target/Thread.cpp b/source/Target/Thread.cpp
index bdc0c31e4..e12b90501 100644
--- a/source/Target/Thread.cpp
+++ b/source/Target/Thread.cpp
@@ -2061,6 +2061,7 @@ Unwind *Thread::GetUnwinder() {
     case llvm::Triple::ppc64le:
     case llvm::Triple::systemz:
     case llvm::Triple::hexagon:
+    case llvm::Triple::arc:
       m_unwinder_up.reset(new UnwindLLDB(*this));
       break;
 
diff --git a/source/Utility/ArchSpec.cpp b/source/Utility/ArchSpec.cpp
index a71a5dcb3..40cc4a092 100644
--- a/source/Utility/ArchSpec.cpp
+++ b/source/Utility/ArchSpec.cpp
@@ -216,6 +216,7 @@ static const CoreDefinition g_core_definitions[] = {
      ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
     {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
      ArchSpec::eCore_uknownMach64, "unknown-mach-64"},
+    {eByteOrderLittle, 4, 2, 4, llvm::Triple::arc, ArchSpec::eCore_arc, "arc"}
 };
 
 // Ensure that we have an entry in the g_core_definitions for each core. If you
@@ -442,6 +443,8 @@ static const ArchDefinitionEntry g_elf_arch_entries[] = {
      ArchSpec::eMIPSSubType_mips64r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6el
     {ArchSpec::eCore_hexagon_generic, llvm::ELF::EM_HEXAGON,
      LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // HEXAGON
+    {ArchSpec::eCore_arc, llvm::ELF::EM_ARC_COMPACT2, LLDB_INVALID_CPUTYPE,
+     0xFFFFFFFFu, 0xFFFFFFFFu }, // ARC
 };
 
 static const ArchDefinition g_elf_arch_def = {