diff options
author | Adam Podogrocki <adam.podogrocki@rndity.com> | 2016-10-28 10:47:15 +0200 |
---|---|---|
committer | Kumar Gala <kumar.gala@linaro.org> | 2017-01-23 15:15:52 -0600 |
commit | 42a4615973ffb0457eccb0b18428e52df3ebe6bc (patch) | |
tree | 12206b4bc8cd1eddec632ec687bea20b94bd0566 /arch | |
parent | 9ff75b2a1b189db14513d276cfc518c07521b2bc (diff) |
soc/stm32: add initial support for STM32F3X series
Supported SoCs:
- STM32F303XC
- STM32F334X8
- STM32F373XC
Change-Id: I74b9561272d54e270ae1a1f602fd389d4c86539a
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.series | 42 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f303xc | 34 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f334x8 | 34 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f373xc | 34 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.series | 28 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Kconfig.soc | 31 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/Makefile | 20 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/linker.ld | 19 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/rcc_registers.h | 99 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc.c | 61 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc.h | 63 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc_config.c | 41 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc_irq.h | 128 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc_registers.h | 23 |
14 files changed, 657 insertions, 0 deletions
diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.series b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.series new file mode 100644 index 000000000..2aae657a2 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.series @@ -0,0 +1,42 @@ +# Kconfig - ST Microelectronics STM32F3 MCU line +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if SOC_SERIES_STM32F3X + +source "arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f3*" + +config SOC_SERIES + default stm32f3 + +config SRAM_BASE_ADDRESS + default 0x20000000 + +config FLASH_BASE_ADDRESS + default 0x08000000 + +config NUM_IRQ_PRIO_BITS + int + default 4 + +if WATCHDOG + +config IWDG_STM32 + def_bool y + +endif # WATCHDOG + +endif # SOC_SERIES_STM32F3X diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f303xc b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f303xc new file mode 100644 index 000000000..200a82c7e --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f303xc @@ -0,0 +1,34 @@ +# Kconfig - ST Microelectronics STM32F303XC MCU +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if SOC_STM32F303XC + +config SOC + string + default stm32f303xc + +config SRAM_SIZE + default 40 + +config FLASH_SIZE + default 256 + +config NUM_IRQS + int + default 82 + +endif # SOC_STM32F303XC diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f334x8 b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f334x8 new file mode 100644 index 000000000..9929e0235 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f334x8 @@ -0,0 +1,34 @@ +# Kconfig - ST Microelectronics STM32F334X8 MCU +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if SOC_STM32F334X8 + +config SOC + string + default stm32f334x8 + +config SRAM_SIZE + default 12 + +config FLASH_SIZE + default 64 + +config NUM_IRQS + int + default 82 + +endif # SOC_STM32F334X8 diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f373xc b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f373xc new file mode 100644 index 000000000..294f110a0 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.defconfig.stm32f373xc @@ -0,0 +1,34 @@ +# Kconfig - ST Microelectronics STM32F373XC MCU +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if SOC_STM32F373XC + +config SOC + string + default stm32f373xc + +config SRAM_SIZE + default 32 + +config FLASH_SIZE + default 256 + +config NUM_IRQS + int + default 82 + +endif # SOC_STM32F373XC diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.series b/arch/arm/soc/st_stm32/stm32f3/Kconfig.series new file mode 100644 index 000000000..5159aa095 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.series @@ -0,0 +1,28 @@ +# Kconfig - ST Microelectronics STM32F3 MCU series +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +config SOC_SERIES_STM32F3X + bool "STM32F3x Series MCU" + select CPU_CORTEX_M + select CPU_CORTEX_M4 + select SOC_FAMILY_STM32 + select SYS_POWER_LOW_POWER_STATE_SUPPORTED + select CPU_HAS_FPU + select CPU_HAS_SYSTICK + select HAS_STM32CUBE + help + Enable support for STM32F3 MCU series diff --git a/arch/arm/soc/st_stm32/stm32f3/Kconfig.soc b/arch/arm/soc/st_stm32/stm32f3/Kconfig.soc new file mode 100644 index 000000000..d1ce74655 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Kconfig.soc @@ -0,0 +1,31 @@ +# Kconfig - ST Microelectronics STM32F3 MCU line +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +choice +prompt "STM32F3x MCU Selection" +depends on SOC_SERIES_STM32F3X + +config SOC_STM32F303XC + bool "STM32F303XC" + +config SOC_STM32F334X8 + bool "STM32F334X8" + +config SOC_STM32F373XC + bool "STM32F373XC" + +endchoice diff --git a/arch/arm/soc/st_stm32/stm32f3/Makefile b/arch/arm/soc/st_stm32/stm32f3/Makefile new file mode 100644 index 000000000..baf5eb307 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/Makefile @@ -0,0 +1,20 @@ +# Makefile - ST Microelectronics STM32F3xx series +# +# Copyright (c) 2016 RnDity Sp. z o.o. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +obj-y += soc.o + +obj-$(CONFIG_PINMUX) += soc_config.o
\ No newline at end of file diff --git a/arch/arm/soc/st_stm32/stm32f3/linker.ld b/arch/arm/soc/st_stm32/stm32f3/linker.ld new file mode 100644 index 000000000..220d80cc1 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/linker.ld @@ -0,0 +1,19 @@ +/* linker.ld - Linker command/script file */ + +/* + * Copyright (c) 2014-2016 Wind River Systems, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <arch/arm/cortex_m/scripts/linker.ld> diff --git a/arch/arm/soc/st_stm32/stm32f3/rcc_registers.h b/arch/arm/soc/st_stm32/stm32f3/rcc_registers.h new file mode 100644 index 000000000..dfe11fd9e --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/rcc_registers.h @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _STM32F3X_CLOCK_H_ +#define _STM32F3X_CLOCK_H_ + +/** + * @brief Driver for Reset & Clock Control of STM32F3x family processor. + * + * Based on reference manual: + * STM32F303xB.C.D.E advanced ARM ® -based 32-bit MCU + * STM32F334xx advanced ARM ® -based 32-bit MCU + * STM32F37xx advanced ARM ® -based 32-bit MCU + * + * Chapter 8: Reset and clock control (RCC) + */ + +/** + * @brief Reset and Clock Control + */ + +union __rcc_cr { + uint32_t val; + struct { + uint32_t hsion :1 __packed; + uint32_t hsirdy :1 __packed; + uint32_t rsvd__2 :1 __packed; + uint32_t hsitrim :5 __packed; + uint32_t hsical :8 __packed; + uint32_t hseon :1 __packed; + uint32_t hserdy :1 __packed; + uint32_t hsebyp :1 __packed; + uint32_t csson :1 __packed; + uint32_t rsvd__20_23 :4 __packed; + uint32_t pllon :1 __packed; + uint32_t pllrdy :1 __packed; + uint32_t rsvd__26_31 :6 __packed; + } bit; +}; + +union __rcc_cfgr { + uint32_t val; + struct { + uint32_t sw :2 __packed; + uint32_t sws :2 __packed; + uint32_t hpre :4 __packed; + uint32_t ppre1 :3 __packed; + uint32_t ppre2 :3 __packed; + uint32_t rsvd__14_15 :2 __packed; + uint32_t pllsrc :1 __packed; + uint32_t pllxtpre :1 __packed; + uint32_t pllmul :4 __packed; + uint32_t rsvd__22_23 :2 __packed; + uint32_t mco :3 __packed; + uint32_t rsvd__27 :1 __packed; + uint32_t mcopre :3 __packed; + uint32_t pllnodiv :1 __packed; + } bit; +}; + +union __rcc_cfgr2 { + uint32_t val; + struct { + uint32_t prediv :4 __packed; + uint32_t adc12pres : 5 __packed; + uint32_t rsvd__9_31 :23 __packed; + } bit; +}; + +struct stm32f3x_rcc { + union __rcc_cr cr; + union __rcc_cfgr cfgr; + uint32_t cir; + uint32_t apb2rstr; + uint32_t apb1rstr; + uint32_t ahbenr; + uint32_t apb2enr; + uint32_t apb1enr; + uint32_t bdcr; + uint32_t csr; + uint32_t ahbrstr; + union __rcc_cfgr2 cfgr2; + uint32_t cfgr3; +}; + +#endif /* _STM32F3X_CLOCK_H_ */ diff --git a/arch/arm/soc/st_stm32/stm32f3/soc.c b/arch/arm/soc/st_stm32/stm32f3/soc.c new file mode 100644 index 000000000..b6bef916a --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/soc.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * @file + * @brief System/hardware module for STM32F3 processor + */ + +#include <nanokernel.h> +#include <device.h> +#include <init.h> +#include <soc.h> +#include <arch/cpu.h> + +/** + * @brief Perform basic hardware initialization at boot. + * + * This needs to be run from the very beginning. + * So the init priority has to be 0 (zero). + * + * @return 0 + */ +static int stm32f3_init(struct device *arg) +{ + uint32_t key; + + ARG_UNUSED(arg); + + key = irq_lock(); + + /* Clear all faults */ + _ScbMemFaultAllFaultsReset(); + _ScbBusFaultAllFaultsReset(); + _ScbUsageFaultAllFaultsReset(); + + _ScbHardFaultAllFaultsReset(); + + /* Install default handler that simply resets the CPU + * if configured in the kernel, NOP otherwise + */ + NMI_INIT(); + + irq_unlock(key); + + return 0; +} + +SYS_INIT(stm32f3_init, PRE_KERNEL_1, 0); diff --git a/arch/arm/soc/st_stm32/stm32f3/soc.h b/arch/arm/soc/st_stm32/stm32f3/soc.h new file mode 100644 index 000000000..53c4323e4 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/soc.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * @file SoC configuration macros for the STM32F3 family processors. + * + * Based on reference manual: + * STM32F303xB/C/D/E, STM32F303x6/8, STM32F328x8, STM32F358xC, + * STM32F398xE advanced ARM ® -based MCUs + * STM32F37xx advanced ARM ® -based MCUs + * + * Chapter 3.3: Memory organization + */ + + +#ifndef _STM32F3_SOC_H_ +#define _STM32F3_SOC_H_ + +#define GPIO_REG_SIZE 0x400 +/* base address for where GPIO registers start */ +#define GPIO_PORTS_BASE (GPIOA_BASE) + +#ifndef _ASMLANGUAGE + +#include <device.h> +#include <misc/util.h> +#include <drivers/rand32.h> + +#include <stm32f3xx.h> + +/* IO pin functions */ +enum stm32f3x_pin_config_mode { + STM32F3X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE = 0, + STM32F3X_PIN_CONFIG_BIAS_PULL_UP, + STM32F3X_PIN_CONFIG_BIAS_PULL_DOWN, + STM32F3X_PIN_CONFIG_ANALOG, + STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN, + STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL, + STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN_PU, + STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN_PD, + STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL_PU, + STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL_PD, + STM32F3X_PIN_CONFIG_AF, +}; + +#include "soc_irq.h" + +#endif /* !_ASMLANGUAGE */ + +#endif /* _STM32F3_SOC_H_ */ diff --git a/arch/arm/soc/st_stm32/stm32f3/soc_config.c b/arch/arm/soc/st_stm32/stm32f3/soc_config.c new file mode 100644 index 000000000..c4f25ec25 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/soc_config.c @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "soc.h" +#include <errno.h> +#include <device.h> +#include <pinmux/stm32/pinmux_stm32.h> +#include <gpio/gpio_stm32.h> + +int stm32_get_pin_config(int pin, int func) +{ + /* GPIO function is a known setting */ + if (func == STM32_PINMUX_FUNC_GPIO) { + return STM32F3X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE; + } + + /* analog function is another 'known' setting */ + if (func == STM32_PINMUX_FUNC_ANALOG) { + return STM32F3X_PIN_CONFIG_ANALOG; + } + + if (func > STM32_PINMUX_FUNC_ALT_MAX) { + return -EINVAL; + } + + /* ToDo: encode and return the 'real' alternate function number */ + return -EINVAL; +} diff --git a/arch/arm/soc/st_stm32/stm32f3/soc_irq.h b/arch/arm/soc/st_stm32/stm32f3/soc_irq.h new file mode 100644 index 000000000..8e9c72864 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/soc_irq.h @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * @file Interrupt numbers for STM32F3 family processors. + * + * Based on reference manual: + * STM32F303xB/C/D/E, STM32F303x6/8, STM32F328x8, STM32F358xC, + * STM32F398xE advanced ARM ® -based MCUs + * + * Chapter 14.1.3: Interrupt and exception vectors + */ + + +#ifndef _STM32F3_SOC_IRQ_H_ +#define _STM32F3_SOC_IRQ_H_ + +/* FIXME: Remove when use of enum line number in IRQ_CONNECT is + * made possible by ZEP-1165. + * soc_irq.h, once it is possible, should be removed. */ + +#define STM32F3_IRQ_WWDG 0 +#define STM32F3_IRQ_PVD 1 +#define STM32F3_IRQ_TAMPER 2 +#define STM32F3_IRQ_RTC 3 +#define STM32F3_IRQ_FLASH 4 +#define STM32F3_IRQ_RCC 5 +#define STM32F3_IRQ_EXTI0 6 +#define STM32F3_IRQ_EXTI1 7 +#define STM32F3_IRQ_EXTI2_TS 8 +#define STM32F3_IRQ_EXTI3 9 +#define STM32F3_IRQ_EXTI4 10 +#define STM32F3_IRQ_DMA1_CH1 11 +#define STM32F3_IRQ_DMA1_CH2 12 +#define STM32F3_IRQ_DMA1_CH3 13 +#define STM32F3_IRQ_DMA1_CH4 14 +#define STM32F3_IRQ_DMA1_CH5 15 +#define STM32F3_IRQ_DMA1_CH6 16 +#define STM32F3_IRQ_DMA1_CH7 17 +#define STM32F3_IRQ_ADC1_2 18 +#define STM32F3_IRQ_USB_HP_CAN_TX 19 +#define STM32F3_IRQ_USB_LP_CAN_RX0 20 +#define STM32F3_IRQ_CAN_RX1 21 +#define STM32F3_IRQ_CAN_SCE 22 +#define STM32F3_IRQ_EXTI9_5 23 +#define STM32F3_IRQ_TIM15 24 +#define STM32F3_IRQ_TIM1_BRK STM32F3_IRQ_TIM15 +#define STM32F3_IRQ_TIM16 25 +#define STM32F3_IRQ_TIM1_UP STM32F3_IRQ_TIM16 +#define STM32F3_IRQ_TIM17 26 +#define STM32F3_IRQ_TIM1_TRG_COM STM32F3_IRQ_TIM17 +#define STM32F3_IRQ_TIM18 27 +#define STM32F3_IRQ_DAC2_URR STM32F3_IRQ_TIM18 +#define STM32F3_IRQ_TIM2 28 +#define STM32F3_IRQ_TIM3 29 +#define STM32F3_IRQ_TIM4 30 +#define STM32F3_IRQ_I2C1_EV 31 +#define STM32F3_IRQ_I2C1_ER 32 +#define STM32F3_IRQ_I2C2_EV 33 +#define STM32F3_IRQ_I2C2_ER 34 +#define STM32F3_IRQ_SPI1 35 +#define STM32F3_IRQ_SPI2 36 +#define STM32F3_IRQ_USART1 37 +#define STM32F3_IRQ_USART2 38 +#define STM32F3_IRQ_USART3 39 +#define STM32F3_IRQ_EXTI15_10 40 +#define STM32F3_IRQ_RTC_ALARM 41 +#define STM32F3_IRQ_USB_WAKEUP 42 +#define STM32F3_IRQ_TIM12 43 +#define STM32F3_IRQ_TIM8_BRK STM32F3_IRQ_TIM12 +#define STM32F3_IRQ_TIM13 44 +#define STM32F3_IRQ_TIM8_UP STM32F3_IRQ_TIM13 +#define STM32F3_IRQ_TIM14 45 +#define STM32F3_IRQ_TIM8_TRG_COM STM32F3_IRQ_TIM14 +#define STM32F3_IRQ_TIM8_CC 46 +#define STM32F3_IRQ_ADC3 47 +#define STM32F3_IRQ_FMC 48 +/* reserved */ +/* reserved */ +#define STM32F3_IRQ_TIM5 50 +#define STM32F3_IRQ_SPI3 51 +#define STM32F3_IRQ_UART4 52 +#define STM32F3_IRQ_UART5 53 +#define STM32F3_IRQ_TIM6 54 +#define STM32F3_IRQ_DAC1_URR STM32F3_IRQ_TIM6 +#define STM32F3_IRQ_TIM7 55 +#define STM32F3_IRQ_DMA2_CH1 56 +#define STM32F3_IRQ_DMA2_CH2 57 +#define STM32F3_IRQ_DMA2_CH3 58 +#define STM32F3_IRQ_DMA2_CH4 59 +#define STM32F3_IRQ_DMA2_CH5 60 +#define STM32F3_IRQ_ADC4 61 +/* reserved */ +/* reserved */ +#define STM32F3_IRQ_COMP_1_2_3 64 +#define STM32F3_IRQ_COMP_2 STM32F3_IRQ_COMP_1_2_3 +#define STM32F3_IRQ_COMP_1_2 STM32F3_IRQ_COMP_1_2_3 +#define STM32F3_IRQ_COMP_4_5_6 65 +#define STM32F3_IRQ_COMP_4_6 STM32F3_IRQ_COMP_4_5_6 +#define STM32F3_IRQ_COMP_7 66 +#define STM32F3_IRQ_OTG_FS 67 +#define STM32F3_IRQ_I2C3_EV 72 +#define STM32F3_IRQ_I2C3_EV_EXTI27 STM32F3_IRQ_I2C3_EV +#define STM32F3_IRQ_I2C3_ER 73 +#define STM32F3_IRQ_USB_HP 74 +#define STM32F3_IRQ_USB_LP 75 +#define STM32F3_IRQ_USB_WAKEUP_RMP 76 +#define STM32F3_IRQ_TIM20_BRK 77 +#define STM32F3_IRQ_TIM19 78 +#define STM32F3_IRQ_TIM20_UP STM32F3_IRQ_TIM19 +#define STM32F3_IRQ_TIM20_TRG_COM 79 +#define STM32F3_IRQ_TIM20_CC 80 +#define STM32F3_IRQ_FPU 81 + +#endif /* _STM32F3_SOC_IRQ_H_ */ diff --git a/arch/arm/soc/st_stm32/stm32f3/soc_registers.h b/arch/arm/soc/st_stm32/stm32f3/soc_registers.h new file mode 100644 index 000000000..f18acf949 --- /dev/null +++ b/arch/arm/soc/st_stm32/stm32f3/soc_registers.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2016 RnDity Sp. z o.o. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _STM32F3X_SOC_REGISTERS_H_ +#define _STM32F3X_SOC_REGISTERS_H_ + +/* include register mapping headers */ +#include "rcc_registers.h" + +#endif /* _STM32F3X_SOC_REGISTERS_H_ */ |