diff options
| author | Vincenzo Frascino <vincenzo.frascino@linaro.org> | 2017-01-26 16:00:30 +0000 |
|---|---|---|
| committer | Kumar Gala <kumar.gala@linaro.org> | 2017-01-30 11:02:36 -0600 |
| commit | 72b276a4c9d56ffd26d6574f196d4a8501e8a945 (patch) | |
| tree | af0fe7b02503b49dc68b782ae67dcae07f957f54 /boards | |
| parent | 4276d2ec9913cf5f5bf5ed08a093969b4906bd44 (diff) | |
doc: Update mps2_an385 documentation
This patch updates the mps2_an385 documentation adding the information
of the CMSDK (Cortex-M System Design Kit) GPIOs Pinmuxing.
Change-Id: Icab0d47bf1a58be058f036fb3db346ef6390266a
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Diffstat (limited to 'boards')
| -rw-r--r-- | boards/arm/mps2_an385/doc/mps2_an385.rst | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/boards/arm/mps2_an385/doc/mps2_an385.rst b/boards/arm/mps2_an385/doc/mps2_an385.rst index c058b739e..c8eda86ce 100644 --- a/boards/arm/mps2_an385/doc/mps2_an385.rst +++ b/boards/arm/mps2_an385/doc/mps2_an385.rst @@ -130,6 +130,87 @@ Pin Mapping The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc. +All GPIO controller pins are exposed via the following sequence of pin numbers: + +- Pins 0 - 15 are for GPIO 0 +- Pins 16 - 31 are for GPIO 1 +- Pins 32 - 47 are for GPIO 2 +- Pins 48 - 51 are for GPIO 3 + +Mapping from the ARM MPS2 Board pins to GPIO controllers: + +- D0 : EXT_0 +- D1 : EXT_4 +- D2 : EXT_2 +- D3 : EXT_3 +- D4 : EXT_1 +- D5 : EXT_6 +- D6 : EXT_7 +- D7 : EXT_8 +- D8 : EXT_9 +- D9 : EXT_10 +- D10 : EXT_12 +- D11 : EXT_13 +- D12 : EXT_14 +- D13 : EXT_11 +- D14 : EXT_15 +- D15 : EXT_5 +- D16 : EXT_16 +- D17 : EXT_17 +- D18 : EXT_18 +- D19 : EXT_19 +- D20 : EXT_20 +- D21 : EXT_21 +- D22 : EXT_22 +- D23 : EXT_23 +- D24 : EXT_24 +- D25 : EXT_25 +- D26 : EXT_26 +- D27 : EXT_30 +- D28 : EXT_28 +- D29 : EXT_29 +- D30 : EXT_27 +- D31 : EXT_32 +- D32 : EXT_33 +- D33 : EXT_34 +- D34 : EXT_35 +- D35 : EXT_36 +- D36 : EXT_38 +- D37 : EXT_39 +- D38 : EXT_40 +- D39 : EXT_44 +- D40 : EXT_41 +- D41 : EXT_31 +- D42 : EXT_37 +- D43 : EXT_42 +- D44 : EXT_43 +- D45 : EXT_45 +- D46 : EXT_46 +- D47 : EXT_47 +- D48 : EXT_48 +- D49 : EXT_49 +- D50 : EXT_50 +- D51 : EXT_51 + +Peripheral Mapping: + +- UART_3_RX : D0 +- UART_3_TX : D1 +- SPI_3_CS : D10 +- SPI_3_MOSI : D11 +- SPI_3_MISO : D12 +- SPI_3_SCLK : D13 +- I2C_3_SDA : D14 +- I2C_3_SCL : D15 +- UART_4_RX : D26 +- UART_4_TX : D30 +- SPI_4_CS : D36 +- SPI_4_MOSI : D37 +- SPI_4_MISO : D38 +- SPI_4_SCK : D39 +- I2C_4_SDA : D40 +- I2C_4_SCL : D41 + For mode details please refer to `MPS2 Technical Reference Manual (TRM)`_. System Clock |