diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 22:35:30 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-02-02 22:35:30 +0000 |
| commit | 1bfda055dfbc52678655ab2ded721f9f7c0cd496 (patch) | |
| tree | fbfa3654ec28d060955ff37e9e9365ad37179013 /ArmPkg/ArmPkg.dec | |
| parent | 7373d15a98fb571bf56688676c8ba950e6f62b8d (diff) | |
Sync up ArmPkg with patch from mailing list. Changed name of BdsLib.h to BdsUnixLib.h and fixed a lot of issues with Xcode building.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11293 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/ArmPkg.dec')
| -rw-r--r-- | ArmPkg/ArmPkg.dec | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index 0b8c101c8..63445756d 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -44,11 +44,76 @@ [Protocols.common]
gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }
+ ## Include/Protocol/MmcHost.h
+ gEfiMmcHostProtocolGuid = { 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B }}
+
[PcdsFeatureFlag.common]
gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
+ # On ARM Architecture with the Security Extension, the address for the
+ # Vector Table can be mapped anywhere in the memory map. It means we can
+ # point the Exception Vector Table to its location in CpuDxe.
+ # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
+ gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
+
+ gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025
+ gArmTokenSpaceGuid.PcdSkipPeiCore|FALSE|BOOLEAN|0x00000026
+
[PcdsFixedAtBuild.common]
+ # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
+ # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
+ gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
+
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002
gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xfff00000|UINT32|0x00000004
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
+
+ #
+ # ARM PL180 MCI
+ #
+ gArmTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000006
+ gArmTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000007
+
+ #
+ # ARM PL390 General Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
+ gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
+
+ #
+ # ARM Secure SEC PCDs
+ #
+ gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
+ gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
+
+ #
+ # ARM MPCore MailBox PCDs
+ #
+ # Address to Set/Get to Mailbox in Multicore system
+ gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017
+ gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018
+ # Address/Value to clear Mailbox in Multicore system
+ gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019
+ gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A
+
+ #
+ # ARM L2x0 PCDs
+ #
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
+
+ #
+ # ARM PL390 General Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D
+
+ #
+ # BdsLib
+ #
+ gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E
+ gArmTokenSpaceGuid.PcdLinuxKernelDP|L""|VOID*|0x0000001F
+ gArmTokenSpaceGuid.PcdLinuxAtag|""|VOID*|0x00000020
+ gArmTokenSpaceGuid.PcdFdtDP|L""|VOID*|0x00000021
+
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