diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2010-03-24 16:47:53 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-03-25 21:13:49 +0000 |
| commit | 319f551a0a167b49b5bbb4a9ff4802046a572bc5 (patch) | |
| tree | b10f922c96e8f0a6ead8557677badeaf27bea630 | |
| parent | 33f663ff9186da1bcc88dc7830b3a632bd472da5 (diff) | |
ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)
This patch introduces the outer_cache_fns.sync function pointer together
with the OUTER_CACHE_SYNC config option that can be used to drain the
write buffer of the outer cache.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/include/asm/outercache.h | 14 | ||||
| -rw-r--r-- | arch/arm/mm/Kconfig | 6 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index c8571cbb557..25f76bae57a 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h @@ -25,6 +25,9 @@ struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); void (*flush_range)(unsigned long, unsigned long); +#ifdef CONFIG_OUTER_CACHE_SYNC + void (*sync)(void); +#endif }; #ifdef CONFIG_OUTER_CACHE @@ -58,4 +61,15 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) #endif +#ifdef CONFIG_OUTER_CACHE_SYNC +static inline void outer_sync(void) +{ + if (outer_cache.sync) + outer_cache.sync(); +} +#else +static inline void outer_sync(void) +{ } +#endif + #endif /* __ASM_OUTERCACHE_H */ diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c4ed9f93f64..88a24de55aa 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -736,6 +736,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG config OUTER_CACHE bool +config OUTER_CACHE_SYNC + bool + help + The outer cache has a outer_cache_fns.sync function pointer + that can be used to drain the write buffer of the outer cache. + config CACHE_FEROCEON_L2 bool "Enable the Feroceon L2 cache controller" depends on ARCH_KIRKWOOD || ARCH_MV78XX0 |