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authorPatrice Chotard <patrice.chotard@stericsson.com>2012-09-19 14:23:46 +0200
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-09-20 09:02:53 -0400
commit4f5e1b370845a0a5789ff7271004ca49e5baa46f (patch)
tree9af15a890152ad9970c5a24d1aa135d4828a19c8
parentd7b4394e780b02511c8a7a499380cdd56316c770 (diff)
spi/pl022: adopt pinctrl support
Amend the PL022 pin controller to optionally take a pin control handle and set the state of the pins to "default" on boot and runtime resume, and to "sleep" at runtime suspend. This way we will dynamically save power on the SPI busses, for example some electronic designs may be able to ground the pins when unused instead of pull-up. Some pin controllers may want to set the pins as wake-up sources when sleeping. Effect on platforms using the PL022 driver: - If the platform does not use pin control - no semantic effect, the pinctrl stubs will kick in and resolve the situation. - Platforms using this driver and have pin control but no function defined for the PL022 need to either supply a "default" function in their map or enable pinctrl dummies so the driver is satisfied. - Platforms using this driver with hogs for setting up the PL022 pin control - stop using hogs to take the pl022 pin control handle, let the driver handle this. I'be looked at some platforms that may be affected: - SPEAr: appears to define the proper functions in their device trees and not hogging them, so things should be smooth, the driver will simply start to take its pins. - Ux500: the proper function is defined and will be taken properly by the driver. New sleep states introduced by a separate patch to ux500 but no regression, since the default state is sufficient. - U300: old hog deleted as part of this patch. - LPC32xx: does not appear to be using pinctrl. - ARM Integrator IMPD1, RealView & Versatile: does not use pinctrl. Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--arch/arm/mach-u300/core.c3
-rw-r--r--drivers/spi/spi-pl022.c46
2 files changed, 46 insertions, 3 deletions
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 03acf1883ec..281292ebac2 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1605,9 +1605,6 @@ static struct u300_mux_hog u300_mux_hogs[] = {
.dev = &uart0_device.dev,
},
{
- .dev = &pl022_device.dev,
- },
- {
.dev = &mmcsd_device.dev,
},
};
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 827ad5152d8..b6cfb7b3a59 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -42,6 +42,7 @@
#include <linux/pm_runtime.h>
#include <linux/gpio.h>
#include <linux/of_gpio.h>
+#include <linux/pinctrl/consumer.h>
/*
* This macro is used to define some register default values.
@@ -367,6 +368,10 @@ struct pl022 {
resource_size_t phybase;
void __iomem *virtbase;
struct clk *clk;
+ /* Two optional pin states - default & sleep */
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ struct pinctrl_state *pins_sleep;
struct spi_master *master;
struct pl022_ssp_controller *master_info;
/* Message per-transfer pump */
@@ -2068,6 +2073,28 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id)
pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int),
GFP_KERNEL);
+ pl022->pinctrl = devm_pinctrl_get(dev);
+ if (IS_ERR(pl022->pinctrl)) {
+ status = PTR_ERR(pl022->pinctrl);
+ goto err_no_pinctrl;
+ }
+
+ pl022->pins_default = pinctrl_lookup_state(pl022->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ /* enable pins to be muxed in and configured */
+ if (!IS_ERR(pl022->pins_default)) {
+ status = pinctrl_select_state(pl022->pinctrl,
+ pl022->pins_default);
+ if (status)
+ dev_err(dev, "could not set default pins\n");
+ } else
+ dev_err(dev, "could not get default pinstate\n");
+
+ pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(pl022->pins_sleep))
+ dev_dbg(dev, "could not get sleep pinstate\n");
+
/*
* Bus Number Which has been Assigned to this SSP controller
* on this board
@@ -2218,6 +2245,7 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id)
amba_release_regions(adev);
err_no_ioregion:
err_no_gpio:
+ err_no_pinctrl:
spi_master_put(master);
err_no_master:
err_no_pdata:
@@ -2291,15 +2319,33 @@ static int pl022_resume(struct device *dev)
static int pl022_runtime_suspend(struct device *dev)
{
struct pl022 *pl022 = dev_get_drvdata(dev);
+ int status = 0;
clk_disable(pl022->clk);
+ /* Optionally let pins go into sleep states */
+ if (!IS_ERR(pl022->pins_sleep)) {
+ status = pinctrl_select_state(pl022->pinctrl,
+ pl022->pins_sleep);
+ if (status)
+ dev_err(dev, "could not set pins to sleep state\n");
+ }
+
return 0;
}
static int pl022_runtime_resume(struct device *dev)
{
struct pl022 *pl022 = dev_get_drvdata(dev);
+ int status = 0;
+
+ /* Optionaly enable pins to be muxed in and configured */
+ if (!IS_ERR(pl022->pins_default)) {
+ status = pinctrl_select_state(pl022->pinctrl,
+ pl022->pins_default);
+ if (status)
+ dev_err(dev, "could not set default pins\n");
+ }
clk_enable(pl022->clk);