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authorBjorn Helgaas <bhelgaas@google.com>2012-07-06 12:08:18 -0600
committerBjorn Helgaas <bhelgaas@google.com>2012-07-09 19:49:24 -0600
commitbbffe435248444065bd76141c41bbe65db950cc9 (patch)
tree84b48d12edc48040856f9feeeee70a82fe39852b /drivers/pci
parentcfaf025112d3856637ff34a767ef785ef5cf2ca9 (diff)
PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
After 253d2e5498, we disable MEM and IO decoding for most devices while we size 32-bit BARs. However, we restore the original COMMAND register before we size the upper 32 bits of 64-bit BARs, so we can still cause a conflict. This patch waits to restore the original COMMAND register until we're completely finished sizing the BAR. Reference: https://lkml.org/lkml/2007/8/25/154 Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/probe.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 658ac977cb5..66b3a6ffe5a 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -152,9 +152,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
pci_read_config_dword(dev, pos, &sz);
pci_write_config_dword(dev, pos, l);
- if (!dev->mmio_always_on)
- pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
-
/*
* All bits set in sz means the device isn't working properly.
* If the BAR isn't implemented, all bits must be 0. If it's a
@@ -239,6 +236,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
}
out:
+ if (!dev->mmio_always_on)
+ pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
+
return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
fail:
res->flags = 0;