diff options
| author | Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> | 2020-11-24 22:17:05 +0530 |
|---|---|---|
| committer | Thomas Abraham <thomas.abraham@arm.com> | 2020-11-28 18:02:45 +0530 |
| commit | 1c77f89ab929c4876d040cbb4e5c7a2658970e6e (patch) | |
| tree | 3f4744f04440ebd7ba87f7b099f0b79bae7d1894 | |
| parent | 2f5fd4a92615e1ec4c9a12d3c21ff72120295e20 (diff) | |
product/rddanielxlr: fix pik_clock's modulator_reg of cluster 1RD-INFRA-2020.11.30refinfra
Cluster 1's modulator register is pointing to CLUSTER_PIK_PTR(0) which
corresponds to Cluster 0's PIK register space instead of Cluster 1's.
Fix this by pointing to CLUSTER_PIK_PTR(1).
Fixes https://github.com/ARM-software/SCP-firmware/issues/342
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I8fe1493c594b25a7993fb73af95729bfc44287ba
| -rw-r--r-- | product/rddanielxlr/scp_ramfw/config_pik_clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/product/rddanielxlr/scp_ramfw/config_pik_clock.c b/product/rddanielxlr/scp_ramfw/config_pik_clock.c index c4d1dca1..9a4e3873 100644 --- a/product/rddanielxlr/scp_ramfw/config_pik_clock.c +++ b/product/rddanielxlr/scp_ramfw/config_pik_clock.c @@ -115,7 +115,7 @@ static const struct fwk_element pik_clock_element_table[] = { .is_group_member = true, .control_reg = &CLUSTER_PIK_PTR(1)->CORECLK[0].CTRL, .divext_reg = &CLUSTER_PIK_PTR(1)->CORECLK[0].DIV, - .modulator_reg = &CLUSTER_PIK_PTR(0)->CORECLK[0].MOD, + .modulator_reg = &CLUSTER_PIK_PTR(1)->CORECLK[0].MOD, .rate_table = rate_table_cpu_group, .rate_count = FWK_ARRAY_SIZE(rate_table_cpu_group), }), |