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authorErwan Gouriou <erwan.gouriou@linaro.org>2017-04-10 14:17:38 +0200
committerKumar Gala <kumar.gala@linaro.org>2017-04-28 15:06:41 -0500
commit9e558fc05a1121c7d9910ddaaf63ae59d8002a03 (patch)
tree50c2a44da530a88a75a2dbf84bdd645b2d479adf
parentfda01e52c2f6f3f55671334abd352ced8a89a565 (diff)
drivers: dma_stm32f4x: make driver compatible with LL Clock Driver
Following update of LL clock driver to suport F4 series, update dma driver to support LL clock driver API. Change-Id: Ic8ecfe4f33109204f3b5f8c22bcb9c41de81531d Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
-rw-r--r--drivers/dma/dma_stm32f4x.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/dma/dma_stm32f4x.c b/drivers/dma/dma_stm32f4x.c
index 71f4e6279..5cdecaec0 100644
--- a/drivers/dma/dma_stm32f4x.c
+++ b/drivers/dma/dma_stm32f4x.c
@@ -66,7 +66,11 @@ static struct dma_stm32_device {
} device_data[DMA_STM32_MAX_DEVS];
struct dma_stm32_config {
+#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
+ struct stm32_pclken pclken;
+#else
struct stm32f4x_pclken pclken;
+#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
void (*config)(struct dma_stm32_device *);
};
@@ -496,8 +500,13 @@ static const struct dma_driver_api dma_funcs = {
};
const struct dma_stm32_config dma_stm32_1_cdata = {
+#if CONFIG_CLOCK_CONTROL_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_AHB1,
.enr = STM32F4X_CLOCK_ENABLE_DMA1 },
+#else
+ .pclken = { .bus = STM32_CLOCK_BUS_AHB1,
+ .enr = LL_AHB1_GRP1_PERIPH_DMA1 },
+#endif
.config = dma_stm32_1_config,
};
@@ -507,8 +516,13 @@ DEVICE_AND_API_INIT(dma_stm32_1, CONFIG_DMA_1_NAME, &dma_stm32_init,
(void *)&dma_funcs);
static const struct dma_stm32_config dma_stm32_2_cdata = {
+#if CONFIG_CLOCK_CONTROL_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_AHB1,
.enr = STM32F4X_CLOCK_ENABLE_DMA2 },
+#else
+ .pclken = { .bus = STM32_CLOCK_BUS_AHB1,
+ .enr = LL_AHB1_GRP1_PERIPH_DMA2 },
+#endif /* CONFIG_CLOCK_CONTROL_STM32F4X */
.config = dma_stm32_2_config,
};
@@ -604,4 +618,3 @@ static void dma_stm32_2_config(struct dma_stm32_device *ddata)
dma_stm32_irq_7, DEVICE_GET(dma_stm32_2), 0);
irq_enable(STM32F4_IRQ_DMA2_STREAM7);
}
-