diff options
| author | Kumar Gala <kumar.gala@linaro.org> | 2017-04-28 15:37:23 -0500 |
|---|---|---|
| committer | Kumar Gala <kumar.gala@linaro.org> | 2017-04-28 15:39:05 -0500 |
| commit | 3d3adc8578f19a6f6449b3101e25639c5794037f (patch) | |
| tree | e67c86482124bf5e337e828f6b6564f0c67f3677 /ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h | |
| parent | cc93aceb83642a83105a634cf4847d5d563bd2b2 (diff) | |
| parent | ac0bb050ddef753741ff9e05932aad1b6c43ed22 (diff) | |
Merge arm branch into master
Main changes:
- Converted Nordic SoC & Boards to device tree
- Converted TI LM3S6965 SoC & QEMU Cortex M3 board to device tree
- Add support for TI CC3220 SF SoC & CC3220SF-LAUNCHXL board
- Add support for ST DISCO L475 IOT1 board
- Add support for NXP FRDM-KL25Z board
- Converted all dts to use 'current-speed' instead of 'baud-rate'
- Various code cleanups
----------------------------------------------------------------
Erwan Gouriou (12):
ext: stm32cube: update stm32f1xx cube version
dts: Align uart "baud-rate" property to device tree spec "current-speed"
drivers: clock control: Provide LL based clock control for stm32f4 series
drivers: dma_stm32f4x: make driver compatible with LL Clock Driver
boards: stm32f4: Provide config for LL Clock control
soc: stm32f4: Enable LL based clock control
stm32f4: Clean references to stm32f4 specific clock control
driver: uart: clock control code refactoring
driver: clock control stm32: align f4 factor names on l4
soc: stm32l4xx: add support for STM32L475XG
board: Add support for board disco_l475_iot1
boards: disco_l475_iot: Configuration for HTS221 sample
Florian Vaussard (2):
arm: stm32f4: Reorder Kconfig options
pinmux: stm32f4: Clean-up pinmux header
Gil Pitney (7):
cc3200: Make use of mem.h file in soc dtsi file.
cc3220sf: Add support for the TI CC3220SF SoC
boards: Add support for the CC3220SF_LAUNCHXL board
MAINTAINERS: Update maintainer for TI CC3220SF LaunchXL board
cc3220sf: Update "baud-rate" dts property to "current-speed"
cc3200: Set warning to deprecate board in Zephyr v1.8
cc3220sf: Minor board documentation updates
Gustavo Denardin (1):
arm: Support for new ARM board FRDM-KL25Z
Jon Medhurst (2):
i2c: bitbang: Add library for software driven I2C
i2c: i2c_gpio: Driver for software driven I2C using GPIO lines
Kumar Gala (13):
serial: mcux: Shim driver for LPSCI UART on KL25Z
arm: nxp: kl2x: Move to using UART_MCUX_LPSCI for UART0
arm: ti: dts: fixup building CC3200 dts
arm: soc: ti_lm3s6965: remove dead code
arm: linker: remove unused linker sections
arm: dts: nrf: Add Device Tree Support for nRF52832 SoC based boards
arm: dts: nrf: Fixup nRF52840-QIAA SoC support for device tree
arm: dts: nrf: Add Device Tree Support for nRF52840 SoC & boards
arm: dts: nrf: Add Device Tree Support for nRF51822 SoC & boards
arm: dts: nrf: Remove !HAS_DTS Kconfig bits
serial: uart_stellaris: remove export of uart_stellaris_isr
arm: dts: ti_lm3s6965: Add Device Tree Support
arm: dts: ti_lm3s6965: Add device tree support for Stellaris UART
.gitreview | 1 +
MAINTAINERS | 2 +-
.../nrf51/Kconfig.defconfig.nrf51822_QFAA | 6 -
.../nrf51/Kconfig.defconfig.nrf51822_QFAB | 6 -
.../nrf51/Kconfig.defconfig.nrf51822_QFAC | 6 -
.../soc/nordic_nrf5/nrf51/Kconfig.defconfig.series | 10 -
.../nrf52/Kconfig.defconfig.nrf52832_QFAA | 8 -
.../nrf52/Kconfig.defconfig.nrf52840_QIAA | 6 -
.../soc/nordic_nrf5/nrf52/Kconfig.defconfig.series | 12 -
arch/arm/soc/nxp_kinetis/Kconfig | 6 +
.../soc/nxp_kinetis/kl2x/Kconfig.defconfig.mkl25z4 | 2 +-
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.soc | 1 +
arch/arm/soc/nxp_kinetis/kl2x/soc.c | 6 +-
.../soc/st_stm32/stm32f4/Kconfig.defconfig.series | 2 +-
arch/arm/soc/st_stm32/stm32f4/Kconfig.soc | 6 +-
arch/arm/soc/st_stm32/stm32f4/flash_registers.h | 107 -
arch/arm/soc/st_stm32/stm32f4/rcc_registers.h | 159 -
arch/arm/soc/st_stm32/stm32f4/soc.c | 6 +
arch/arm/soc/st_stm32/stm32f4/soc.h | 7 +
arch/arm/soc/st_stm32/stm32f4/soc_gpio.c | 6 +-
arch/arm/soc/st_stm32/stm32f4/soc_registers.h | 1 -
.../st_stm32/stm32l4/Kconfig.defconfig.stm32l475xg | 18 +
arch/arm/soc/st_stm32/stm32l4/Kconfig.soc | 4 +
arch/arm/soc/ti_lm3s6965/Kconfig.defconfig | 30 -
arch/arm/soc/ti_lm3s6965/Makefile | 1 -
arch/arm/soc/ti_lm3s6965/scp.c | 44 -
arch/arm/soc/ti_lm3s6965/scp.h | 164 -
arch/arm/soc/ti_lm3s6965/soc.h | 12 -
.../cc32xx/Kconfig.defconfig.cc3220sf | 43 +
arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc | 15 +
arch/arm/soc/ti_simplelink/cc32xx/README | 10 +-
arch/arm/soc/ti_simplelink/cc32xx/soc.c | 6 +-
boards/arm/96b_carbon/96b_carbon_defconfig | 23 +-
boards/arm/96b_nitrogen/96b_nitrogen_defconfig | 3 +
.../arm/arduino_101_ble/arduino_101_ble_defconfig | 3 +
boards/arm/bbc_microbit/bbc_microbit_defconfig | 3 +
boards/arm/cc3200_launchxl/Kconfig.defconfig | 3 +
boards/arm/cc3220sf_launchxl/Kconfig.board | 6 +
boards/arm/cc3220sf_launchxl/Kconfig.defconfig | 9 +
boards/arm/cc3220sf_launchxl/Makefile | 4 +
boards/arm/cc3220sf_launchxl/board.h | 25 +
.../cc3220sf_launchxl/cc3220sf_launchxl_defconfig | 28 +
boards/arm/cc3220sf_launchxl/dbghdr.c | 24 +
.../cc3220sf_launchxl/doc/cc3220sf_launchxl.rst | 222 +
boards/arm/cc3220sf_launchxl/pinmux.c | 121 +
.../arm/cc3220sf_launchxl/support/CC3220SF.ccxml | 14 +
.../cc3220sf_launchxl/support/cc3220_xds110.cfg | 45 +
.../arm/cc3220sf_launchxl/support/gdbinit_xds110 | 16 +
boards/arm/curie_ble/curie_ble_defconfig | 3 +
boards/arm/disco_l475_iot1/Kconfig.board | 10 +
boards/arm/disco_l475_iot1/Kconfig.defconfig | 90 +
boards/arm/disco_l475_iot1/Makefile | 2 +
boards/arm/disco_l475_iot1/board.h | 41 +
.../arm/disco_l475_iot1/disco_l475_iot1_defconfig | 58 +
boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst | 245 +
.../disco_l475_iot1/doc/img/disco_l475_iot1.jpg | Bin 0 -> 1471155 bytes
boards/arm/frdm_kl25z/Kconfig.board | 11 +
boards/arm/frdm_kl25z/Kconfig.defconfig | 108 +
boards/arm/frdm_kl25z/Makefile | 10 +
boards/arm/frdm_kl25z/board.h | 44 +
boards/arm/frdm_kl25z/doc/frdm_kl25z.jpg | Bin 0 -> 15127 bytes
boards/arm/frdm_kl25z/doc/frdm_kl25z.rst | 173 +
boards/arm/frdm_kl25z/frdm_kl25z_defconfig | 12 +
boards/arm/frdm_kl25z/pinmux.c | 70 +
boards/arm/nrf51_blenano/nrf51_blenano_defconfig | 3 +
boards/arm/nrf51_pca10028/nrf51_pca10028_defconfig | 3 +
.../nrf52840_pca10056/nrf52840_pca10056_defconfig | 3 +
boards/arm/nrf52_blenano2/nrf52_blenano2_defconfig | 3 +
boards/arm/nrf52_pca10040/nrf52_pca10040_defconfig | 3 +
boards/arm/nucleo_f401re/nucleo_f401re_defconfig | 24 +-
boards/arm/nucleo_f411re/nucleo_f411re_defconfig | 25 +-
boards/arm/qemu_cortex_m3/qemu_cortex_m3_defconfig | 3 +-
.../quark_se_c1000_ble_defconfig | 3 +
drivers/clock_control/Kconfig | 2 -
drivers/clock_control/Kconfig.stm32 | 46 +
drivers/clock_control/Kconfig.stm32f4x | 141 -
drivers/clock_control/Makefile | 2 +-
drivers/clock_control/stm32_ll_clock.c | 9 +
drivers/clock_control/stm32_ll_clock.h | 1 +
drivers/clock_control/stm32f3x_ll_clock.c | 8 +
drivers/clock_control/stm32f4x_clock.c | 350 --
drivers/clock_control/stm32f4x_ll_clock.c | 52 +
drivers/clock_control/stm32l4x_ll_clock.c | 8 +
drivers/dma/dma_stm32f4x.c | 11 +-
drivers/gpio/gpio_stm32.c | 35 +-
drivers/gpio/gpio_stm32.h | 6 +-
drivers/i2c/Kconfig | 8 +
drivers/i2c/Kconfig.gpio | 158 +
drivers/i2c/Makefile | 2 +
drivers/i2c/i2c_bitbang.c | 279 ++
drivers/i2c/i2c_bitbang.h | 57 +
drivers/i2c/i2c_gpio.c | 149 +
drivers/pinmux/Makefile | 1 +
.../pinmux/stm32/pinmux_board_disco_l475_iot1.c | 64 +
drivers/pinmux/stm32/pinmux_stm32.c | 21 +-
drivers/pinmux/stm32/pinmux_stm32f4.h | 14 +-
drivers/pwm/pwm_stm32.c | 43 +-
drivers/pwm/pwm_stm32.h | 4 -
drivers/serial/Kconfig | 2 +
drivers/serial/Kconfig.mcux_lpsci | 32 +
drivers/serial/Kconfig.stellaris | 48 -
drivers/serial/Makefile | 1 +
drivers/serial/uart_cc32xx.c | 2 +-
drivers/serial/uart_mcux_lpsci.c | 308 ++
drivers/serial/uart_stellaris.c | 34 +-
drivers/serial/uart_stellaris.h | 16 -
drivers/serial/uart_stm32.c | 21 +-
drivers/serial/uart_stm32.h | 4 -
dts/arm/96b_carbon.dts | 4 +-
dts/arm/96b_carbon.fixup | 5 +-
dts/arm/96b_nitrogen.dts | 26 +
dts/arm/96b_nitrogen.fixup | 3 +
dts/arm/Makefile | 14 +
dts/arm/arduino_101_ble.dts | 25 +
dts/arm/arduino_101_ble.fixup | 3 +
dts/arm/bbc_microbit.dts | 24 +
dts/arm/bbc_microbit.fixup | 3 +
dts/arm/cc3200_launchxl.dts | 5 +-
dts/arm/cc3220sf_launchxl.dts | 23 +
dts/arm/cc3220sf_launchxl.fixup | 1 +
dts/arm/curie_ble.dts | 25 +
dts/arm/curie_ble.fixup | 3 +
dts/arm/disco_l475_iot1.dts | 24 +
dts/arm/disco_l475_iot1.fixup | 32 +
dts/arm/frdm_k64f.dts | 4 +-
dts/arm/frdm_k64f.fixup | 12 +-
dts/arm/frdm_kl25z.dts | 23 +
dts/arm/frdm_kl25z.fixup | 1 +
dts/arm/frdm_kw41z.dts | 1 +
dts/arm/frdm_kw41z.fixup | 2 +-
dts/arm/hexiwear_k64.dts | 4 +-
dts/arm/hexiwear_k64.fixup | 12 +-
dts/arm/hexiwear_kw40z.dts | 2 +-
dts/arm/hexiwear_kw40z.fixup | 2 +-
dts/arm/nordic/nrf51822.dtsi | 31 +
dts/arm/nordic/nrf52840.dtsi | 38 +
dts/arm/nrf51_blenano.dts | 25 +
dts/arm/nrf51_blenano.fixup | 3 +
dts/arm/nrf51_pca10028.dts | 25 +
dts/arm/nrf51_pca10028.fixup | 3 +
dts/arm/nrf52840_pca10056.dts | 26 +
dts/arm/nrf52840_pca10056.fixup | 3 +
dts/arm/nrf52_blenano2.dts | 26 +
dts/arm/nrf52_blenano2.fixup | 3 +
dts/arm/nrf52_pca10040.dts | 26 +
dts/arm/nrf52_pca10040.fixup | 3 +
dts/arm/nucleo_f103rb.dts | 2 +-
dts/arm/nucleo_f103rb.fixup | 2 +-
dts/arm/nucleo_f334r8.dts | 2 +-
dts/arm/nucleo_f334r8.fixup | 2 +-
dts/arm/nucleo_f401re.dts | 4 +-
dts/arm/nucleo_f401re.fixup | 5 +-
dts/arm/nucleo_f411re.dts | 4 +-
dts/arm/nucleo_f411re.fixup | 5 +-
dts/arm/nucleo_l476rg.dts | 2 +-
dts/arm/nucleo_l476rg.fixup | 10 +-
dts/arm/nxp/nxp_kl25z.dtsi | 32 +
dts/arm/nxp/nxp_kw41z.dtsi | 1 -
dts/arm/olimexino_stm32.dts | 2 +-
dts/arm/olimexino_stm32.fixup | 6 +-
dts/arm/qemu_cortex_m3.dts | 34 +
dts/arm/qemu_cortex_m3.fixup | 1 +
dts/arm/quark_se_c1000_ble.dts | 25 +
dts/arm/quark_se_c1000_ble.fixup | 3 +
dts/arm/st/mem.h | 3 +
dts/arm/st/stm32l475.dtsi | 59 +
dts/arm/st/stm32l476.dtsi | 54 +-
dts/arm/stm3210c_eval.dts | 2 +-
dts/arm/stm3210c_eval.fixup | 2 +-
dts/arm/stm32373c_eval.dts | 2 +-
dts/arm/stm32373c_eval.fixup | 2 +-
dts/arm/stm32_mini_a15.dts | 2 +-
dts/arm/stm32_mini_a15.fixup | 2 +-
dts/arm/ti/{cc32xx_launchxl.dtsi => cc32xx.dtsi} | 15 +-
dts/arm/ti/lm3s6965.dtsi | 45 +
dts/arm/ti/mem.h | 19 +
dts/arm/v2m_beetle.dts | 4 +-
dts/arm/v2m_beetle.fixup | 4 +-
dts/arm/yaml/nxp,kinetis-lpsci.yaml | 31 +
dts/arm/yaml/ti,stellaris-uart.yaml | 30 +
dts/common/yaml/uart.yaml | 2 +-
ext/hal/nxp/mcux/drivers/Makefile | 1 +
ext/hal/st/stm32cube/Kbuild | 1 +
ext/hal/st/stm32cube/stm32f1xx/README | 6 +-
.../drivers/include/Legacy/stm32_hal_legacy.h | 254 +-
.../drivers/include/stm32_assert_template.h | 75 +
.../stm32f1xx/drivers/include/stm32f1xx_hal.h | 67 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_adc.h | 148 +-
.../drivers/include/stm32f1xx_hal_adc_ex.h | 127 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_can.h | 445 +-
.../drivers/include/stm32f1xx_hal_can_ex.h | 13 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_cec.h | 325 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_conf.h | 144 +-
.../drivers/include/stm32f1xx_hal_cortex.h | 266 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_crc.h | 14 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_dac.h | 42 +-
.../drivers/include/stm32f1xx_hal_dac_ex.h | 20 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_def.h | 54 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_dma.h | 259 +-
.../drivers/include/stm32f1xx_hal_dma_ex.h | 51 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_eth.h | 946 ++--
.../drivers/include/stm32f1xx_hal_flash.h | 40 +-
.../drivers/include/stm32f1xx_hal_flash_ex.h | 304 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_gpio.h | 178 +-
.../drivers/include/stm32f1xx_hal_gpio_ex.h | 85 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_hcd.h | 22 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_i2c.h | 600 +--
.../stm32f1xx/drivers/include/stm32f1xx_hal_i2s.h | 254 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_irda.h | 366 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_iwdg.h | 235 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_mmc.h | 718 +++
.../stm32f1xx/drivers/include/stm32f1xx_hal_nand.h | 249 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_nor.h | 18 +-
.../drivers/include/stm32f1xx_hal_pccard.h | 29 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_pcd.h | 120 +-
.../drivers/include/stm32f1xx_hal_pcd_ex.h | 4 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_pwr.h | 20 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_rcc.h | 494 +-
.../drivers/include/stm32f1xx_hal_rcc_ex.h | 152 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_rtc.h | 52 +-
.../drivers/include/stm32f1xx_hal_rtc_ex.h | 104 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_sd.h | 646 +--
.../drivers/include/stm32f1xx_hal_smartcard.h | 458 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_spi.h | 483 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_sram.h | 14 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_tim.h | 362 +-
.../drivers/include/stm32f1xx_hal_tim_ex.h | 47 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_uart.h | 504 ++-
.../drivers/include/stm32f1xx_hal_usart.h | 400 +-
.../stm32f1xx/drivers/include/stm32f1xx_hal_wwdg.h | 177 +-
.../stm32f1xx/drivers/include/stm32f1xx_ll_adc.h | 3950 ++++++++++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_bus.h | 1033 +++++
.../drivers/include/stm32f1xx_ll_cortex.h | 658 +++
.../stm32f1xx/drivers/include/stm32f1xx_ll_crc.h | 212 +
.../stm32f1xx/drivers/include/stm32f1xx_ll_dac.h | 1349 ++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_dma.h | 1978 ++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_exti.h | 906 ++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_fsmc.h | 812 ++--
.../stm32f1xx/drivers/include/stm32f1xx_ll_gpio.h | 2381 ++++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_i2c.h | 1802 ++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_iwdg.h | 329 ++
.../stm32f1xx/drivers/include/stm32f1xx_ll_pwr.h | 458 ++
.../stm32f1xx/drivers/include/stm32f1xx_ll_rcc.h | 2309 ++++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_rtc.h | 1021 +++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_sdmmc.h | 467 +-
.../stm32f1xx/drivers/include/stm32f1xx_ll_spi.h | 1922 ++++++++
.../drivers/include/stm32f1xx_ll_system.h | 592 +++
.../stm32f1xx/drivers/include/stm32f1xx_ll_tim.h | 3837 ++++++++++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_usart.h | 2589 +++++++++++
.../stm32f1xx/drivers/include/stm32f1xx_ll_usb.h | 4 +-
.../stm32f1xx/drivers/include/stm32f1xx_ll_utils.h | 284 ++
.../stm32f1xx/drivers/include/stm32f1xx_ll_wwdg.h | 342 ++
.../stm32f1xx/drivers/src/stm32f1xx_hal.c | 106 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_adc.c | 52 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_adc_ex.c | 104 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_can.c | 988 ++--
.../stm32f1xx/drivers/src/stm32f1xx_hal_cec.c | 722 +--
.../stm32f1xx/drivers/src/stm32f1xx_hal_cortex.c | 199 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_crc.c | 15 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_dac.c | 12 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_dac_ex.c | 16 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_dma.c | 734 +--
.../stm32f1xx/drivers/src/stm32f1xx_hal_eth.c | 347 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_flash.c | 170 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_flash_ex.c | 77 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_gpio.c | 130 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_gpio_ex.c | 4 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_hcd.c | 125 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_i2c.c | 4184 +++++++++++------
.../stm32f1xx/drivers/src/stm32f1xx_hal_i2s.c | 986 ++--
.../stm32f1xx/drivers/src/stm32f1xx_hal_irda.c | 1708 ++++---
.../stm32f1xx/drivers/src/stm32f1xx_hal_iwdg.c | 316 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_mmc.c | 2598 +++++++++++
.../drivers/src/stm32f1xx_hal_msp_template.c | 4 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_nand.c | 1075 ++++-
.../stm32f1xx/drivers/src/stm32f1xx_hal_nor.c | 38 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_pccard.c | 54 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_pcd.c | 258 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_pcd_ex.c | 30 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_pwr.c | 33 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_rcc.c | 109 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_rcc_ex.c | 139 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_rtc.c | 210 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_rtc_ex.c | 31 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_sd.c | 4762 +++++++++-----------
.../drivers/src/stm32f1xx_hal_smartcard.c | 1853 +++++---
.../stm32f1xx/drivers/src/stm32f1xx_hal_spi.c | 3632 +++++++++------
.../stm32f1xx/drivers/src/stm32f1xx_hal_spi_ex.c | 54 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_sram.c | 16 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_tim.c | 236 +-
.../stm32f1xx/drivers/src/stm32f1xx_hal_tim_ex.c | 46 +-
.../stm32f1xx_hal_timebase_rtc_alarm_template.c | 307 ++
.../src/stm32f1xx_hal_timebase_tim_template.c | 184 +
.../stm32f1xx/drivers/src/stm32f1xx_hal_uart.c | 1703 ++++---
.../stm32f1xx/drivers/src/stm32f1xx_hal_usart.c | 1265 ++++--
.../stm32f1xx/drivers/src/stm32f1xx_hal_wwdg.c | 390 +-
.../stm32f1xx/drivers/src/stm32f1xx_ll_adc.c | 903 ++++
.../stm32f1xx/drivers/src/stm32f1xx_ll_crc.c | 126 +
.../stm32f1xx/drivers/src/stm32f1xx_ll_dac.c | 274 ++
.../stm32f1xx/drivers/src/stm32f1xx_ll_dma.c | 331 ++
.../stm32f1xx/drivers/src/stm32f1xx_ll_exti.c | 232 +
.../stm32f1xx/drivers/src/stm32f1xx_ll_fsmc.c | 362 +-
.../stm32f1xx/drivers/src/stm32f1xx_ll_gpio.c | 265 ++
.../stm32f1xx/drivers/src/stm32f1xx_ll_i2c.c | 239 +
.../stm32f1xx/drivers/src/stm32f1xx_ll_pwr.c | 103 +
.../stm32f1xx/drivers/src/stm32f1xx_ll_rcc.c | 507 +++
.../stm32f1xx/drivers/src/stm32f1xx_ll_rtc.c | 558 +++
.../stm32f1xx/drivers/src/stm32f1xx_ll_sdmmc.c | 1184 ++++-
.../stm32f1xx/drivers/src/stm32f1xx_ll_spi.c | 562 +++
.../stm32f1xx/drivers/src/stm32f1xx_ll_tim.c | 1216 +++++
.../stm32f1xx/drivers/src/stm32f1xx_ll_usart.c | 451 ++
.../stm32f1xx/drivers/src/stm32f1xx_ll_usb.c | 167 +-
.../stm32f1xx/drivers/src/stm32f1xx_ll_utils.c | 623 +++
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f100xb.h | 962 ++--
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f100xe.h | 1032 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f101x6.h | 839 +---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f101xb.h | 847 +---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f101xe.h | 966 ++--
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f101xg.h | 1045 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f102x6.h | 1187 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f102xb.h | 1191 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f103x6.h | 1215 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f103xb.h | 1235 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f103xe.h | 1348 ++----
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f103xg.h | 1370 ++----
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f105xc.h | 989 ++--
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f107xc.h | 1135 ++---
ext/hal/st/stm32cube/stm32f1xx/soc/stm32f1xx.h | 12 +-
.../st/stm32cube/stm32f1xx/soc/system_stm32f1xx.c | 112 +-
.../st/stm32cube/stm32f1xx/soc/system_stm32f1xx.h | 10 +-
include/arch/arm/cortex_m/scripts/linker.ld | 35 +-
.../drivers/clock_control/stm32_clock_control.h | 2 -
.../drivers/clock_control/stm32f4_clock_control.h | 134 -
include/section_tags.h | 1 -
include/sections.h | 2 -
scripts/sanity_chk/arches/arm.ini | 3 +-
tests/kernel/xip/testcase.ini | 2 +-
337 files changed, 69436 insertions(+), 29054 deletions(-)
delete mode 100644 arch/arm/soc/st_stm32/stm32f4/rcc_registers.h
create mode 100644 arch/arm/soc/st_stm32/stm32l4/Kconfig.defconfig.stm32l475xg
delete mode 100644 arch/arm/soc/ti_lm3s6965/scp.c
delete mode 100644 arch/arm/soc/ti_lm3s6965/scp.h
create mode 100644 arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf
create mode 100644 boards/arm/cc3220sf_launchxl/Kconfig.board
create mode 100644 boards/arm/cc3220sf_launchxl/Kconfig.defconfig
create mode 100644 boards/arm/cc3220sf_launchxl/Makefile
create mode 100644 boards/arm/cc3220sf_launchxl/board.h
create mode 100644 boards/arm/cc3220sf_launchxl/cc3220sf_launchxl_defconfig
create mode 100644 boards/arm/cc3220sf_launchxl/dbghdr.c
create mode 100644 boards/arm/cc3220sf_launchxl/doc/cc3220sf_launchxl.rst
create mode 100644 boards/arm/cc3220sf_launchxl/pinmux.c
create mode 100644 boards/arm/cc3220sf_launchxl/support/CC3220SF.ccxml
create mode 100644 boards/arm/cc3220sf_launchxl/support/cc3220_xds110.cfg
create mode 100644 boards/arm/cc3220sf_launchxl/support/gdbinit_xds110
create mode 100644 boards/arm/disco_l475_iot1/Kconfig.board
create mode 100644 boards/arm/disco_l475_iot1/Kconfig.defconfig
create mode 100644 boards/arm/disco_l475_iot1/Makefile
create mode 100644 boards/arm/disco_l475_iot1/board.h
create mode 100644 boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig
create mode 100644 boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst
create mode 100644 boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg
create mode 100644 boards/arm/frdm_kl25z/Kconfig.board
create mode 100644 boards/arm/frdm_kl25z/Kconfig.defconfig
create mode 100644 boards/arm/frdm_kl25z/Makefile
create mode 100644 boards/arm/frdm_kl25z/board.h
create mode 100644 boards/arm/frdm_kl25z/doc/frdm_kl25z.jpg
create mode 100644 boards/arm/frdm_kl25z/doc/frdm_kl25z.rst
create mode 100644 boards/arm/frdm_kl25z/frdm_kl25z_defconfig
create mode 100644 boards/arm/frdm_kl25z/pinmux.c
delete mode 100644 drivers/clock_control/Kconfig.stm32f4x
delete mode 100644 drivers/clock_control/stm32f4x_clock.c
create mode 100644 drivers/clock_control/stm32f4x_ll_clock.c
create mode 100644 drivers/i2c/Kconfig.gpio
create mode 100644 drivers/i2c/i2c_bitbang.c
create mode 100644 drivers/i2c/i2c_bitbang.h
create mode 100644 drivers/i2c/i2c_gpio.c
create mode 100644 drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c
create mode 100644 drivers/serial/Kconfig.mcux_lpsci
create mode 100644 drivers/serial/uart_mcux_lpsci.c
delete mode 100644 drivers/serial/uart_stellaris.h
create mode 100644 dts/arm/96b_nitrogen.dts
create mode 100644 dts/arm/96b_nitrogen.fixup
create mode 100644 dts/arm/arduino_101_ble.dts
create mode 100644 dts/arm/arduino_101_ble.fixup
create mode 100644 dts/arm/bbc_microbit.dts
create mode 100644 dts/arm/bbc_microbit.fixup
create mode 100644 dts/arm/cc3220sf_launchxl.dts
create mode 100644 dts/arm/cc3220sf_launchxl.fixup
create mode 100644 dts/arm/curie_ble.dts
create mode 100644 dts/arm/curie_ble.fixup
create mode 100644 dts/arm/disco_l475_iot1.dts
create mode 100644 dts/arm/disco_l475_iot1.fixup
create mode 100644 dts/arm/frdm_kl25z.dts
create mode 100644 dts/arm/frdm_kl25z.fixup
create mode 100644 dts/arm/nordic/nrf51822.dtsi
create mode 100644 dts/arm/nordic/nrf52840.dtsi
create mode 100644 dts/arm/nrf51_blenano.dts
create mode 100644 dts/arm/nrf51_blenano.fixup
create mode 100644 dts/arm/nrf51_pca10028.dts
create mode 100644 dts/arm/nrf51_pca10028.fixup
create mode 100644 dts/arm/nrf52840_pca10056.dts
create mode 100644 dts/arm/nrf52840_pca10056.fixup
create mode 100644 dts/arm/nrf52_blenano2.dts
create mode 100644 dts/arm/nrf52_blenano2.fixup
create mode 100644 dts/arm/nrf52_pca10040.dts
create mode 100644 dts/arm/nrf52_pca10040.fixup
create mode 100644 dts/arm/nxp/nxp_kl25z.dtsi
create mode 100644 dts/arm/qemu_cortex_m3.dts
create mode 100644 dts/arm/qemu_cortex_m3.fixup
create mode 100644 dts/arm/quark_se_c1000_ble.dts
create mode 100644 dts/arm/quark_se_c1000_ble.fixup
create mode 100644 dts/arm/st/stm32l475.dtsi
rename dts/arm/ti/{cc32xx_launchxl.dtsi => cc32xx.dtsi} (78%)
create mode 100644 dts/arm/ti/lm3s6965.dtsi
create mode 100644 dts/arm/ti/mem.h
create mode 100644 dts/arm/yaml/nxp,kinetis-lpsci.yaml
create mode 100644 dts/arm/yaml/ti,stellaris-uart.yaml
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32_assert_template.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_mmc.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_adc.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_bus.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_cortex.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_crc.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_dac.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_dma.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_exti.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_gpio.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_i2c.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_iwdg.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_pwr.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_rcc.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_rtc.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_spi.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_system.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_tim.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_usart.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_utils.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_ll_wwdg.h
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_hal_mmc.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_hal_timebase_rtc_alarm_template.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_hal_timebase_tim_template.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_adc.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_crc.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_dac.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_dma.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_exti.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_gpio.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_i2c.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_pwr.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_rcc.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_rtc.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_spi.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_tim.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_usart.c
create mode 100644 ext/hal/st/stm32cube/stm32f1xx/drivers/src/stm32f1xx_ll_utils.c
delete mode 100644 include/drivers/clock_control/stm32f4_clock_control.h
Change-Id: I0a465f75ff94c33373c03951b4d7468476bc3b41
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Diffstat (limited to 'ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h')
| -rw-r--r-- | ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h | 259 |
1 files changed, 127 insertions, 132 deletions
diff --git a/ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h b/ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h index 460036fb9..3db12d7b5 100644 --- a/ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h +++ b/ext/hal/st/stm32cube/stm32f1xx/drivers/include/stm32f1xx_hal_dma.h @@ -2,13 +2,13 @@ ******************************************************************************
* @file stm32f1xx_hal_dma.h
* @author MCD Application Team
- * @version V1.0.4
- * @date 29-April-2016
+ * @version V1.1.0
+ * @date 14-April-2017
* @brief Header file of DMA HAL module.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -33,7 +33,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
- */
+ */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_DMA_H
@@ -52,15 +52,15 @@ /** @addtogroup DMA
* @{
- */
+ */
/* Exported types ------------------------------------------------------------*/
/** @defgroup DMA_Exported_Types DMA Exported Types
* @{
*/
-
-/**
+
+/**
* @brief DMA Configuration Structure definition
*/
typedef struct
@@ -71,58 +71,59 @@ typedef struct uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
-
+
uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
This parameter can be a value of @ref DMA_Memory_incremented_mode */
-
+
uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
This parameter can be a value of @ref DMA_Peripheral_data_size */
uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
This parameter can be a value of @ref DMA_Memory_data_size */
-
+
uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
This parameter can be a value of @ref DMA_mode
@note The circular buffer mode cannot be used if the memory-to-memory
- data transfer is configured on the selected Channel */
+ data transfer is configured on the selected Channel */
- uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
- This parameter can be a value of @ref DMA_Priority_level */
+ uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
+ This parameter can be a value of @ref DMA_Priority_level */
} DMA_InitTypeDef;
-/**
- * @brief DMA Configuration enumeration values definition
- */
-typedef enum
-{
- DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
- DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
-
-} DMA_ControlTypeDef;
-
/**
- * @brief HAL DMA State structures definition
+ * @brief HAL DMA State structures definition
*/
typedef enum
{
- HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
- HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */
- HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
- HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
- HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
- HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
+ HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
+ HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
+ HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
+ HAL_DMA_STATE_TIMEOUT = 0x03U /*!< DMA timeout state */
}HAL_DMA_StateTypeDef;
-/**
+/**
* @brief HAL DMA Error Code structure definition
*/
typedef enum
{
- HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
- HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
+ HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
+ HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */
}HAL_DMA_LevelCompleteTypeDef;
/**
+ * @brief HAL DMA Callback ID structure definition
+ */
+typedef enum
+{
+ HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */
+ HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half transfer */
+ HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */
+ HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */
+ HAL_DMA_XFER_ALL_CB_ID = 0x04U /*!< All */
+
+}HAL_DMA_CallbackIDTypeDef;
+
+/**
* @brief DMA handle Structure definition
*/
typedef struct __DMA_HandleTypeDef
@@ -142,8 +143,15 @@ typedef struct __DMA_HandleTypeDef void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
+
+ void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
__IO uint32_t ErrorCode; /*!< DMA Error code */
+
+ DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */
+
+ uint32_t ChannelIndex; /*!< DMA Channel Index */
+
} DMA_HandleTypeDef;
/**
* @}
@@ -158,18 +166,19 @@ typedef struct __DMA_HandleTypeDef /** @defgroup DMA_Error_Code DMA Error Code
* @{
*/
- #define HAL_DMA_ERROR_NONE ((uint32_t)0x00) /*!< No error */
- #define HAL_DMA_ERROR_TE ((uint32_t)0x01) /*!< Transfer error */
- #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x20) /*!< Timeout error */
-
+#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
+#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
+#define HAL_DMA_ERROR_NO_XFER 0x00000004U /*!< no ongoing transfer */
+#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
+#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
/**
* @}
*/
/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
* @{
- */
-#define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
+ */
+#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */
@@ -179,46 +188,46 @@ typedef struct __DMA_HandleTypeDef /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
* @{
- */
-#define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
-#define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
+ */
+#define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
+#define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode Disable */
/**
* @}
- */
+ */
/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
* @{
- */
-#define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
-#define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
+ */
+#define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
+#define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode Disable */
/**
* @}
*/
/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
* @{
- */
-#define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment: Byte */
-#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
-#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment: Word */
+ */
+#define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment: Byte */
+#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
+#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment: Word */
/**
* @}
- */
+ */
/** @defgroup DMA_Memory_data_size DMA Memory data size
- * @{
+ * @{
*/
-#define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment: Byte */
-#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
-#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment: Word */
+#define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment: Byte */
+#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
+#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment: Word */
/**
* @}
*/
/** @defgroup DMA_mode DMA mode
* @{
- */
-#define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
+ */
+#define DMA_NORMAL 0x00000000U /*!< Normal mode */
#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */
/**
* @}
@@ -227,13 +236,13 @@ typedef struct __DMA_HandleTypeDef /** @defgroup DMA_Priority_level DMA Priority level
* @{
*/
-#define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
-#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
-#define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
-#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
+#define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
+#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
+#define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
+#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
/**
* @}
- */
+ */
/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
@@ -248,35 +257,35 @@ typedef struct __DMA_HandleTypeDef /** @defgroup DMA_flag_definitions DMA flag definitions
* @{
- */
-#define DMA_FLAG_GL1 ((uint32_t)0x00000001)
-#define DMA_FLAG_TC1 ((uint32_t)0x00000002)
-#define DMA_FLAG_HT1 ((uint32_t)0x00000004)
-#define DMA_FLAG_TE1 ((uint32_t)0x00000008)
-#define DMA_FLAG_GL2 ((uint32_t)0x00000010)
-#define DMA_FLAG_TC2 ((uint32_t)0x00000020)
-#define DMA_FLAG_HT2 ((uint32_t)0x00000040)
-#define DMA_FLAG_TE2 ((uint32_t)0x00000080)
-#define DMA_FLAG_GL3 ((uint32_t)0x00000100)
-#define DMA_FLAG_TC3 ((uint32_t)0x00000200)
-#define DMA_FLAG_HT3 ((uint32_t)0x00000400)
-#define DMA_FLAG_TE3 ((uint32_t)0x00000800)
-#define DMA_FLAG_GL4 ((uint32_t)0x00001000)
-#define DMA_FLAG_TC4 ((uint32_t)0x00002000)
-#define DMA_FLAG_HT4 ((uint32_t)0x00004000)
-#define DMA_FLAG_TE4 ((uint32_t)0x00008000)
-#define DMA_FLAG_GL5 ((uint32_t)0x00010000)
-#define DMA_FLAG_TC5 ((uint32_t)0x00020000)
-#define DMA_FLAG_HT5 ((uint32_t)0x00040000)
-#define DMA_FLAG_TE5 ((uint32_t)0x00080000)
-#define DMA_FLAG_GL6 ((uint32_t)0x00100000)
-#define DMA_FLAG_TC6 ((uint32_t)0x00200000)
-#define DMA_FLAG_HT6 ((uint32_t)0x00400000)
-#define DMA_FLAG_TE6 ((uint32_t)0x00800000)
-#define DMA_FLAG_GL7 ((uint32_t)0x01000000)
-#define DMA_FLAG_TC7 ((uint32_t)0x02000000)
-#define DMA_FLAG_HT7 ((uint32_t)0x04000000)
-#define DMA_FLAG_TE7 ((uint32_t)0x08000000)
+ */
+#define DMA_FLAG_GL1 0x00000001U
+#define DMA_FLAG_TC1 0x00000002U
+#define DMA_FLAG_HT1 0x00000004U
+#define DMA_FLAG_TE1 0x00000008U
+#define DMA_FLAG_GL2 0x00000010U
+#define DMA_FLAG_TC2 0x00000020U
+#define DMA_FLAG_HT2 0x00000040U
+#define DMA_FLAG_TE2 0x00000080U
+#define DMA_FLAG_GL3 0x00000100U
+#define DMA_FLAG_TC3 0x00000200U
+#define DMA_FLAG_HT3 0x00000400U
+#define DMA_FLAG_TE3 0x00000800U
+#define DMA_FLAG_GL4 0x00001000U
+#define DMA_FLAG_TC4 0x00002000U
+#define DMA_FLAG_HT4 0x00004000U
+#define DMA_FLAG_TE4 0x00008000U
+#define DMA_FLAG_GL5 0x00010000U
+#define DMA_FLAG_TC5 0x00020000U
+#define DMA_FLAG_HT5 0x00040000U
+#define DMA_FLAG_TE5 0x00080000U
+#define DMA_FLAG_GL6 0x00100000U
+#define DMA_FLAG_TC6 0x00200000U
+#define DMA_FLAG_HT6 0x00400000U
+#define DMA_FLAG_TE6 0x00800000U
+#define DMA_FLAG_GL7 0x01000000U
+#define DMA_FLAG_TC7 0x02000000U
+#define DMA_FLAG_HT7 0x04000000U
+#define DMA_FLAG_TE7 0x08000000U
/**
* @}
*/
@@ -284,15 +293,15 @@ typedef struct __DMA_HandleTypeDef /**
* @}
*/
-
-/* Exported macro ------------------------------------------------------------*/
+
+/* Exported macros -----------------------------------------------------------*/
/** @defgroup DMA_Exported_Macros DMA Exported Macros
* @{
*/
-/** @brief Reset DMA handle state
- * @param __HANDLE__: DMA handle.
+/** @brief Reset DMA handle state.
+ * @param __HANDLE__: DMA handle
* @retval None
*/
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
@@ -300,14 +309,14 @@ typedef struct __DMA_HandleTypeDef /**
* @brief Enable the specified DMA Channel.
* @param __HANDLE__: DMA handle
- * @retval None.
+ * @retval None
*/
#define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
/**
* @brief Disable the specified DMA Channel.
* @param __HANDLE__: DMA handle
- * @retval None.
+ * @retval None
*/
#define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
@@ -317,7 +326,7 @@ typedef struct __DMA_HandleTypeDef /**
* @brief Enables the specified DMA Channel interrupts.
* @param __HANDLE__: DMA handle
- * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer complete interrupt mask
@@ -327,9 +336,9 @@ typedef struct __DMA_HandleTypeDef #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
/**
- * @brief Disables the specified DMA Channel interrupts.
+ * @brief Disable the specified DMA Channel interrupts.
* @param __HANDLE__: DMA handle
- * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer complete interrupt mask
@@ -339,7 +348,7 @@ typedef struct __DMA_HandleTypeDef #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
/**
- * @brief Checks whether the specified DMA Channel interrupt is enabled or disabled.
+ * @brief Check whether the specified DMA Channel interrupt is enabled or not.
* @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt source to check.
* This parameter can be one of the following values:
@@ -351,9 +360,8 @@ typedef struct __DMA_HandleTypeDef #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/**
- * @brief Returns the number of remaining data units in the current DMAy Channelx transfer.
+ * @brief Return the number of remaining data units in the current DMA Channel transfer.
* @param __HANDLE__: DMA handle
- *
* @retval The number of remaining data units in the current DMA Channel transfer.
*/
#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
@@ -366,11 +374,11 @@ typedef struct __DMA_HandleTypeDef #include "stm32f1xx_hal_dma_ex.h"
/* Exported functions --------------------------------------------------------*/
-/** @addtogroup DMA_Exported_Functions DMA Exported Functions
+/** @addtogroup DMA_Exported_Functions
* @{
*/
-/** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
+/** @addtogroup DMA_Exported_Functions_Group1
* @{
*/
/* Initialization and de-initialization functions *****************************/
@@ -380,25 +388,29 @@ HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); * @}
*/
-/** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions
+/** @addtogroup DMA_Exported_Functions_Group2
* @{
*/
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
+void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
+HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
+
/**
* @}
*/
-/** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions
+/** @addtogroup DMA_Exported_Functions_Group3
* @{
*/
/* Peripheral State and Error functions ***************************************/
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
+uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
/**
* @}
*/
@@ -407,26 +419,16 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); * @}
*/
-/* Private Constants -------------------------------------------------------------*/
-/** @defgroup DMA_Private_Constants DMA Private Constants
- * @brief DMA private defines and constants
- * @{
- */
-/**
- * @}
- */
-
/* Private macros ------------------------------------------------------------*/
/** @defgroup DMA_Private_Macros DMA Private Macros
- * @brief DMA private macros
* @{
*/
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
-
#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
- ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
+ ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
+
+#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
((STATE) == DMA_PINC_DISABLE))
@@ -443,29 +445,22 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); ((SIZE) == DMA_MDATAALIGN_WORD ))
#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
- ((MODE) == DMA_CIRCULAR))
+ ((MODE) == DMA_CIRCULAR))
#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
((PRIORITY) == DMA_PRIORITY_HIGH) || \
- ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
+ ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
-/** @defgroup DMA_Private_Functions DMA Private Functions
- * @brief DMA private functions
- * @{
- */
-/**
- * @}
- */
/**
* @}
- */
+ */
/**
* @}
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