diff options
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci.c | 22 | ||||
| -rw-r--r-- | drivers/pci/pci_config.c | 186 | ||||
| -rw-r--r-- | drivers/pci/pci_interface.c | 302 |
3 files changed, 255 insertions, 255 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index d86e7e3c2..5e7630521 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -113,7 +113,7 @@ where to start a loop on these classes. Thus, a subsequent pci scan looking for class y will directly start at the relevant bus and device instead of restarting from 0. -*/ + */ #include <nanokernel.h> #include <arch/cpu.h> @@ -167,12 +167,12 @@ struct lookup_data { static struct bus_dev class_bd[PCI_CLASS_MAX] = {}; static struct lookup_data __noinit lookup; -/****************************************************************************** -* -* pci_get_bar_config - return the configuration for the specified BAR -* -* RETURNS: 0 if BAR is implemented, -1 if not. -*/ +/** + * + * pci_get_bar_config - return the configuration for the specified BAR + * + * RETURNS: 0 if BAR is implemented, -1 if not. + */ static inline int pci_bar_config_get(union pci_addr_reg pci_ctrl_addr, uint32_t *config) @@ -212,7 +212,7 @@ static inline int pci_bar_config_get(union pci_addr_reg pci_ctrl_addr, return -1; } -/****************************************************************************** +/** * * pci_bar_params_get - retrieve the I/O address and IRQ of the specified BAR * @@ -263,7 +263,7 @@ static inline int pci_bar_params_get(union pci_addr_reg pci_ctrl_addr, return 0; } -/****************************************************************************** +/** * * pci_dev_scan - scan the specified PCI device for all sub functions * @@ -374,7 +374,7 @@ void pci_bus_scan_init(void) lookup.bar = 0; } -/****************************************************************************** +/** * * pci_bus_scan - scans PCI bus for devices * @@ -428,7 +428,7 @@ int pci_bus_scan(struct pci_dev_info *dev_info) } #ifdef CONFIG_PCI_DEBUG -/****************************************************************************** +/** * * pci_show - Show PCI device * diff --git a/drivers/pci/pci_config.c b/drivers/pci/pci_config.c index 0f59bf182..2d46dcc7b 100644 --- a/drivers/pci/pci_config.c +++ b/drivers/pci/pci_config.c @@ -35,7 +35,7 @@ DESCRIPTION This module implements the PCI config space access functions -*/ + */ #include <nanokernel.h> #include <arch/cpu.h> @@ -52,18 +52,18 @@ This module implements the PCI config space access functions } while (0) #endif -/******************************************************************************* -* -* pci_config_out_long - write a 32bit data to pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number -* @param func_no Function number -* @param offset Offset into the configuration space. -* @param data Data written to the offset. -* -* RETURNS: N/A -*/ +/** + * + * pci_config_out_long - write a 32bit data to pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number + * @param func_no Function number + * @param offset Offset into the configuration space. + * @param data Data written to the offset. + * + * RETURNS: N/A + */ void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint32_t data) { @@ -82,18 +82,18 @@ void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no, pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data); } -/******************************************************************************* -* -* pci_config_out_word - write a 16bit data to pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number. -* @param func_no Function number. -* @param offset Offset into the configuration space. -* @param data Data written to the offset. -* -* RETURNS: N/A -*/ +/** + * + * pci_config_out_word - write a 16bit data to pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number. + * @param func_no Function number. + * @param offset Offset into the configuration space. + * @param data Data written to the offset. + * + * RETURNS: N/A + */ void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint16_t data) { @@ -112,18 +112,18 @@ void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no, pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint16_t), data); } -/******************************************************************************* -* -* pci_config_out_byte - write a 8bit data to pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number. -* @param func_no Function number. -* @param offset Offset into the configuration space. -* @param data Data written to the offset. -* -* RETURNS: N/A -*/ +/** + * + * pci_config_out_byte - write a 8bit data to pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number. + * @param func_no Function number. + * @param offset Offset into the configuration space. + * @param data Data written to the offset. + * + * RETURNS: N/A + */ void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint8_t data) { @@ -142,19 +142,19 @@ void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no, pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint8_t), data); } -/******************************************************************************* -* -* pci_config_in_long - read a 32bit data from pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number. -* @param func_no Function number. -* @param offset Offset into the configuration space. -* @param data Data read from the offset. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_config_in_long - read a 32bit data from pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number. + * @param func_no Function number. + * @param offset Offset into the configuration space. + * @param data Data read from the offset. + * + * RETURNS: N/A + * + */ void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint32_t *data) { @@ -173,19 +173,19 @@ void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no, pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data); } -/******************************************************************************* -* -* pci_config_in_word - read in a 16bit data from a pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number. -* @param func_no Function number. -* @param offset Offset into the configuration space. -* @param data Data read from the offset. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_config_in_word - read in a 16bit data from a pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number. + * @param func_no Function number. + * @param offset Offset into the configuration space. + * @param data Data read from the offset. + * + * RETURNS: N/A + * + */ void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint16_t *data) @@ -210,19 +210,19 @@ void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no, *data = (uint16_t)pci_data; } -/******************************************************************************* -* -* pci_config_in_byte - read in a 8bit data from a pci reg in offset -* -* @param bus_no Bus number. -* @param device_no Device number. -* @param func_no Function number. -* @param offset Offset into the configuration space. -* @param data Data read from the offset. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_config_in_byte - read in a 8bit data from a pci reg in offset + * + * @param bus_no Bus number. + * @param device_no Device number. + * @param func_no Function number. + * @param offset Offset into the configuration space. + * @param data Data read from the offset. + * + * RETURNS: N/A + * + */ void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no, uint32_t offset, uint8_t *data) @@ -247,23 +247,23 @@ void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no, *data = (uint8_t)pci_data; } -/******************************************************************************* -* -* pci_config_ext_cap_ptr_find - find extended capability in ECP linked list -* -* This routine searches for an extended capability in the linked list of -* capabilities in config space. If found, the offset of the first byte -* of the capability of interest in config space is returned via pOffset. -* -* @param ext_cap_find_id Extended capabilities ID to search for. -* @param bus PCI bus number. -* @param device PCI device number. -* @param function PCI function number. -* @param p_offset Returned config space offset. -* -* RETURNS: 0 if Extended Capability found, -1 otherwise -* -*/ +/** + * + * pci_config_ext_cap_ptr_find - find extended capability in ECP linked list + * + * This routine searches for an extended capability in the linked list of + * capabilities in config space. If found, the offset of the first byte + * of the capability of interest in config space is returned via pOffset. + * + * @param ext_cap_find_id Extended capabilities ID to search for. + * @param bus PCI bus number. + * @param device PCI device number. + * @param function PCI function number. + * @param p_offset Returned config space offset. + * + * RETURNS: 0 if Extended Capability found, -1 otherwise + * + */ int pci_config_ext_cap_ptr_find(uint8_t ext_cap_find_id, uint32_t bus, uint32_t device, uint32_t function, diff --git a/drivers/pci/pci_interface.c b/drivers/pci/pci_interface.c index 0b2ee1f63..97430de6e 100644 --- a/drivers/pci/pci_interface.c +++ b/drivers/pci/pci_interface.c @@ -35,7 +35,7 @@ DESCRIPTION This module implements the PCI H/W access functions. -*/ + */ #include <nanokernel.h> #include <arch/cpu.h> @@ -52,16 +52,16 @@ This module implements the PCI H/W access functions. #error "PCI_CTRL_DATA_REG cannot be zero" #endif -/****************************************************************************** -* -* pci_ctrl_read - read a PCI controller register -* -* This routine reads the specified register from the PCI controller and -* places the data into the provided buffer. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_ctrl_read - read a PCI controller register + * + * This routine reads the specified register from the PCI controller and + * places the data into the provided buffer. + * + * RETURNS: N/A + * + */ static void pci_ctrl_read(uint32_t reg, /* PCI register to read */ uint32_t *data, /* where to put the data */ @@ -86,16 +86,16 @@ static void pci_ctrl_read(uint32_t reg, /* PCI register to read */ } } -/****************************************************************************** -* -* pci_ctrl_write - write a PCI controller register -* -* This routine writes the provided data to the specified register in the PCI -* controller. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_ctrl_write - write a PCI controller register + * + * This routine writes the provided data to the specified register in the PCI + * controller. + * + * RETURNS: N/A + * + */ static void pci_ctrl_write(uint32_t reg, /* PCI register to write */ uint32_t data, /* data to write */ @@ -121,15 +121,15 @@ static void pci_ctrl_write(uint32_t reg, /* PCI register to write */ } } -/****************************************************************************** -* -* pci_ctrl_data_read - read the PCI controller data register -* -* This routine reads the data register of the specified PCI controller. -* -* RETURNS: 0 or -1 -* -*/ +/** + * + * pci_ctrl_data_read - read the PCI controller data register + * + * This routine reads the data register of the specified PCI controller. + * + * RETURNS: 0 or -1 + * + */ static int pci_ctrl_data_read(uint32_t controller, /* controller number */ uint32_t offset, /* offset within data region */ @@ -147,16 +147,16 @@ static int pci_ctrl_data_read(uint32_t controller, /* controller number */ return 0; } -/****************************************************************************** -* -* pci_ctrl_data_write - write the PCI controller data register -* -* This routine writes the provided data to the data register of the -* specified PCI controller. -* -* RETURNS: 0 or -1 -* -*/ +/** + * + * pci_ctrl_data_write - write the PCI controller data register + * + * This routine writes the provided data to the data register of the + * specified PCI controller. + * + * RETURNS: 0 or -1 + * + */ static int pci_ctrl_data_write(uint32_t controller, /* controller number */ uint32_t offset, /* offset within address register */ @@ -174,16 +174,16 @@ static int pci_ctrl_data_write(uint32_t controller, /* controller number */ return 0; } -/****************************************************************************** -* -* pci_ctrl_addr_write - write the PCI controller address register -* -* This routine writes the provided data to the address register of the -* specified PCI controller. -* -* RETURNS: 0 or -1 -* -*/ +/** + * + * pci_ctrl_addr_write - write the PCI controller address register + * + * This routine writes the provided data to the address register of the + * specified PCI controller. + * + * RETURNS: 0 or -1 + * + */ static int pci_ctrl_addr_write(uint32_t controller, /* controller number */ uint32_t offset, /* offset within address register */ @@ -200,52 +200,52 @@ static int pci_ctrl_addr_write(uint32_t controller, /* controller number */ return 0; } -/******************************************************************************* -* -* pci_read - read a PCI register from a device -* -* This routine reads data from a PCI device's configuration space. The -* device and register to read is specified by the address parameter ("addr") -* and must be set appropriately by the caller. The address is defined by -* the structure type pci_addr_t and contains the following members: -* -* bus: PCI bus number (0-255) -* device: PCI device number (0-31) -* func: device function number (0-7) -* reg: device 32-bit register number to read (0-63) -* offset: offset within 32-bit register to read (0-3) -* -* The size parameter specifies the number of bytes to read from the PCI -* configuration space, valid values are 1, 2, and 4 bytes. A 32-bit value -* is always returned but it will contain only the number of bytes specified -* by the size parameter. -* -* If multiple PCI controllers are present in the system, the controller id -* can be specified in the "controller" parameter. If only one controller -* is present, the id DEFAULT_PCI_CONTROLLER can be used to denote this -* controller. -* -* Example: -* -* union pci_addr_reg addr; -* uint32_t status; -* -* addr.field.bus = 0; /@ PCI bus zero @/ -* addr.field.device = 1; /@ PCI device one @/ -* addr.field.func = 0; /@ PCI function zero @/ -* addr.field.reg = 4; /@ PCI register 4 @/ -* addr.field.offset = 0; /@ PCI register offset @/ -* -* pci_read (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint16_t), &status); -* -* -* NOTE: -* Reading of PCI data must be performed as an atomic operation. It is up to -* the caller to enforce this. -* -* RETURNS: N/A -* -*/ +/** + * + * pci_read - read a PCI register from a device + * + * This routine reads data from a PCI device's configuration space. The + * device and register to read is specified by the address parameter ("addr") + * and must be set appropriately by the caller. The address is defined by + * the structure type pci_addr_t and contains the following members: + * + * bus: PCI bus number (0-255) + * device: PCI device number (0-31) + * func: device function number (0-7) + * reg: device 32-bit register number to read (0-63) + * offset: offset within 32-bit register to read (0-3) + * + * The size parameter specifies the number of bytes to read from the PCI + * configuration space, valid values are 1, 2, and 4 bytes. A 32-bit value + * is always returned but it will contain only the number of bytes specified + * by the size parameter. + * + * If multiple PCI controllers are present in the system, the controller id + * can be specified in the "controller" parameter. If only one controller + * is present, the id DEFAULT_PCI_CONTROLLER can be used to denote this + * controller. + * + * Example: + * + * union pci_addr_reg addr; + * uint32_t status; + * + * addr.field.bus = 0; /@ PCI bus zero @/ + * addr.field.device = 1; /@ PCI device one @/ + * addr.field.func = 0; /@ PCI function zero @/ + * addr.field.reg = 4; /@ PCI register 4 @/ + * addr.field.offset = 0; /@ PCI register offset @/ + * + * pci_read (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint16_t), &status); + * + * + * NOTE: + * Reading of PCI data must be performed as an atomic operation. It is up to + * the caller to enforce this. + * + * RETURNS: N/A + * + */ void pci_read(uint32_t controller, /* PCI controller to use */ union pci_addr_reg addr, /* PCI address to read */ @@ -290,52 +290,52 @@ void pci_read(uint32_t controller, /* PCI controller to use */ pci_ctrl_data_read(controller, access_offset, data, access_size); } -/******************************************************************************* -* -* pci_write - write a to a PCI register -* -* This routine writes data to a PCI device's configuration space. The -* device and register to write is specified by the address parameter ("addr") -* and must be set appropriately by the caller. The address is defined by -* the structure type pci_addr_t and contains the following members: -* -* bus: PCI bus number (0-255) -* device: PCI device number (0-31) -* func: device function number (0-7) -* reg: device register number to read (0-63) -* offset: offset within 32-bit register to write (0-3) -* -* The size parameter specifies the number of bytes to write to the PCI -* configuration space, valid values are 1, 2, and 4 bytes. A 32-bit value -* is always provided but only the number of bytes specified by the size -* parameter will be written to the device. -* -* If multiple PCI controllers are present in the system, the controller id -* can be specified in the "controller" parameter. If only one controller -* is present, the id DEFAULT_PCI_CONTROLLER can be used to denote this -* controller. -* -* Example: -* -* pci_addr_t addr; -* uint32_t bar0 = 0xE0000000; -* -* addr.field.bus = 0; /@ PCI bus zero @/ -* addr.field.device = 1; /@ PCI device one @/ -* addr.field.func = 0; /@ PCI function zero @/ -* addr.field.reg = 16; /@ PCI register 16 @/ -* addr.field.offset = 0; /@ PCI register offset @/ -* -* pci_write (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint32_t), bar0); -* -* NOTE: -* Writing of PCI data must be performed as an atomic operation. It is up to -* the caller to enforce this. -* -* -* RETURNS: N/A -* -*/ +/** + * + * pci_write - write a to a PCI register + * + * This routine writes data to a PCI device's configuration space. The + * device and register to write is specified by the address parameter ("addr") + * and must be set appropriately by the caller. The address is defined by + * the structure type pci_addr_t and contains the following members: + * + * bus: PCI bus number (0-255) + * device: PCI device number (0-31) + * func: device function number (0-7) + * reg: device register number to read (0-63) + * offset: offset within 32-bit register to write (0-3) + * + * The size parameter specifies the number of bytes to write to the PCI + * configuration space, valid values are 1, 2, and 4 bytes. A 32-bit value + * is always provided but only the number of bytes specified by the size + * parameter will be written to the device. + * + * If multiple PCI controllers are present in the system, the controller id + * can be specified in the "controller" parameter. If only one controller + * is present, the id DEFAULT_PCI_CONTROLLER can be used to denote this + * controller. + * + * Example: + * + * pci_addr_t addr; + * uint32_t bar0 = 0xE0000000; + * + * addr.field.bus = 0; /@ PCI bus zero @/ + * addr.field.device = 1; /@ PCI device one @/ + * addr.field.func = 0; /@ PCI function zero @/ + * addr.field.reg = 16; /@ PCI register 16 @/ + * addr.field.offset = 0; /@ PCI register offset @/ + * + * pci_write (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint32_t), bar0); + * + * NOTE: + * Writing of PCI data must be performed as an atomic operation. It is up to + * the caller to enforce this. + * + * + * RETURNS: N/A + * + */ void pci_write(uint32_t controller, /* controller to use */ union pci_addr_reg addr, /* PCI address to read */ @@ -379,15 +379,15 @@ void pci_write(uint32_t controller, /* controller to use */ pci_ctrl_data_write(controller, access_offset, data, access_size); } -/******************************************************************************* -* -* pci_header_get - get the PCI header for a device -* -* This routine reads the PCI header for the specified device and puts the -* result in the supplied header structure. -* -* RETURNS: N/A -*/ +/** + * + * pci_header_get - get the PCI header for a device + * + * This routine reads the PCI header for the specified device and puts the + * result in the supplied header structure. + * + * RETURNS: N/A + */ void pci_header_get(uint32_t controller, union pci_addr_reg pci_ctrl_addr, |