diff options
| author | Zhangfei Gao <zhangfei.gao@linaro.org> | 2013-03-19 14:52:32 +0800 |
|---|---|---|
| committer | Zhangfei Gao <zhangfei.gao@linaro.org> | 2013-03-19 14:52:32 +0800 |
| commit | fb1be4799a98e158e316d3caf07c459ef0ac6438 (patch) | |
| tree | 47cab173e981334e3f905e039fd277950b7baf32 /drivers | |
| parent | e048346955a2661d5f8fedd5840df45df1ec9ff0 (diff) | |
mmc: dw-mmc-hisilicon add workaround
to be reverted
Since clk driver still can not choose parent accordingly, add testsdclk and
access register directly for simplicity
The patch can be reverted if clk driver is enhanced
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/host/dw_mmc-hisilicon.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/drivers/mmc/host/dw_mmc-hisilicon.c b/drivers/mmc/host/dw_mmc-hisilicon.c index 173527ef9ce..29c4f380685 100644 --- a/drivers/mmc/host/dw_mmc-hisilicon.c +++ b/drivers/mmc/host/dw_mmc-hisilicon.c @@ -186,16 +186,31 @@ static void dw_mci_hs_set_timing(int idx, int sam, int drv, int div) spin_unlock_irqrestore(&mmc_tuning_lock, flags); } +extern void __iomem *hs_sctrl_base; static void dw_mci_hs_tun(struct dw_mci *host, int id, int index) { - int ret; + int input_clk = hs_tuning_config[id][index][0]; + int rate = 0; if (!pctrl) return; - ret = clk_set_rate(host->ciu_clk, hs_tuning_config[id][index][0]); - if (ret) - dev_err(host->dev, "clk_set_rate failed\n"); + if (id == 0) { + rate = 1440000000/input_clk - 1; + /* sd choose pll2 */ + writel(0x1f<<16 | rate, hs_sctrl_base + 0x108); + } else if (id == 1) { + if (input_clk == 26000000) { + rate = 26000000/input_clk - 1; + writel(((0x7E0<<16) | (0x0<<9) | (rate<<5)), + hs_sctrl_base + 0x108); + } else { + rate = 1440000000/input_clk - 1; + /* emmc choose pll2 */ + writel(((0x7E0<<16) | (0x2<<9) | (rate<<5)), + hs_sctrl_base + 0x108); + } + } dw_mci_hs_set_timing(id, (hs_tuning_config[id][index][3] + |