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/*
* Hisilicon NAND Flash controller driver
*
* Copyright © 2012-2013 HiSilicon Technologies Co., Ltd.
* http://www.hisilicon.com
* Copyright © 2012-2013 Linaro Ltd.
* http://www.linaro.org
*
* Author: Mingjun Zhang <zhang.mingjun@linaro.org>
* The initial developer of the original code is Zhiyong Cai
* <caizhiyong@huawei.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/sizes.h>
#include "hinfc_common.h"
/*****************************************************************************/
#define SZ_768K (SZ_256K + SZ_512K)
#define SZ_4G (0x100000000ULL)
#define SZ_8G (0x200000000ULL)
#define SZ_16G (0x400000000ULL)
#define SZ_64G (0x1000000000ULL)
/*****************************************************************************/
struct nand_flash_special_dev {
unsigned char id[8];
int length; /* length of id. */
unsigned long long chipsize;
char *name;
unsigned long pagesize;
unsigned long erasesize;
unsigned long oobsize;
unsigned long options;
int read_retry_type;
};
/*****************************************************************************/
/*
* samsung: 27nm need randomizer, 21nm need read retry;
* micron: 25nm need read retry, datasheet will explain read retry.
* toshaba 32nm need randomizer, 24nm need read retry.
* hynix: 2xnm need read retry.
*/
static struct nand_flash_special_dev nand_flash_special_dev[] = {
/* 1st 2nd 3rd 4th 5th 6th 7th 8th len chipsize(B)
device pagesize erasesize oobsize options */
/* Micron */
{ {0x2C, 0x64, 0x44, 0x4B, 0xA9, 0x00, 0x00, 0x00}, 8, SZ_8G,
"MT29F64G08CBABA", SZ_8K, SZ_2M, 744, 0, NAND_RR_MICRON},
{ {0x2C, 0x38, 0x00, 0x26, 0x85, 0x00, 0x00, 0x00}, 8, SZ_1G,
"MT29F8G08ABxBA", SZ_4K, SZ_512K, 224, 0, NAND_RR_NONE},
{ {0x2C, 0x48, 0x04, 0x46, 0x85, 0x00, 0x00, 0x00}, 8, SZ_2G,
"MT29F16G08CBABx", SZ_4K, SZ_1M, 224, 0, NAND_RR_NONE},
{ {0x2C, 0x48, 0x04, 0x4A, 0xA5, 0x00, 0x00, 0x00}, 8, SZ_2G,
"MT29F16G08CBACA", SZ_4K, SZ_1M, 224, 0, NAND_RR_NONE},
{ {0x2C, 0x68, 0x04, 0x4A, 0xA9, 0x00, 0x00, 0x00}, 8, SZ_4G,
"MT29F32G08CBACA", SZ_4K, SZ_1M, 224, 0, NAND_RR_NONE},
{ {0x2C, 0x88, 0x04, 0x4B, 0xA9, 0x00, 0x00, 0x00}, 8, SZ_8G,
"MT29F64G08CxxAA", SZ_8K, SZ_2M, 448, 0, NAND_RR_NONE},
{ {0x2C, 0xA8, 0x05, 0xCB, 0xA9, 0x00, 0x00, 0x00}, 8, SZ_16G,
"MT29F256G08CJAAA", SZ_8K, SZ_2M, 448, 0, NAND_RR_NONE},
{ {0x2C, 0x48, 0x00, 0x26, 0xA9, 0x00, 0x00, 0x00}, 5, SZ_2G,
"MT29F16G08ABACA", SZ_4K, SZ_512K, 224, 0, NAND_RR_NONE},
/* Toshiba */
{ {0x98, 0xD5, 0x94, 0x32, 0x76, 0x55, 0x00, 0x00}, 6, SZ_2G,
"TC58NVG4D2FTA00", SZ_8K, SZ_1M, 448, 0, NAND_RR_NONE},
{ {0x98, 0xD7, 0x94, 0x32, 0x76, 0x55, 0x00, 0x00}, 6, SZ_8G,
"TH58NVG6D2FTA20", SZ_8K, SZ_1M, 448, 0, NAND_RR_NONE},
{ {0x98, 0xD7, 0x94, 0x32, 0x76, 0x56, 0x08, 0x00}, 6, SZ_4G,
"TC58NVG5D2HTA00 24nm", SZ_8K, SZ_1M, 640, 0,
NAND_RR_TOSHIBA_24nm},
{ {0x98, 0xDE, 0x94, 0x82, 0x76, 0x00, 0x00, 0x00}, 5, SZ_8G,
"TC58NVG6D2GTA00", SZ_8K, SZ_2M, 640, 0,
NAND_RR_NONE},
{ {0x98, 0xDE, 0x84, 0x93, 0x72, 0x57, 0x08, 0x04}, 8, SZ_8G,
"TC58NVG6DCJTA00 19nm", SZ_16K, SZ_4M, 1280, 0,
NAND_RR_TOSHIBA_24nm},
{ {0x98, 0xD7, 0x84, 0x93, 0x72, 0x57, 0x08, 0x04}, 6, SZ_4G,
"TC58TEG5DCJTA00 19nm", SZ_16K, SZ_4M, 1280, 0,
NAND_RR_TOSHIBA_24nm},
{ {0x98, 0xF1, 0x80, 0x15, 0x72, 0x00, 0x00, 0x00}, 5, SZ_128M,
"TC58NVG0S3HTA00", SZ_2K, SZ_128K, 128, 0, NAND_RR_NONE},
{ {0x98, 0xD7, 0x98, 0x92, 0x72, 0x57, 0x08, 0x10}, 6, SZ_4G,
"TC58NVG5T2JTA00 19nm TLC", SZ_8K, SZ_4M, 1024, 0,
NAND_RR_TOSHIBA_24nm}, /* 60bit/1K */
/* Samsung K9xxG08UxD: K9LBG08U0D / K9HCG08U1D / K9XDG08U5D */
{ {0xEC, 0xD7, 0x94, 0x7A, 0x54, 0x43, 0x00, 0x00}, 6, SZ_4G,
"K9GBG08U0A 20nm", SZ_8K, SZ_1M, 640, 0,
NAND_RR_SAMSUNG},/* 24bit1k */
{ {0xEC, 0xD7, 0x94, 0x7E, 0x64, 0x44, 0x00, 0x00}, 6, SZ_4G,
"K9GBG08U0B", SZ_8K, SZ_1M, 1024, 0, NAND_RR_SAMSUNG},
/* Hynix */
{ {0xAD, 0xD7, 0x94, 0x91, 0x60, 0x44, 0x00, 0x00}, 6, SZ_4G,
"H27UBG8T2C", SZ_8K, SZ_2M, 640, 0, NAND_RR_HYNIX},
/* MIRA */
{ {0xC8, 0xD5, 0x14, 0x29, 0x34, 0x01, 0x00, 0x00}, 6, SZ_2G,
"P1UAGA30AT-GCA", SZ_4K, SZ_512K, 218, 0, NAND_RR_NONE},
/* PowerFlash ASU8GA30IT-G30CA and MIRA PSU8GA30AT-GIA
have the same ID */
{ {0xC8, 0xD3, 0x90, 0x19, 0x34, 0x01, 0x00, 0x00}, 6, SZ_1G,
"PSU8GA30AT-GIA/ASU8GA30IT-G30CA", SZ_4K, SZ_256K, 218, 0,
NAND_RR_NONE},
{ {0x7F, 0x7F, 0x7F, 0x7F, 0xC8, 0xDA, 0x00, 0x15}, 8, SZ_256M,
"PSU2GA30AT", SZ_2K, SZ_128K, 64, 0, NAND_RR_NONE},
{},/* may used to store nand chip info passed from bootloader */
{},/* null terminated */
};
/*****************************************************************************/
struct nand_flash_dev *nand_get_flash_type_ex(struct nand_flash_dev_ex
*flash_dev_ex)
{
struct nand_flash_special_dev *spl_dev;
unsigned char *byte = flash_dev_ex->ids;
struct nand_flash_dev *flash_type = &flash_dev_ex->flash_dev;
pr_info("Chip ID: %02x %02x %02x %02x %02x %02x %02x %02x\n",
byte[0], byte[1], byte[2], byte[3],
byte[4], byte[5], byte[6], byte[7]);
for (spl_dev = nand_flash_special_dev; spl_dev->length; spl_dev++) {
if (memcmp(byte, spl_dev->id, spl_dev->length))
continue;
flash_type->id = byte[1];
flash_type->name = spl_dev->name;
flash_type->pagesize = spl_dev->pagesize;
flash_type->chipsize = (unsigned long)
(spl_dev->chipsize >> 20);
flash_type->erasesize = spl_dev->erasesize;
flash_type->options = spl_dev->options;
flash_dev_ex->oobsize = spl_dev->oobsize;
flash_dev_ex->read_retry_type = spl_dev->read_retry_type;
return flash_type;
}
flash_dev_ex->read_retry_type = NAND_RR_NONE;
return NULL;
}
/*****************************************************************************/
static char *ultohstr(u32 size, char *buffer)
{
char *fmt[] = {"%u", "%uK", "%uM", "%uG", "%uT", "%uT"};
int ix;
for (ix = 0; (ix < 5) && !(size & 0x3FF) && size; ix++)
size = (size >> 10);
sprintf(buffer, fmt[ix], size);
return buffer;
}
void nand_show_info(struct nand_flash_dev_ex *flash_dev_ex,
struct mtd_info *mtd,
char *vendor,
char *chipname)
{
char buf[20];
pr_info("Nand: %s %s ", vendor, chipname);
if (flash_dev_ex->is_randomizer)
pr_info("Randomizer ");
if (flash_dev_ex->read_retry_type != NAND_RR_NONE)
pr_info("Read-Retry ");
pr_info("\n");
pr_info("Block:%sB ", ultohstr(mtd->erasesize, buf));
pr_info("Page:%sB ", ultohstr(mtd->writesize, buf));
pr_info("OOB:%sB ", ultohstr(flash_dev_ex->oobsize, buf));
pr_info("ECC:%s ", get_ecctype_str(flash_dev_ex->ecctype));
}
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