Don't check ICSR.RETTOBASE outside an exception handler

The ICSR.RETTOBASE bit value is UNKNOWN when not inside an
exception handler, so don't try to test it in that situation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

4 files changed, 11 insertions, 6 deletions

diff --git a/armv7m.h b/armv7m.h
index 3d1c1ae..36955f8 100644
--- a/armv7m.h
+++ b/armv7m.h
@@ -31,6 +31,7 @@
 #define PRIGROUP_BITS 3
 #define PRIO_MASK (((1<<3)-1)<<(8-PRIGROUP_BITS))
 
+#define ICSR_RETTOBASE (1 << 11)
 
 typedef void (*vectfn)(void);
 
diff --git a/test10.c b/test10.c
index 9928bc1..d1b3af3 100644
--- a/test10.c
+++ b/test10.c
@@ -76,14 +76,14 @@ void main(void)
     out32(SCB(0xd1c), PRIO(2,0)<<24); /* SVC prio 2 */
     out32(SCB(0xd20), PRIO(1,0)<<16); /* PendSV prio 1 */
 
-    /* RETTOBASE not set */
-    testEqI(0x00000000, in32(SCB(0xd04)), "ICSR");
+    /* RETTOBASE is UNKNOWN here */
+    testEqI(0x00000000, in32(SCB(0xd04)) & ~ICSR_RETTOBASE, "ICSR");
     testEqI(0x00000000, in32(SCB(0xd24)), "SHCSR");
     testDiag("Call SVC");
     SVC(42);
     testDiag("Back in main");
     testEqI(4, SEQ(), "Back in SVC");
-    testEqI(0x00000000, in32(SCB(0xd04)), "ICSR");
+    testEqI(0x00000000, in32(SCB(0xd04)) & ~ICSR_RETTOBASE, "ICSR");
     testEqI(0x00000000, in32(SCB(0xd24)), "SHCSR");
 
     testDiag("Done");
diff --git a/test4.c b/test4.c
index c2c1701..b5f62ae 100644
--- a/test4.c
+++ b/test4.c
@@ -109,7 +109,10 @@ void main(void)
     test_equal("ENA ", 3, in32(SCB(0x100)));
     test_equal("PEND", 0, in32(SCB(0x200)));
     test_equal("ACT ", 0, in32(SCB(0x300)));
-    test_equal("ICSR", 0x00000000, in32(SCB(0xd04)));
+    /* Note that we don't compare ICSR.RETTOBASE as that bit is
+     * architecturally UNKNOWN outside an exception handler.
+     */
+    test_equal("ICSR", 0x00000000, in32(SCB(0xd04)) & ~ICSR_RETTOBASE);
 
     testDiag("Pend IRQ0 (shouldn't run)");
     out32(SCB(0x200), 1);
@@ -117,7 +120,7 @@ void main(void)
     test_equal("PEND", 1, in32(SCB(0x200)));
     test_equal("ACT ", 0, in32(SCB(0x300)));
     /* ISRPENDING and VECTPENDING==16 */
-    test_equal("ICSR", 0x00410000, in32(SCB(0xd04)));
+    test_equal("ICSR", 0x00410000, in32(SCB(0xd04)) & ~ICSR_RETTOBASE);
 
     CHECK_SEQ(1);
     testDiag("Unmask (should run now)");
diff --git a/test9.c b/test9.c
index 7bd2566..b96fbde 100644
--- a/test9.c
+++ b/test9.c
@@ -49,7 +49,8 @@ void main(void)
     puts("# cpuid ");
     puthex(early_state.cpuid);
     putc('\n');
-    TEST(icsr, 0);
+    /* ICSR.RETTOBASE is architecturally UNKNOWN here, so don't test it */
+    TEST(icsr & ~ICSR_RETTOBASE, 0);
     TEST(vtor, 0);
     TEST(aircr, 0xfa050000);
     TEST(scr, 0);