aboutsummaryrefslogtreecommitdiff
path: root/arm.risu
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2011-03-11 11:12:54 +0000
committerPeter Maydell <peter.maydell@linaro.org>2011-03-11 11:12:54 +0000
commitbff0e5a9314142981456215e05faa2845b18c9b4 (patch)
treed271dd831c18811a7771e75a67a35b04699d85c8 /arm.risu
parent3168558de9999c9186fa8aa6d3e2a6bd605a73d1 (diff)
Add patterns for dual multiplies
Diffstat (limited to 'arm.risu')
-rw-r--r--arm.risu8
1 files changed, 8 insertions, 0 deletions
diff --git a/arm.risu b/arm.risu
index 75aebba..68e8a2d 100644
--- a/arm.risu
+++ b/arm.risu
@@ -109,6 +109,14 @@ SMMLS A1 cond:4 01110101 rd:4 ra:4 rm:4 11 r 1 rn:4
# constraints on registers fields (ie not 13 or 15)
SMMUL A1 cond:4 01110101 rd:4 1111 rm:4 00 r 1 rn:4
+# dual multiplies
+SMLAD A1 cond:4 0111 0000 rd:4 ra:4 rm:4 00 m 1 rn:4
+SMUAD A1 cond:4 0111 0000 rd:4 1111 rm:4 00 m 1 rn:4
+SMLSD A1 cond:4 0111 0000 rd:4 ra:4 rm:4 01 m 1 rn:4
+SMUSD A1 cond:4 0111 0000 rd:4 1111 rm:4 01 m 1 rn:4
+SMLALD A1 cond:4 0111 0100 rdhi:4 rdlo:4 rm:4 00 m 1 rn:4 { $rdhi != $rdlo; }
+SMLSLD A1 cond:4 0111 0100 rdhi:4 rdlo:4 rm:4 01 m 1 rn:4 { $rdhi != $rdlo; }
+
USAT A1 cond:4 0110111 satimm:5 rd:4 imm:5 sh 0 1 rn:4
SSAT A1 cond:4 0110101 satimm:5 rd:4 imm:5 sh 0 1 rn:4
SSAT16 A1 cond:4 01101010 satimm:4 rd:4 1111 0011 rn:4