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authorPeter Maydell <peter.maydell@linaro.org>2011-03-10 10:51:46 +0000
committerPeter Maydell <peter.maydell@linaro.org>2011-03-10 16:07:00 +0000
commitccc31c762028f84d5334147171092090f3dcd0e3 (patch)
treed2b1fc22b2385ea0b471c66c8fe43446fecbd441 /risugen
parent0fd0006075ed71727c625329051218982ec0be78 (diff)
risugen: Support plain reg addressing mode
Diffstat (limited to 'risugen')
-rwxr-xr-xrisugen20
1 files changed, 20 insertions, 0 deletions
diff --git a/risugen b/risugen
index 0ccd823..7c43371 100755
--- a/risugen
+++ b/risugen
@@ -396,6 +396,26 @@ sub dump_insn_details($$)
# The last (array) parameter lists the registers which are trashed
# by the instruction (ie which are the targets of the load).
# This is used to avoid problems when the base reg is a load target.
+sub reg($@)
+{
+ my ($base, @trashed) = @_;
+ # Get a random offset within the memory block, of the
+ # right alignment.
+ my $offset = rand(2048) & ~3;
+ write_mov_ri(0, $offset);
+ write_risuop($OP_GETMEMBLOCK);
+ # Now r0 is the address we want to do the access to,
+ # so just move it into the basereg
+ if ($base != 0) {
+ write_mov_rr($base, 0);
+ write_mov_ri(0, 0);
+ }
+ if (grep $_ == $base, @trashed) {
+ return -1;
+ }
+ return $base;
+}
+
sub reg_plus_imm($$@)
{
# Handle reg + immediate addressing mode