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author | Peter Maydell <peter.maydell@linaro.org> | 2010-10-13 14:41:29 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2010-10-13 14:41:29 +0100 |
commit | 866a7d5a3ae45a338c2d7708c6add68f50a7968f (patch) | |
tree | 6edd4b9334a609a9f806ba64f63890a3ff2dcee1 /thumb.risu | |
parent | 07e85b2b0c15b5245d2c3af85f0d817563f98c1d (diff) |
Add support to risugen for generating Thumb instructions.
Diffstat (limited to 'thumb.risu')
-rw-r--r-- | thumb.risu | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/thumb.risu b/thumb.risu new file mode 100644 index 0000000..cbc1d54 --- /dev/null +++ b/thumb.risu @@ -0,0 +1,15 @@ +# Input file for risugen defining Thumb instructions +# Copyright 2010 Linaro Limited + +# The format here is: +# insnname encodingname bitfield ... +# (and we'll have a trailing bit for specifying constraints later) +# where each bitfield is either: +# var:sz specifying a variable field of size sz (sz == 0 if :sz omitted) +# [01]* specifying fixed bits +# Field names beginning 'r' are special as they are assumed to be general +# purpose registers. They get an automatic "cannot be 13 or 15" (sp/pc) +# constraint. + +ADD T1 000 1100 rm:3 rn:3 rd:3 +ADD T3 11101 01 1000 s rn:4 0 imma:3 rd:4 immb:2 type:2 rm:4 |