aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-03-01Add aa64 sqrdml[as]hRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-01aarch64.risu: add cryptographic extensions for v8.2Alex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-4-alex.bennee@linaro.org [PMM: Added a few missing cases] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23aarch64.risu: update Floating-point data-processing (1 source)Alex Bennée
This adds the half-precision encoding and shuffles around the RES space to indicate this. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-9-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23contrib/run_risu.sh: add a visual cue for a clean-runAlex Bennée
It saves you from having to check the status code or wonder if the errors just scrolled off your screen. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-8-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23contrib/run_risu.sh: don't set -eAlex Bennée
As the script is meant to summarise the results at the end it doesn't make sense to bail out at the first error. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-7-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23new contrib/generate_all.sh: batch risugen scriptAlex Bennée
This is a simple script for generating all instructions in a given RISU file. You can split up the batch size by passing a -n N command line options. For example: ./contrib/generate_all.sh -n 2 hp.risu testcases.armv8.2_hp Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-5-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23aarch64.risu: clean-up and annotate with groupsAlex Bennée
Clean-up the risu definitions by: - removing out-dated section numbers - fixing section titles to match ASL encoding groups - add @Section markers Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-3-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23risugen: support @GroupName in risu filesAlex Bennée
The existing pattern support is useful but it does get a little tedious when faced with large groups of instructions. This introduces the concept of a @GroupName which can be sprinkled in the risu definition and is attached to all instructions following its definition until the next group or an empty group "@" is specified. It can be combined with the existing pattern support to do things like: ./risugen --group AdvSIMDAcrossVector --not-pattern ".*_RES" aarch64.risu foo.bin Multiple groups will further restrict the set, so for example: ./risugen --group v8.2,Cryptographic aarch64.risu v8.2-crypto.bin Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180223154613.2096-2-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21configure: support CPPFLAGSAlex Bennée
Useful for accessing APIs that are still brewing, e.g: CROSS_PREFIX=aarch64-linux-gnu- \ CPPFLAGS=-I/home/alex/lsrc/qemu/risu.git/sve-headers/include \ ../configure Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171107150558.22131-7-alex.bennee@linaro.org [PMM: tweaked text in README for typos etc] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21configure: allow repeated invocation of configure in build dirAlex Bennée
Otherwise a second configure run will totally miss out the setting of BUILD_INC. I made the link -sf as it seemed the easier way around. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171107150558.22131-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21risu.c: add missing --trace longoptAlex Bennée
This got missed when trace support was added. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171107150558.22131-4-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21risu.c: split out setting up optionsAlex Bennée
This is a prerequisite to properly handling architecture specific options. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171107150558.22131-3-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21build-all-arches: drop -t (for tty) from docker invocationAlex Bennée
This prevents gcc from going nuts with colorizing the compiler output which looks particularly ugly when invoked via compilation-mode. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171107150558.22131-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-21risugen/risugen_$arch: factor out instruction selectionAlex Bennée
This moves the instruction selection to the common code and passes a list of selection keys to write_test_code instead. This will allow us to add selection features to the common code later. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171031145444.13766-6-alex.bennee@linaro.org
2017-11-21aarch64.risu: update AdvancedSIMD across lanesAlex Bennée
- sorted alphabetically - aligned the instructions patterns Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171031145444.13766-5-alex.bennee@linaro.org
2017-11-21aarch64.risu: remove duplicate AdvSIMD scalar 2 reg misc blockAlex Bennée
While at that also sort alphabetically and nicely align for eye-balling the patterns. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171031145444.13766-4-alex.bennee@linaro.org
2017-11-21aarch64.risu: remove duplicate AdvSIMD Scalar 3 same blockAlex Bennée
A chunk of the AArch64 definitions repeat themselves. Clean that up. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171031145444.13766-3-alex.bennee@linaro.org
2017-11-21aarch64.risu: document naming conventionsAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20171031145444.13766-2-alex.bennee@linaro.org
2017-07-10risugen: fix bad indentAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-7-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-10risu.el: derive from text-modeAlex Bennée
As RISU files have copious commentary it seems better to derive from text-mode so we can access things like spell-checker short cuts ;-) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-10README: document record/replay supportAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-5-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-10README: document --static buildsAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-4-alex.bennee@linaro.org [PMM: fixed minor grammar awkwardness] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-10reginfo.c: always return 1 on OP_TESTENDAlex Bennée
In the master/apprentice setup the response byte of 1 is returned by write_fn. However when tracing it will happily report 0 as it successfully writes the last bytes. To avoid running of the end when tracing we just always return 1 at this point. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-3-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-10risu: make match status take tracing into accountAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170704144859.17644-2-alex.bennee@linaro.org [PMM: fix spacing around : operator] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29new: run_risu.sh scriptAlex Bennée
A simple script to work through running all of a bunch of files with record/playback traces. Dumps a summary and the number of failed tests at the end. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-11-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29new: record_traces.sh helper scriptAlex Bennée
A simple script to run through a bunch of binaries and generate their trace files. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-10-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed checkpatch nit] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: add support for compressed tracefilesAlex Bennée
This uses the magic of zlib's gzread/write interface to wrap the tracefile in compression. The code changes are tiny. I spent more time messing about with the configure/linker stuff to auto-detect bits. As you need decent multi-arch support or a correctly setup cross toolchain we fall back if we can't compile with zlib. This unfortunately needs some #ifdef hackery around the zlib bits in risu.c. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20170621154244.28309-9-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: handle trace through stdin/stdoutAlex Bennée
Trace files can get quite large so it would be useful to be able to just capture the trace stream with stdin/stdout for processing in a pipe line. The sort of case where this is useful is for building static binaries where zlib support is missing for whatever reason. It can also be used in testing pipelines. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-8-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: add simple trace and replay supportAlex Bennée
This adds a very dumb and easily breakable trace and replay support. In --master mode the various risu ops trigger a write of register/memory state into a binary file which can be played back to an apprentice. Currently there is no validation of the image source so feeding the wrong image will fail straight away. The trace files will get very big for any appreciable sized test file and this will be addressed in later patches. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20170621154244.28309-7-alex.bennee@linaro.org [PMM: fixed checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: add header to trace streamAlex Bennée
I've also added a header packet with pc/risu op in it so we can keep better track of how things are going. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [PMM: flipped header check to early-bailout so diff is easier to read] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20170621154244.28309-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: parameterise send/receive functionsAlex Bennée
This is a precursor to record/playback support. Instead of passing the socket fd we now pass helper functions for reading/writing and responding. This will allow us to do the rest of the record/playback cleanly outside of the main worker function. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-5-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29risu: a bit more verbosity when startingAlex Bennée
When debugging faults it is useful to know where the generated instructions are living. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-4-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29build-all-archs: support cross building via dockerAlex Bennée
If we want to link to any other libraries we might find using simple cross toolchains doesn't work so well. One way around this is to use a dockerised cross-toolchain which then won't clash with your host system. If the user specifies --use-docker the obvious will be done. By default we use the QEMU projects qemu:debian-FOO-cross images as RISU hackers are likely to be QEMU developers too. However any docker tag can be passed on the command line. If none of the docker images have usable compilers we fall back to checking the host path. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-3-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-29README: document the coding style used for risuAlex Bennée
We also include the an Emacs .dir-locals (as per QEMU) that enforces this layout. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170621154244.28309-2-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-26risu_reginfo_arm.c: Move orphan comment to risu.h.Peter Maydell
Move an orphan comment that describes the reginfo structure into risu.h, and expand it a little. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1497969886-17773-3-git-send-email-peter.maydell@linaro.org
2017-06-26risu_reginfo_arm.c: Fix handling of size values in sigframePeter Maydell
The code in reginfo_init_vfp() to parse the signal frame was mishandling the size counts: * the size includes the bytes for the magic and size fields, so the code to skip forward over unknown or undersize blocks was adding 4 more than it should * the size is in bytes but the "is this block too small" test was checking against an expected size in words This didn't cause any problems because the kernel happens to generate signal frames with the VFP section first. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1497969886-17773-2-git-send-email-peter.maydell@linaro.org
2017-06-20build-all-archs: support --static flagAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170619104655.31104-5-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-20all: fix up code consistencyAlex Bennée
This is pretty much a mechanical change where I ran: indent -kr Across all the files and then fixed up all but a few violations of: ../../qemu.git/scripts/checkpatch.pl -f *.c *.h > checkpatch.out Along with heavy use of M-x untabify to make everything consistent. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170619104655.31104-4-alex.bennee@linaro.org [PMM: some bits of indent in risu_reginfo_arm.c were not right: fixed] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-20.gitignore: ignore build directoriesAlex Bennée
These are generated by the build-all-arches script. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20170619104655.31104-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-30ppc64.risu: Fix broken constraintsPeter Maydell
Commit c10b97092 changed some field names in rldicr and rldimi patterns but forgot to update the constraints to match the change. Since the field (previously 'rb' and now 'sh') is an immediate rather than a register number, the correct fix is to just delete the constraint since we don't need to avoid particular values. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-30ppc64: Fix patterns for rotate doubleword instructionsSandipan Das
The patterns for the following instructions are fixed: * Rotate Left Doubleword then Clear Right (rldcr[.]) * Rotate Left Doubleword Immediate then Clear Right (rldicr[.]) * Rotate Left Doubleword Immediate then Mask Insert (rldimi[.]) The first instruction has a typo. For the other two instructions, the extended opcodes are incorrect and the shift field 'sha' is absent. Also, the shift field 'sh' should be used in place of the register field 'rb'. Signed-off-by: Sandipan Das <sandipandas1990@gmail.com> Reviewed-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Message-id: 1495444679-7736-1-git-send-email-sandipandas1990@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-30build: Add support to PowerPC BEJose Ricardo Ziviani
Essentialy the code for PowerPC BE and LE are the same, so this patch renames all *ppc64le.* files to *ppc64.* and reflects such in the Makefile. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Message-id: 1495739423-32326-5-git-send-email-joserz@linux.vnet.ibm.com [PMM: dropped change which removes the user's ability to manually set the ARCH variable; deleted a now out of date comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-30risugen, risugen_ppc64.pm: Add support ppc64 (big-endian)Jose Ricardo Ziviani
This commit adds an option to risugen in order to give the opportunity to generated big-endian instructions. By passing --be, users force risugen to generated big-endian instructions for ppc64. ./risugen --be --numinsns 1000 --pattern "ADD" ppc64.risu test.bin ./risugen --numinsns 1000 --pattern "ADD" ppc64.risu test.bin Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Message-id: 1495739423-32326-4-git-send-email-joserz@linux.vnet.ibm.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-30configure: Add initial support to PPC64 (big endian)Jose Ricardo Ziviani
Uses the same ppc64 source file for both BE/LE archs since they are essentially the same thing. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Message-id: 1495739423-32326-3-git-send-email-joserz@linux.vnet.ibm.com
2017-05-30risugen_ppc64: Load random 128-bit data to vector registersJose Ricardo Ziviani
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Message-id: 1495739423-32326-2-git-send-email-joserz@linux.vnet.ibm.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-28risugen_ppc64: Remove unused codeJose Ricardo Ziviani
Because we don't support custom fpsrc value yet it's better to remove that code. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-28configure: Put temporary directory in build tree, and delete itPeter Maydell
We were putting the temporary directory we use for configure tests under /tmp/, but never deleting it, so if you ran configure a lot you'd build up a big stock of useless directories. Switch to using a scheme like GNU autotools and QEMU, where we put the configure tempdir in the build tree, and delete it just when configure exits successfully. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-24Tidy up #include linesPeter Maydell
Tidy up unnecessary #includes that risu.h provides. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-24Move recv_and_compare_register_info() and report_match_status() to reginfo.cPeter Maydell
Move recv_and_compare_register_info() and report_match_status() to reginfo.c -- they are essentially the same for all targets so can be common code. The shared variables they use come with them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-24Move send_register_info() to reginfo.cPeter Maydell
send_register_info() is now essentially the same code for all target CPUs, so move it into reginfo.c rather than having duplicated code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>