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authorArchit Taneja <architt@codeaurora.org>2016-07-15 15:49:59 +0530
committerSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-07-19 13:31:34 +0100
commit8dbb748270ef8acd1fcc6715b5529819cd7dfb2c (patch)
tree8adf8072c2afae616ab0e1e31b8a1de7f7e291ed
parentf72e88ee7140f593fdd417d6d39a62687838db03 (diff)
HACK: drm/msm/hdmi: Get mmagic AHB clock on 8996int-v4.7-rc6-6-rob-drm
The HDMI block, like other MDSS blocks on 8996, requires both MMSS_MMAGIC_AHB_CLK and MDSS_AHB_CLK to access registers. Make sure the driver enables the mmagic AHB clock too and doesn't rely on any other driver to enable it. Signed-off-by: Archit Taneja <architt@codeaurora.org>
-rw-r--r--drivers/gpu/drm/msm/hdmi/hdmi.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index 39a1ae21b7e80..ac69a428a9621 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -398,12 +398,15 @@ static struct hdmi_platform_config hdmi_tx_8994_config = {
.hpd_freq = hpd_clk_freq_8x74,
};
+static const char *hpd_clk_names_8x96[] = {"mmagic_iface_clk", "iface_clk", "core_clk", "mdp_core_clk"};
+static unsigned long hpd_clk_freq_8x96[] = {0, 0, 19200000, 0};
+
static struct hdmi_platform_config hdmi_tx_8996_config = {
HDMI_CFG(pwr_reg, none),
HDMI_CFG(hpd_reg, none),
HDMI_CFG(pwr_clk, 8x74),
- HDMI_CFG(hpd_clk, 8x74),
- .hpd_freq = hpd_clk_freq_8x74,
+ HDMI_CFG(hpd_clk, 8x96),
+ .hpd_freq = hpd_clk_freq_8x96,
};
static const struct {