diff options
| author | Lina Iyer <lina.iyer@linaro.org> | 2014-09-29 12:52:44 -0600 |
|---|---|---|
| committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-10-01 14:02:29 +0100 |
| commit | 557b2830f040778431e4bb2624151187b5caa44c (patch) | |
| tree | b4865225f2e8061888ba6a099dfe15cd65e9569d | |
| parent | 0b39a96c0c4aab5692e43f8779862d2dbade3696 (diff) | |
arm: dts: apq8064: Add idle state device bindingstracking-qcomlt-cpuidle-v7
Add ARM common idle state device bindings for cpuidle support in
APQ8064.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 51df8d2f73a90..b765e4f411b3b 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -21,6 +21,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; cpu@1 { @@ -31,6 +32,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; cpu@2 { @@ -41,6 +43,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; cpu@3 { @@ -51,12 +54,30 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; L2: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_WFI: wfi { + compatible = "qcom,idle-state-wfi", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <400>; + exit-latency-us = <900>; + min-residency-us = <3000>; + }; + }; + }; cpu-pmu { |