diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2015-02-23 07:27:41 +0000 |
|---|---|---|
| committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2015-02-23 11:41:00 +0000 |
| commit | 70168acfc81b8416dd93b16c3f24cea7f6dad661 (patch) | |
| tree | 5b724ba6b878121eb8337eba6eb3fa00994ed9ea | |
| parent | 94da69f0867f5adb80efb3ec8862ce7b0044fc32 (diff) | |
ARM: dts: apq8064 add i2c3 node for panel.dt_for_kumarapq8064_dt_for_kumar
This patch adds i2c3 node which is used for panel control on IFC6410.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 25 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index ab7aee2445c6b..70fa747d68473 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -20,6 +20,16 @@ }; }; + gsbi3: gsbi@16200000 { + status = "okay"; + qcom,mode = <GSBI_PROT_I2C>; + i2c3: i2c@16280000 { + status = "okay"; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + }; + }; + gsbi@12440000 { status = "okay"; qcom,mode = <GSBI_PROT_I2C>; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 09077a0645114..890db8efa720a 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -122,6 +122,13 @@ function = "gsbi1"; }; }; + + i2c3_pins: i2c3 { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi3"; + }; + }; }; intc: interrupt-controller@2000000 { @@ -208,6 +215,24 @@ }; }; + gsbi3: gsbi@16200000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16200000 0x100>; + clocks = <&gcc GSBI3_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + i2c3: i2c@16280000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16280000 0x1000>; + interrupts = <0 151 IRQ_TYPE_NONE>; + clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>; + clock-names = "core", "iface"; + }; + }; gsbi7: gsbi@16600000 { status = "disabled"; |