diff options
| author | Fathi Boudra <fathi.boudra@linaro.org> | 2012-12-15 09:08:08 +0200 |
|---|---|---|
| committer | Fathi Boudra <fathi.boudra@linaro.org> | 2012-12-25 16:58:57 +0200 |
| commit | edde41b3c75bce779549bd2e1dba18eb7beb8267 (patch) | |
| tree | 62ac7686da47a3ea220ec820679305f47dd1012b /hw/tusb6010.c | |
| parent | f77d2c3c841d1990d10ab147b770bf5673dbfacc (diff) | |
| parent | 17d4e9b1e2d6d32da51278a4165621af99bade02 (diff) | |
Imported Debian patch 1.3.0-2012.12-0ubuntu1~linaro1debian/1.3.0-2012.12-0ubuntu1_linaro1
Diffstat (limited to 'hw/tusb6010.c')
| -rw-r--r-- | hw/tusb6010.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/tusb6010.c b/hw/tusb6010.c index 5ba8da6..325200b 100644 --- a/hw/tusb6010.c +++ b/hw/tusb6010.c @@ -281,7 +281,7 @@ static void tusb_gpio_intr_update(TUSBState *s) extern CPUReadMemoryFunc * const musb_read[]; extern CPUWriteMemoryFunc * const musb_write[]; -static uint32_t tusb_async_readb(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readb(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; @@ -298,7 +298,7 @@ static uint32_t tusb_async_readb(void *opaque, target_phys_addr_t addr) return 0; } -static uint32_t tusb_async_readh(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readh(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; @@ -315,7 +315,7 @@ static uint32_t tusb_async_readh(void *opaque, target_phys_addr_t addr) return 0; } -static uint32_t tusb_async_readw(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readw(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; int offset = addr & 0xfff; @@ -438,7 +438,7 @@ static uint32_t tusb_async_readw(void *opaque, target_phys_addr_t addr) return 0; } -static void tusb_async_writeb(void *opaque, target_phys_addr_t addr, +static void tusb_async_writeb(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; @@ -459,7 +459,7 @@ static void tusb_async_writeb(void *opaque, target_phys_addr_t addr, } } -static void tusb_async_writeh(void *opaque, target_phys_addr_t addr, +static void tusb_async_writeh(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; @@ -480,7 +480,7 @@ static void tusb_async_writeh(void *opaque, target_phys_addr_t addr, } } -static void tusb_async_writew(void *opaque, target_phys_addr_t addr, +static void tusb_async_writew(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; |