patches: delete obsolete edk2 patchesrpf-17.10

Since we moved the baseline for 17.10, some of these patches are no longer needed.

Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>

3 files changed, 0 insertions, 114 deletions

diff --git a/patches/edk2/0002-MdeModulePkg-NonDiscoverable-fix-memory-override-bug.patch b/patches/edk2/0002-MdeModulePkg-NonDiscoverable-fix-memory-override-bug.patch
deleted file mode 100644
index bd48545..0000000
--- a/patches/edk2/0002-MdeModulePkg-NonDiscoverable-fix-memory-override-bug.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 710d9e69fae6753a1a826aa18dd37bcadd3e0c3e Mon Sep 17 00:00:00 2001
-From: Heyi Guo <heyi.guo@linaro.org>
-Date: Mon, 30 Oct 2017 13:47:52 +0800
-Subject: [PATCH] MdeModulePkg/NonDiscoverable: fix memory override bug
-
-For PciIoPciRead interface, memory prior to Buffer would be written
-with zeros if Offset was larger than sizeof (Dev->ConfigSpace), which
-would cause serious system exception.
-
-So we add a pre-check branch to avoid memory override.
-
-Cc: Star Zeng <star.zeng@intel.com>
-Cc: Eric Dong <eric.dong@intel.com>
-Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
-Cc: Ruiyu Ni <ruiyu.ni@intel.com>
-Contributed-under: TianoCore Contribution Agreement 1.1
-Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
-Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
----
- .../Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
-index c836ad6a91..0e42ae4bf6 100644
---- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
-+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
-@@ -465,6 +465,11 @@ PciIoPciRead (
-   Address = (UINT8 *)&Dev->ConfigSpace + Offset;

-   Length = Count << ((UINTN)Width & 0x3);

- 

-+  if (Offset >= sizeof (Dev->ConfigSpace)) {

-+    ZeroMem (Buffer, Length);

-+    return EFI_SUCCESS;

-+  }

-+

-   if (Offset + Length > sizeof (Dev->ConfigSpace)) {

-     //

-     // Read all zeroes for config space accesses beyond the first

--- 
-2.11.0
-
diff --git a/patches/edk2/0003-Drivers-SataSiI3132Dxe-Fixed-PCI-IO-read-and-write-o.patch b/patches/edk2/0003-Drivers-SataSiI3132Dxe-Fixed-PCI-IO-read-and-write-o.patch
deleted file mode 100644
index 77fe101..0000000
--- a/patches/edk2/0003-Drivers-SataSiI3132Dxe-Fixed-PCI-IO-read-and-write-o.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 050d513bacec9999f9f3e9eeb558ead37d74c2ab Mon Sep 17 00:00:00 2001
-From: Daniil Egranov <daniil.egranov@arm.com>
-Date: Fri, 27 Oct 2017 00:33:23 -0500
-Subject: [PATCH 1/2] Drivers/SataSiI3132Dxe: Fixed PCI IO read and write
- operations
-
-The ATA pass through read should use PCI IO bus master write operation
-and ATA pass through write should use PCI IO bus master read operation
-as the read and write operations are executed from the bus master's
-point of view.
-
-Contributed-under: TianoCore Contribution Agreement 1.1
-Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
-Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
----
- EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
-index 2fb5fd68db..a938563ebd 100644
---- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
-+++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
-@@ -104,7 +104,7 @@ SiI3132AtaPassThruCommand (
-     }

- 

-     Status = PciIo->Map (

--               PciIo, EfiPciIoOperationBusMasterRead,

-+               PciIo, EfiPciIoOperationBusMasterWrite,

-                Packet->InDataBuffer, &InDataBufferLength, &PhysInDataBuffer, &PciAllocMapping

-                );

-     if (EFI_ERROR (Status)) {

-@@ -139,7 +139,7 @@ SiI3132AtaPassThruCommand (
-     OutDataBufferLength = Packet->OutTransferLength * SataDevice->BlockSize;

- 

-     Status = PciIo->Map (

--               PciIo, EfiPciIoOperationBusMasterWrite,

-+               PciIo, EfiPciIoOperationBusMasterRead,

-                Packet->OutDataBuffer, &OutDataBufferLength, &PhysOutDataBuffer, &PciAllocMapping

-                );

-     if (EFI_ERROR (Status)) {

--- 
-2.11.0
-
diff --git a/patches/edk2/0004-Drivers-SataSiI3132Dxe-Allow-64-bit-DMA-transfer.patch b/patches/edk2/0004-Drivers-SataSiI3132Dxe-Allow-64-bit-DMA-transfer.patch
deleted file mode 100644
index 4553d14..0000000
--- a/patches/edk2/0004-Drivers-SataSiI3132Dxe-Allow-64-bit-DMA-transfer.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From bca18551f62444b7840d6c93a82945ecf06ed9c6 Mon Sep 17 00:00:00 2001
-From: Daniil Egranov <daniil.egranov@arm.com>
-Date: Fri, 27 Oct 2017 00:33:24 -0500
-Subject: [PATCH 2/2] Drivers/SataSiI3132Dxe: Allow 64-bit DMA transfer
-
-Set a PCI IO attribute allowing 64-bit DMA transfer.
-
-Contributed-under: TianoCore Contribution Agreement 1.1
-Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
-Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
----
- EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c
-index f4946552a0..c1760fdc1b 100644
---- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c
-+++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c
-@@ -384,7 +384,7 @@ SataSiI3132DriverBindingStart (
-                   &Supports

-                   );

-   if (!EFI_ERROR (Status)) {

--      Supports &= EFI_PCI_DEVICE_ENABLE;

-+      Supports &= EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE;

-       Status = PciIo->Attributes (

-                         PciIo,

-                         EfiPciIoAttributeOperationEnable,

--- 
-2.11.0
-