2019.03 w-i-prpf-19.03-rc1

author: Leif Lindholm <leif.lindholm@linaro.org> 2019-03-20 17:51:08 +0000
committer: Leif Lindholm <leif.lindholm@linaro.org> 2019-03-21 19:30:03 +0000
commit: ff413ad57f25c6d6bd2e86132fd023ff2b38e59d (patch)
tree: a95e1cb4d9fcd3de562d568ee6bc7697587b3552
parent: 0732156e12495fe20a5ead7c6d60253d468a1d7a (diff)
6 files changed, 1277 insertions, 4 deletions
diff --git a/build.sh b/build.sh
index f6bb29c..5bc7442 100755
--- a/build.sh
+++ b/build.sh
@@ -10,10 +10,10 @@ EDK2_NON_OSI_REPO=https://github.com/tianocore/edk2-non-osi.git
 UEFI_TOOLS_REPO=https://git.linaro.org/uefi/uefi-tools.git
 
 ARM_TF_HASH=9fd2f13bd608832260300640970f73c62357c684
-EDK2_HASH=edk2-stable201811
-EDK2_PLATFORMS_HASH=cc2b26de91e09be9f9789d553e7b3e079c822efb
-EDK2_NON_OSI_HASH=047bb77dd93840fc2ad78bce2f580a0887a4b825
-UEFI_TOOLS_HASH=500a19703bfed2d6f37e212991577a35e3a30a4e
+EDK2_HASH=edk2-stable201903
+EDK2_PLATFORMS_HASH=89f6901df0e29da6619608dc417c052bb3e8f82a
+EDK2_NON_OSI_HASH=99907896565e9b9d6fa508e54b2840db3f0280fc
+UEFI_TOOLS_HASH=27207a83aefc88526466fb2dcba50470cb92974d
 
 config_git()
 {
diff --git a/patches/edk2-non-osi/0001-Hisilicon-D06-Add-Setup-Item-Support-DPC.patch b/patches/edk2-non-osi/0001-Hisilicon-D06-Add-Setup-Item-Support-DPC.patch
new file mode 100644
index 0000000..7a3483b
--- /dev/null
+++ b/patches/edk2-non-osi/0001-Hisilicon-D06-Add-Setup-Item-Support-DPC.patch
@@ -0,0 +1,854 @@
+From 57b6cb137748af47ac6b520690e4e883082aad68 Mon Sep 17 00:00:00 2001
+From: Ming Huang <ming.huang@linaro.org>
+Date: Fri, 1 Feb 2019 16:54:06 +0800
+Subject: [PATCH] Hisilicon/D06: Add Setup Item "Support DPC"
+
+Add setup item "Support DPC" to enable or disable PCIe DPC
+(Downstream Port Containment).
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Ming Huang <ming.huang@linaro.org>
+Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
+---
+ .../Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi  | Bin 232832 -> 226784 bytes
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+
+diff --git a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi
+index e32c056eadc55e8c527de3bd65c65a7a8f294b36..4511f6bf3920a6b0651c1abe901f0b6f64de4347 100644
+GIT binary patch
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+hnwciwj9rSIBC{FkD8*9a`EX>x0NCOIMs3)^_8$?)`JVs)
+
+-- 
+2.11.0
+
diff --git a/patches/edk2-platforms/0001-Hisilicon-D06-Fix-access-variable-fail-issue.patch b/patches/edk2-platforms/0001-Hisilicon-D06-Fix-access-variable-fail-issue.patch
new file mode 100644
index 0000000..4d436b3
--- /dev/null
+++ b/patches/edk2-platforms/0001-Hisilicon-D06-Fix-access-variable-fail-issue.patch
@@ -0,0 +1,45 @@
+From 4a24fb8fffb707730eaa5942495713ce54c90d78 Mon Sep 17 00:00:00 2001
+From: Jason Zhang <zhangjinsong2@huawei.com>
+Date: Wed, 31 Oct 2018 15:36:10 +0800
+Subject: [PATCH edk2-platforms 1/2] Hisilicon/D06: Fix access variable fail
+ issue
+
+BmcWdtEnable is a field of OemConfigData structure, need have
+runtime service attribution if use it during exit boot service
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Ming Huang <ming.huang@linaro.org>
+---
+ Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 +-
+ Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c      | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+index 470e9ace3d..08236704fb 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+@@ -23,7 +23,7 @@ formset
+   help      = STRING_TOKEN(STR_OEM_CONFIG),
+   classguid = gEfiIfrFrontPageGuid,  // for MdeModule Bds.
+   efivarstore OEM_CONFIG_DATA,
+-    attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
++    attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_RUNTIME_ACCESS,
+     name  = OemConfig,
+     guid  = gOemConfigGuid;
+ 
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+index 012d45bc02..6668103af0 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+@@ -316,7 +316,7 @@ OemConfigUiLibConstructor (
+       Status = gRT->SetVariable (
+                       OEM_CONFIG_NAME,
+                       &gOemConfigGuid,
+-                      EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
++                      EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+                       sizeof (OEM_CONFIG_DATA),
+                       &Configuration
+                       );
+-- 
+2.11.0
+
diff --git a/patches/edk2-platforms/0002-Hisilicon-D06-Add-Setup-Item-Support-DPC-and-delete-.patch b/patches/edk2-platforms/0002-Hisilicon-D06-Add-Setup-Item-Support-DPC-and-delete-.patch
new file mode 100644
index 0000000..a1dc44c
--- /dev/null
+++ b/patches/edk2-platforms/0002-Hisilicon-D06-Add-Setup-Item-Support-DPC-and-delete-.patch
@@ -0,0 +1,294 @@
+From c99558315c0223fc5686bc2f82d5ff8f9858cdcd Mon Sep 17 00:00:00 2001
+From: Ming Huang <ming.huang@linaro.org>
+Date: Wed, 30 Jan 2019 11:50:09 +0800
+Subject: [PATCH edk2-platforms 2/2] Hisilicon/D06: Add Setup Item "Support
+ DPC" and delete some PCIe menus
+
+Add setup item "Support DPC" to enable or disable PCIe DPC
+(Downstream Port Containment).
+
+The pcie menu is suppressed for original code as these menus
+are not ready. This patch remove the suppression for pcie menu,
+so delete these menus for now.
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Ming Huang <ming.huang@linaro.org>
+---
+ Silicon/Hisilicon/Include/Library/OemConfigData.h  |   1 +
+ .../Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr   |   2 -
+ .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c        |   4 +
+ .../Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr     | 197 +--------------------
+ .../Hi1620OemConfigUiLib/PcieConfigStrings.uni     |   3 +-
+ 5 files changed, 10 insertions(+), 197 deletions(-)
+
+diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h b/Silicon/Hisilicon/Include/Library/OemConfigData.h
+index f120e3123c..c0097d0829 100644
+--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
++++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
+@@ -49,6 +49,7 @@ typedef struct {
+   UINT8         OSWdtAction;
+   /*PCIe Config*/
+   UINT8         PcieSRIOVSupport;
++  UINT8         PcieDPCSupport;
+   UINT8         PciePort[PCIE_MAX_TOTAL_PORTS];
+   UINT8         PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
+   UINT8         PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+index 08236704fb..93ccb99bdc 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+@@ -62,11 +62,9 @@ formset
+       prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
+       help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
+ 
+-    suppressif TRUE;
+     goto PCIE_CONFIG_FORM_ID,
+       prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
+       help    = STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
+-    endif;
+ 
+     goto MISC_CONFIG_FORM_ID,
+       prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+index 6668103af0..be4ce8820f 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+@@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
+       Configuration.OSWdtTimeout = 5;
+       Configuration.OSWdtAction = 1;
+       //
++      //Set the default value of the PCIe option
++      //
++      Configuration.PcieDPCSupport = 0;
++      //
+       //Set the default value of the Misc option
+       //
+       Configuration.EnableSmmu = 1;
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+index 7cf7cdd29b..c65907fe84 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+@@ -17,203 +17,12 @@
+ form formid = PCIE_CONFIG_FORM_ID,
+   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
+ 
+-  goto VFR_FORMID_PCIE_SOCKET0,
+-    prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
+-    help    = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_SOCKET1,
+-    prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
+-    help    = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
+-
+-  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
+-        prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
+-        help     = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
++  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
++        prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
++        help     = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
+         option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED;
+         option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = RESET_REQUIRED;
+   endoneof;
+ 
+ endform;
+ 
+-form formid = VFR_FORMID_PCIE_SOCKET0,
+-  title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT);
+-
+-  goto VFR_FORMID_PCIE_PORT2,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT4,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT5,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT6,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT7,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_SOCKET1,
+-  title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT);
+-  goto VFR_FORMID_PCIE_PORT10,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT12,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-
+-  goto VFR_FORMID_PCIE_PORT13,
+-    prompt  = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT),
+-    help    = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT0,
+-  title = STRING_TOKEN(STR_PCIE_PORT_0_PROMPT);
+-  #undef  INDEX
+-  #define INDEX   0
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT1,
+-  title = STRING_TOKEN(STR_PCIE_PORT_1_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   1
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT2,
+-  title = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   2
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT3,
+-  title = STRING_TOKEN(STR_PCIE_PORT_3_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   3
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT4,
+-  title = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   4
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT5,
+-  title = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   5
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT6,
+-  title = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   6
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT7,
+-  title = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   7
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT8,
+-  title = STRING_TOKEN(STR_PCIE_PORT_8_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   8
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT9,
+-  title = STRING_TOKEN(STR_PCIE_PORT_9_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   9
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT10,
+-  title = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   10
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT11,
+-  title = STRING_TOKEN(STR_PCIE_PORT_11_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   11
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT12,
+-  title = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   12
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT13,
+-  title = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   13
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT14,
+-  title = STRING_TOKEN(STR_PCIE_PORT_14_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   14
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+-form formid = VFR_FORMID_PCIE_PORT15,
+-  title = STRING_TOKEN(STR_PCIE_PORT_15_PROMPT);
+-
+-  #undef  INDEX
+-  #define INDEX   15
+-  #include "PciePortConfig.hfr"
+-
+-endform;
+-
+diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
+index d87d30f975..0127ea952d 100644
+--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
++++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
+@@ -26,7 +26,8 @@
+ #string STR_PCIE_CPU_1_PROMPT           #language en-US "CPU 1 PCIE Configuration"
+ #string STR_SRIOV_SUPPORT_PROMPT        #language en-US "SRIOV"
+ #string STR_SRIOV_SUPPORT_HELP          #language en-US "This option enables / disables the SRIOV function"
+-
++#string STR_DPC_SUPPORT_PROMPT          #language en-US "Support DPC"
++#string STR_DPC_SUPPORT_HELP            #language en-US "This option enables / disables the DPC function"
+ #string STR_PCIE_PORT_PROMPT_HELP       #language en-US "Press <Enter> to config this port."
+ #string STR_PCIE_PORT_0_NULL_PROMPT     #language en-US ""
+ #string STR_PCIE_PORT_0_PROMPT          #language en-US "CPU 0 Pcie - Port 0"
+-- 
+2.11.0
+
diff --git a/patches/edk2/0001-MdeModulePkg-add-LockBoxNullLib-for-IA32-X64-in-.dsc.patch b/patches/edk2/0001-MdeModulePkg-add-LockBoxNullLib-for-IA32-X64-in-.dsc.patch
new file mode 100644
index 0000000..3eb926b
--- /dev/null
+++ b/patches/edk2/0001-MdeModulePkg-add-LockBoxNullLib-for-IA32-X64-in-.dsc.patch
@@ -0,0 +1,35 @@
+From 16ac0837939d44f0d233c58de4279ba9ddafaf9f Mon Sep 17 00:00:00 2001
+From: Leif Lindholm <leif.lindholm@linaro.org>
+Date: Mon, 18 Mar 2019 14:06:55 +0000
+Subject: [PATCH] MdeModulePkg: add LockBoxNullLib for !IA32/X64 in .dsc
+
+Commit 05fd2a926833
+("MdeModulePkg/NvmExpressPei: Consume S3StorageDeviceInitList LockBox")
+added a dependency on LockBoxLib to NvmExpressPei, causing builds using
+MdeModulePkg.dsc to fail on architectures other than IA32/X64 with
+missing reference to
+gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode.
+
+Add a resolution for LockBoxNullLib for ARM/AARCH64 to restore builds.
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
+---
+ MdeModulePkg/MdeModulePkg.dsc | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
+index 6cd1727a0d..6e27e9cb68 100644
+--- a/MdeModulePkg/MdeModulePkg.dsc
++++ b/MdeModulePkg/MdeModulePkg.dsc
+@@ -178,6 +178,7 @@ [LibraryClasses.common.MM_STANDALONE]
+ [LibraryClasses.ARM, LibraryClasses.AARCH64]
+   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+   ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
++  LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
+ 
+   #
+   # It is not possible to prevent ARM compiler calls to generic intrinsic functions.
+-- 
+2.11.0
+
diff --git a/patches/edk2/0002-MdeModulePkg-UefiBootManangerLib-Fix-exception-issue.patch b/patches/edk2/0002-MdeModulePkg-UefiBootManangerLib-Fix-exception-issue.patch
new file mode 100644
index 0000000..281179c
--- /dev/null
+++ b/patches/edk2/0002-MdeModulePkg-UefiBootManangerLib-Fix-exception-issue.patch
@@ -0,0 +1,45 @@
+From 5954f793dc48f99356c95cd247c13c5da9e48f14 Mon Sep 17 00:00:00 2001
+From: Ming Huang <ming.huang@linaro.org>
+Date: Tue, 19 Mar 2019 20:59:13 +0800
+Subject: [PATCH 2/2] MdeModulePkg/UefiBootManangerLib: Fix exception issue
+
+The system environment: virtual-CDROM(USB interface) via BMC, insert a
+iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
+to first boot option.
+With release version bios, disconnecting CDROM when boot to
+"1 seconds left, Press Esc or F2 to enter Setup"
+then system will get a exception.
+
+The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be uninstalled
+in this situation after print some transfer error. The status will be
+invalid parameter. This line will get a exception for BlockIo not point
+to right address:
+AllocatePool (BlockIo->Media->BlockSize)
+So, here need to judge the status after ASSERT_EFI_ERROR.
+
+The Bugzilla tracker for this:
+https://bugzilla.tianocore.org/show_bug.cgi?id=1631
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Ming Huang <ming.huang@linaro.org>
+---
+ MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+index 4ce83ce22d..0535cd7335 100644
+--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
++++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+@@ -1069,6 +1069,9 @@ BmExpandMediaDevicePath (
+   //
+   Status = gBS->HandleProtocol (Handle, &gEfiBlockIoProtocolGuid, (VOID **) &BlockIo);
+   ASSERT_EFI_ERROR (Status);
++  if (EFI_ERROR (Status)) {
++    return NULL;
++  }
+   Buffer = AllocatePool (BlockIo->Media->BlockSize);
+   if (Buffer != NULL) {
+     BlockIo->ReadBlocks (
+-- 
+2.11.0
+
author	Leif Lindholm <leif.lindholm@linaro.org>	2019-03-20 17:51:08 +0000
committer	Leif Lindholm <leif.lindholm@linaro.org>	2019-03-21 19:30:03 +0000
commit	ff413ad57f25c6d6bd2e86132fd023ff2b38e59d (patch)
tree	a95e1cb4d9fcd3de562d568ee6bc7697587b3552
parent	0732156e12495fe20a5ead7c6d60253d468a1d7a (diff)