diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2016-01-14 17:06:17 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-14 17:52:32 +0000 |
commit | c4d5df60b1d37e1fdc111fbb8bb27068b683f2f6 (patch) | |
tree | 653117962a00864b4b9645479a84288aa55956fe | |
parent | df906595b5b59c549e32b92fa64c0466b436ac90 (diff) |
Architecturally there is no guarantee that executing a WFE
will cause it to trap -- the trap only happens if the WFE would
put the CPU into a "power saving state", so a NOP implementation
can validly not trap at all. Since QEMU's implementation of WFE
does exactly this (though our WFI does not), disable the WFE tests.
(The same applies for the WFI tests, but since they happen to
pass on QEMU we leave them in.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | tztest/el0/tztest_el0.c | 9 | ||||
-rw-r--r-- | tztest/el1/tztest_el1.c | 9 |
2 files changed, 18 insertions, 0 deletions
diff --git a/tztest/el0/tztest_el0.c b/tztest/el0/tztest_el0.c index cbdab96..58d82a3 100644 --- a/tztest/el0/tztest_el0.c +++ b/tztest/el0/tztest_el0.c @@ -214,6 +214,14 @@ uint32_t el0_check_wfx_trap(uint32_t __attribute__((unused))arg) /* Get the current SCTLR so we can restore it later */ SVC_GET_REG(SCTLR, 1, sctlr); +#if 0 + /* Architecturally there is no guarantee that executing a WFE + * will cause it to trap -- the trap only happens if the WFE would + * put the CPU into a "power saving state", so a NOP implementation + * can validly not trap at all. Since QEMU's implementation of WFE + * does exactly this (though our WFI does not), disable the WFE tests. + */ + /* Clear SCTLR.nTWE to cause WFE instructions to trap to EL1 */ SVC_SET_REG(SCTLR, 1, sctlr & ~SCTLR_nTWE); TEST_MSG("WFE (SCTLR.nTWE clear, SCR.WFE clear)"); @@ -230,6 +238,7 @@ uint32_t el0_check_wfx_trap(uint32_t __attribute__((unused))arg) SVC_SET_REG(SCTLR, 1, sctlr | SCTLR_nTWE); TEST_MSG("WFE (SCTLR.nTWE set, SCR.WFE set)"); TEST_EL3_EXCEPTION(asm volatile("wfe\n"), EC_WFI_WFE); +#endif /* Restore SCR */ SVC_SET_REG(SCR, 3, scr); diff --git a/tztest/el1/tztest_el1.c b/tztest/el1/tztest_el1.c index 13372fa..6bcecba 100644 --- a/tztest/el1/tztest_el1.c +++ b/tztest/el1/tztest_el1.c @@ -96,6 +96,14 @@ uint32_t el1_check_wfx_trap(uint32_t __attribute__((unused))arg) TEST_MSG("WFE (SCTLR.nTWE clear, SCR.WFE clear)"); TEST_NO_EXCEPTION(asm volatile("wfe\n")); +#if 0 + /* Architecturally there is no guarantee that executing a WFE + * will cause it to trap -- the trap only happens if the WFE would + * put the CPU into a "power saving state", so a NOP implementation + * can validly not trap at all. Since QEMU's implementation of WFE + * does exactly this (though our WFI does not), disable the WFE tests. + */ + /* Trap WFE instructions to EL3. This should work regardless of the * SCTLR.nTWE setting. */ @@ -107,6 +115,7 @@ uint32_t el1_check_wfx_trap(uint32_t __attribute__((unused))arg) WRITE_SCTLR(sctlr | SCTLR_nTWE); TEST_MSG("WFE (SCTLR.nTWE set, SCR.WFE set)"); TEST_EL3_EXCEPTION(asm volatile("wfe\n"), EC_WFI_WFE); +#endif /* We cannot test the effect of WFI in EL1 mode like we did with WFE as it * causes a hang. It is assumed that since the exception is not trapped we |