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authorDaniel Thompson <daniel.thompson@linaro.org>2017-07-31 17:23:07 +0100
committerDaniel Thompson <daniel.thompson@linaro.org>2017-07-31 17:23:07 +0100
commite5b9b8c8b78096e961f4a45b9d1418e4641f24f9 (patch)
treea88f532f386376fca6a376e2c362173f971dc144 /arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
parent415d386877df49eb051b85ef74fa59a16dc17c7d (diff)
Orangepi i96 support (mega patch)rda/v2012.04.01-r0
This is https://github.com/orangepi-xunlong/OrangePiRDA_u-boot 5ee06c1afb7c ("add new patch a patch") as a single patch against a guestimated upstream version. This is merely a reference tree for later comparisons. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> NOT-Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c')
-rw-r--r--arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 911bbefc06..9fa5d29e6c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -39,7 +39,7 @@ uint32_t dram_vals[] = {
0x00000000, 0x00000100, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00010101, 0x01010101,
- 0x000f0f01, 0x0f02010a, 0x00000000, 0x00010101,
+ 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
0x00000100, 0x00000100, 0x00000000, 0x00000002,
0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
@@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void)
/* Disable CPU bypass */
writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
&clkctrl_regs->hw_clkctrl_clkseq_clr);
+
+ early_delay(15000);
}
void mx28_mem_setup_vdda(void)
@@ -173,10 +175,8 @@ void mx28_mem_setup_vddd(void)
&power_regs->hw_power_vdddctrl);
}
-void mx28_mem_get_size(void)
+uint32_t mx28_mem_get_size(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20;
/* The following is "subs pc, r14, #4", used as return from DABT. */
@@ -187,11 +187,11 @@ void mx28_mem_get_size(void)
vt[4] = data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- writel(sz, &digctl_regs->hw_digctl_scratch0);
- writel(sz, &digctl_regs->hw_digctl_scratch1);
/* Restore the old DABT handler. */
vt[4] = da;
+
+ return sz;
}
void mx28_mem_init(void)
@@ -239,6 +239,4 @@ void mx28_mem_init(void)
early_delay(10000);
mx28_mem_setup_cpu_and_hbus();
-
- mx28_mem_get_size();
}