diff options
| author | Daniel Thompson <daniel.thompson@linaro.org> | 2017-07-31 17:23:07 +0100 |
|---|---|---|
| committer | Daniel Thompson <daniel.thompson@linaro.org> | 2017-07-31 17:23:07 +0100 |
| commit | e5b9b8c8b78096e961f4a45b9d1418e4641f24f9 (patch) | |
| tree | a88f532f386376fca6a376e2c362173f971dc144 /board/rda/rda8810/clock_config.h | |
| parent | 415d386877df49eb051b85ef74fa59a16dc17c7d (diff) | |
Orangepi i96 support (mega patch)rda/v2012.04.01-r0
This is https://github.com/orangepi-xunlong/OrangePiRDA_u-boot
5ee06c1afb7c ("add new patch a patch") as a single patch against
a guestimated upstream version.
This is merely a reference tree for later comparisons.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
NOT-Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Diffstat (limited to 'board/rda/rda8810/clock_config.h')
| -rw-r--r-- | board/rda/rda8810/clock_config.h | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/board/rda/rda8810/clock_config.h b/board/rda/rda8810/clock_config.h new file mode 100644 index 0000000000..0c83efa678 --- /dev/null +++ b/board/rda/rda8810/clock_config.h @@ -0,0 +1,115 @@ +#ifndef __CLOCK_CONFIG_H__ +#define __CLOCK_CONFIG_H__ + +typedef unsigned long UINT32; +typedef unsigned short UINT16; +typedef long INT32; +typedef short INT16; +typedef unsigned char UINT8; +typedef char INT8; + +#define CLOCK_VER_MAJOR 1 +#define CLOCK_VER_MINOR 0 + +struct clock_config { + /* Header */ + UINT32 MAGIC; + UINT16 VERSION_MAJOR; + UINT16 VERSION_MINOR; + /* PLL Freqs (MHz) */ + UINT32 PLL_FREQ_CPU; /* 05, 06 */ + UINT32 PLL_FREQ_BUS; /* 25, 26 */ + UINT32 PLL_FREQ_MEM; /* 65, 66 */ + UINT32 PLL_FREQ_USB; /* 85, 86 */ + /* DDR Flags */ + UINT16 DDR_CAL; + UINT16 DDR_FLAGS; + UINT32 DDR_PARA; + /* AP sysctrl */ + UINT16 CLK_CPU; + UINT16 CLK_AXI; + UINT16 CLK_GCG; + UINT16 CLK_AHB1; + UINT16 CLK_APB1; + UINT16 CLK_APB2; + UINT16 CLK_MEM; + UINT16 CLK_GPU; + UINT16 CLK_VPU; + UINT16 CLK_VOC; + UINT16 CLK_SFLSH; + UINT16 RESERVE; + /* DDR timings */ + UINT16 DDR_CHAN_1_VALID; + UINT16 DDR_TIMING_100H; + UINT16 DDR_TIMING_101H; + UINT16 DDR_TIMING_102H; + UINT16 DDR_TIMING_103H; + UINT16 DDR_TIMING_104H; + UINT16 DDR_TIMING_105H; + UINT16 DDR_TIMING_106H; + UINT16 DDR_TIMING_107H; + UINT16 DDR_TIMING_108H; + UINT16 DDR_TIMING_109H; + UINT16 DDR_TIMING_10AH; + UINT16 DDR_TIMING_10BH; + + UINT16 DDR_CHAN_2_VALID; + UINT16 DDR_TIMING_120H; + UINT16 DDR_TIMING_121H; + UINT16 DDR_TIMING_122H; + UINT16 DDR_TIMING_123H; + UINT16 DDR_TIMING_124H; + UINT16 DDR_TIMING_125H; + UINT16 DDR_TIMING_126H; + UINT16 DDR_TIMING_127H; + UINT16 DDR_TIMING_128H; + UINT16 DDR_TIMING_129H; + UINT16 DDR_TIMING_12AH; + UINT16 DDR_TIMING_12BH; + + UINT16 DDR_CHAN_3_VALID; + UINT16 DDR_TIMING_140H; + UINT16 DDR_TIMING_141H; + UINT16 DDR_TIMING_142H; + UINT16 DDR_TIMING_143H; + UINT16 DDR_TIMING_144H; + UINT16 DDR_TIMING_145H; + UINT16 DDR_TIMING_146H; + UINT16 DDR_TIMING_147H; + UINT16 DDR_TIMING_148H; + UINT16 DDR_TIMING_149H; + UINT16 DDR_TIMING_14AH; + UINT16 DDR_TIMING_14BH; + + UINT16 DDR_CHAN_4_VALID; + UINT16 DDR_TIMING_160H; + UINT16 DDR_TIMING_161H; + UINT16 DDR_TIMING_162H; + UINT16 DDR_TIMING_163H; + UINT16 DDR_TIMING_164H; + UINT16 DDR_TIMING_165H; + UINT16 DDR_TIMING_166H; + UINT16 DDR_TIMING_167H; + UINT16 DDR_TIMING_168H; + UINT16 DDR_TIMING_169H; + UINT16 DDR_TIMING_16AH; + UINT16 DDR_TIMING_16BH; + + UINT16 DDR_TIMING_180H; + UINT16 DDR_TIMING_181H; + UINT16 DDR_TIMING_182H; + UINT16 DDR_TIMING_183H; + UINT16 DDR_TIMING_184H; + UINT16 DDR_TIMING_185H; + UINT16 DDR_TIMING_186H; + UINT16 DDR_TIMING_187H; + UINT16 DDR_TIMING_188H; + UINT16 DDR_TIMING_189H; + UINT16 DDR_TIMING_18AH; + UINT16 DDR_TIMING_18BH; + UINT16 DDR_TIMING_18CH; +}; + +struct clock_config *get_default_clock_config(void); + +#endif |