AgeCommit message (Expand)Author
2020-10-01arm.risu: Add patterns for fp16 insnsHEADmasterPeter Maydell
2020-10-01arm.risu: Fix typo in VCVT_B_TT pattern namePeter Maydell
2020-06-22arm.risu: Correct VLDR/VSTR U=0 patternsPeter Maydell
2020-06-05arm.risu, thumb.risu: Add v8.2 DP and FHM insnsPeter Maydell
2020-02-24aarch64.risu: Add patterns for v8.3-RCPC and v8.4-RCPC insnsPeter Maydell
2019-06-17arm.risu: Avoid VTRN with Vd == VmPeter Maydell
2019-06-13arm.risu: Add patterns for VFP<->gpreg transfersPeter Maydell
2019-06-13risu: Include <sys/user.h> on ppc64Peter Maydell
2019-06-07build-all-arches: include x86 triplets in the buildAlex Bennée
2019-06-07risu_reginfo_i386: rework --xfeatures value parsingJan Bobek
2019-06-07risu_reginfo_i386: replace xfeature constants with symbolic namesJan Bobek
2019-06-07i386: Add avx512 state to reginfo_tRichard Henderson
2019-06-07configure: add i386/x86_64 architecturesJan Bobek
2019-06-07test_i386: change syntax from nasm to gasJan Bobek
2019-06-07risu_i386: remove old unused codeJan Bobek
2019-06-07risu_i386: implement missing CPU-specific functionsJan Bobek
2019-06-07risu_reginfo_i386: implement arch-specific reginfo interfaceJan Bobek
2019-06-07risu_i386: move reginfo-related code to risu_reginfo_i386.cJan Bobek
2019-06-07risu_i386: move reginfo_t and related defines to risu_reginfo_i386.hJan Bobek
2019-06-07Makefile: undefine the arch name symbolJan Bobek
2019-02-08risugen: Default to sve offRichard Henderson
2019-02-08aarch64: Fill in fp regs for test_aarch64.sRichard Henderson
2018-09-25ppc64.risu: Fix pattern for darnSandipan Das
2018-07-02risu_reginfo_aarch64: handle variable VQAlex Bennée
2018-07-02risu_reginfo_aarch64: limit SVE_VQ_MAX to current architectureRichard Henderson
2018-07-02risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatchAlex Bennée
2018-07-02risu_reginfo_aarch64: add support for copying SVE register stateAlex Bennée
2018-07-02risu_reginfo_aarch64: left justify regnums and drop masksAlex Bennée
2018-07-02risu_reginfo: introduce reginfo_size()Alex Bennée
2018-07-02risu_reginfo_aarch64: unionify VFP regsAlex Bennée
2018-07-02risu_reginfo_aarch64: drop stray ;Alex Bennée
2018-07-02risu: add process_arch_optRichard Henderson
2018-07-02risu: move optional args to each architectureAlex Bennée
2018-07-02contrib/generate_all.sh: allow passing of arguments to risugenAlex Bennée
2018-07-02risugen: add dtype_msz address helperRichard Henderson
2018-07-02risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpersRichard Henderson
2018-07-02risugen: use fewer insns for aarch64 immediate loadRichard Henderson
2018-07-02risugen: Initialize sve predicates with random dataRichard Henderson
2018-07-02risugen: add --sve supportAlex Bennée
2018-07-02Makefile: include risu_reginfo_$(ARCH) in HDRSAlex Bennée
2018-07-02risu: add zlib indication to help textAlex Bennée
2018-07-02build-all-arches: do a distclean $(SRC) configuredAlex Bennée
2018-07-02build-all-arches: expand the range of docker imagesAlex Bennée
2018-07-02comms: include header for writevAlex Bennée
2018-07-02risu_reginfo_aarch64: include signal.h for FPSIMD_MAGICAlex Bennée
2018-03-06risu_reginfo_ppc64.c: Fix register name prefixSandipan Das
2018-03-06ppc64.risu: Fix pattern for load qwordSandipan Das
2018-03-06ppc64.risu: Add missing byte and dword loadsSandipan Das
2018-03-01Add arm and thumb vqrdml[as]h, vcadd, vcmlaRichard Henderson
2018-03-01Add aa64 fcadd + fcmlaRichard Henderson